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(SECOND EDITION)
NEW
ACADEMIC
SCIENCE
27 Old Gloucester Street, London, WC1N 3AX, UK
www.newacademicscience.co.uk
e-mail: info@newacademicscience.co.uk
New Academic Science Limited
EMBEDDED
SYSTEMS
D P KOTHARI
Ex-Visiting Professor
Royal Melbourne Institute of Technology
Melbourne, AUSTRALIA
SHRIRAM K VASUDEVAN
Technical Manager - Learning and Development
Amrita University, Coimbatore, INDIA
SUNDARAM R M D
Technical Leader, Wipro Technologies, INDIA
MURALI N
Lecturer, Nizwa College of Technology, OMAN

Copyright © 2015 by NewAcademic Science Limited
27 Old Gloucester Street, London, WC1N 3AX, UK
www.newacademicscience.co.uk • e-mail: info@newacademicscience.co.uk
ISBN : 978 1 781830 83 3
All rights reserved. No part of this book may be reproduced in any form, by photostat, microfilm,
xerography, or any other means, or incorporated into any information retrieval system, electronic or
mechanical,withoutthewrittenpermissionof thecopyrightowner.
British Library Cataloguing in Publication Data
A Catalogue record for this book is available from the British Library
Every effort has been made to make the book error free. However, the author and publisher have no
warrantyofanykind,expressed orimplied,withregardtothedocumentationcontainedinthisbook.

Dedications
Kothari, D.P.—To son-in-laws Pankaj and Rahul
Shriram K Vasudevan—To Parents and Sister
Sundaram R M D—To Mom and Dad
Murali N.—To Friends and Parents

Preface
Embedded Systems, present almost everywhere, have occupied an inevitable
place in the market. We, the consumers, live with Embedded Systems all the
way, be watches, mobile phones, refrigerators, cars, music systems and what
not…
Even the medical field is fully supported with the modern equipments which,
too, are embedded systems. Embedded Systems occupy a vital place in military
as well, where weapons mostly come under this category. Automobile industry
will become handicapped without Embedded Systems.
In this book, every topic has been supported with practical examples. In
addition, the programming concepts have been fully supported with simple and
elegant C codes which have been executed in Linux OS as well.
After every chapter, the reader is presented with a set of interesting quiz
questions, which will make the reader think for sure. In short, it will be good
and friendly learning experience for the reader.
We have covered the basics of Embedded Systems in Chapter-1 followed
by building blocks (components) of the system. Then the book moves towards
the design methodologies and modeling of Embedded Systems in Chapter-3.
Layered approach is being followed in building an Embedded System. This
approach has been discussed in Chapter-4. Chapters-5 and 6 cover the basics
of operating system and programming with C in Linux. Chapter-7 is on networks
for Embedded Systems. Then microcontrollers are discussed in the next two
chapters which include 8051 to latest ARM controllers. A practical example is
also indepth discussed in Chapter-11 after discussing the coding guidelines in
Chapter-10.

We wish to thank all the good hearts who have helped us in this project. In
particular, we wish to thank Subashri V, Sriram Karthik, Sivaraman R, and
Sunandhini M for their immense help and support in bringing the book to a good
shape.
D.P. Kothari
Shriram K Vasudevan
Sundaram R M D
Murali N.
Preface
viii

Preface vii
1. Embedded Systems—An Introduction 1—10
1.1 Basic Idea on System 1
1.2 Embedded Systems—Definitions 1
1.3 Characteristics of Embedded Systems—An Overview
with Examples 2
1.4 Challenges in Designing an Embedded System 6
1.5 Categorization of Embedded Systems 7
1.6 Examples of Embedded Systems 8
1.7 Quiz 9
2. Components of Embedded Systems 10—30
2.1 Understanding of Microprocessor and Microcontroller 11
2.2 Functional Building Blocks of Embedded Systems 12
2.3 Processor and Controller 13
2.4 Memory, Ports and Communication Devices 14
2.4.1 Memory 15
2.4.2 Ports 16
2.4.3 Communication Devices 16
2.5 CISC vs. RISC Processors 17
2.6 General Purpose Processor and DSP Processor 18
2.7 Direct Memory Access 19
2.8 Cache memory and its types 22
2.9 Co-design of Hardware and Software 23
Contents

2.10 System on Chip 24
2.11 Tools for Embedded Systems 25
2.12 Quiz 29
3. Design Methodologies, Life Cycle and Modeling of
Embedded Systems 31—53
3.1 Software Life Cycle 31
3.2 Embedded Life Cycle 33
3.3 Modeling of Embedded Systems 38
3.4 Simulation and Emulation 50
3.4.1 Simulation 50
3.4.2 Emulation 51
3.5 Quiz 53
4. Layers of an Embedded System 54—61
4.1 Introduction 54
4.2 Need for Layering 55
4.2.1 The Hardware Layer 55
4.2.2 The System Software Layer (or Simply, the OS layer) 57
4.2.3 The Middleware 59
4.2.4 The Application Layer 60
4.3 Quiz 61
5. Real Time Operating Systems (RTOS)
— An Introduction 62—72
5.1 What is an Operating System? 62
5.2 How is Resource Management Carried out? 63
5.3 What is Kernel? 64
5.3.1 Kernel Components 66
5.4 Why RTOS is Needed? 69
5.5 What is Real Time? 69
5.6 Quiz 72
6. Real Time Operating Systems — A Detailed
Overview 73—134
6.1 LINUX—An Introduction 74
Contents
x

6.1.1 Comparison of UNIX and LINUX 74
6.1.2 File System Architecture Details 75
6.1.3 Types of File Systems in UNIX/LINUX 76
6.1.4 Basic UNIX Commands 77
6.1.5 Proc and File Descriptor Table 78
6.2 RTOS Concepts 81
6.2.1 Task 81
6.2.2 Task States 82
6.2.3 Task Transitions 83
6.2.4 Task Scheduling 84
6.3 Inter Process Communication (IPC) Methodologies 98
6.3.1 Pipe 98
6.3.2 Named Pipe 102
6.3.3 Message Queue 106
6.3.4 Shared Memory 112
6.3.5 Task and Resource Synchronization 117
6.4 Memory Management 123
6.5 Cache Memory 126
6.6 Dynamic Memory Allocation 128
6.7 Fragmentation 130
6.8 Virtual Memory 131
6.9 Context Switching 132
6.10 Quiz 134
7. Networks for Embedded Systems 135—157
7.1 Serial Communication Basics 135
7.1.1 RS-232 Model 137
7.1.2 I2
C Model 139
7.2 CAN and CAN OPEN 140
7.3 SPI and SCI 143
7.3.1 SPI 143
7.3.2 SCI 145
7.4 USB 146
xi
Contents

7.5 IEEE 1394—Apple Fire Wire 148
7.6 HDLC—An Insight 150
7.7 Parallel Communication Basics 151
7.7.1 PCI Interface 152
7.7.2 PCI-X Interface 154
7.8 Device Drivers—An Introduction 154
7.8.1 Serial Port Device Driver 155
7.8.2 Parallel Port Device Driver 155
7.9 Quiz 157
8. An Overview and Architectural Analysis of 8051
Microcontroller 158—195
8.1 Introduction 159
8.2 Microcontroller Resources 165
8.3 Internal and External Memory 175
8.4 Memory Organization 179
8.5 Timer or Counter 180
8.6 Input and Output Ports 181
8.7 Interrupts—An Insight 183
8.8 Assembly Language Programming 186
8.9 Quiz 194
9. Advanced Architectures 196—211
9.1 Basic Introduction to Processors 196
9.2 ARM Architecture 197
9.2.1 Different Versions of ARM Processor 197
9.2.2 ARM Internals—Core Block Diagram 198
9.2.3 ARM—Register Set 199
9.2.4 ARM—Instruction Set 199
9.2.5 ARM Programming Model and Data Types 199
9.2.6 C Assignments in ARM—A Few Examples 200
9.3 SHARC Architecture 201
9.3.1 SHARC Working Principle 201
9.3.2 SHARC Addressing Modes 202
xii Contents

9.3.3 SHARC—C Assignments with Examples 203
9.4 ARM vs. SHARC 203
9.5 Blackfin Processors 204
9.5.1 Core Features 204
9.5.2 Memory and DMA 205
9.5.3 Microcontroller Features 206
9.5.4 Peripherals 206
9.6 TI-DSP Processors 207
9.7 Assembly Language Programming on Hardware Processors 208
9.8 Quiz 211
10. Coding Guidelines 212—227
10.1 Coding Standards—The Definition 212
10.2 The Purpose 213
10.3 The Limitations 213
10.4 Common Programming Standards 214
10.4.1 Modularization 214
10.4.2 Data Typing, Declarations, Variables and
Other Objects 215
10.4.3 Names 216
10.4.4 Organizing Control Structures 217
10.4.5 Program Layout 220
10.4.6 Comments and (Program) Documentation 224
10.5 Project Dependent Standards 226
10.6 Summary 227
11. Embedded Systems — Application, Design
and Coding Methodology 228—240
11.1 Embedded System—Design 2228
11.2 Designers, Perspective 229
11.3 Requirements Specifications 234
11.4 Implementation of the Proposed System 234
11.5 Quiz 239
xiii
Contents

Learning Outcomes
R Basic Idea on System
R Definition of Embedded Systems
R Characteristics of Embedded Systems
R Challenges in Designing an Embedded System
R Categorization of Embedded Systems
R “Examples of Embedded Systems”
R Recap
R Quiz
Embedded Systems are available everywhere in this modern world. This chapter
will touch on all basic aspects of understanding an Embedded System.
1.1 BASIC IDEA ON SYSTEM
What is a System? A system can be defined as simple as “It can accept some
input, analyze and then it should give us the output that the system is meant for
or it should drive the next piece of machine connected to it”.
1.2 EMBEDDED SYSTEMS—DEFINITIONS
Definition of Embedded Systems can now be seen. Many people have given
many definitions all over the world. If internet is surfed for definition of an
embedded system one will get enormous amount of results getting displayed.
Few of them are picked here to add clarity and finally embedded system can be
defined in a smooth way.
According to Wayne Wolf,
“An Embedded System is a computing system other than desktop
computers”. This looks pretty simple and other definitions are as follows:
1
Embedded Systems
—An Introduction

2 Embedded Systems
• An embedded system is the one that has computer hardware with software
embedded in it as one of its most important components.
• It is a device that includes a programmable computer but is not itself
intended to be a general purpose computer.
Embedded System can be well defined by taking couple of classical examples.
First, an air conditioner is taken for understanding. What does an air
conditioner do? The temperature is set as per requirement, say 20°C.
There may be variations in external temperature and that will also reflect
in the room air conditioner is fitted. But however the external temperature
varies, the AC machine facilitates user with cool atmosphere (i.e., 20 °C)
inside the room as per requirement. What is the action taken?
Consider a second example of the pace maker. Its work is to trigger the
heart beat if at all heart is getting into trouble. How is this done?
Answers for both the questions are the same.
When looking into the definition of an Embedded System, one can get
answer for above quoted cases.
• An electronic controller built into the application, continuously monitors
the process variables and ensures that the Process Variable (PV) does
not change; in the event of a change the controller generates a counteracting
signal applied to the application so that the deviated PV is brought to its
normal operating value. This could define embedded systems clearly!
So here it is made very clear. In air conditioner, temperature is the process
variable. A controller inside will keep on monitoring the process variable. If at all
the room temperature changes due to variation in external temperature, controller
will take a counter acting signal and PV (temperature) will be brought to required
range.
Second case, controller inside a pace maker will keep monitoring the heart
beat count. If it is getting low, immediately a counter acting action will be taken
and it will boost up the heart.
Food for brain! Is laptop an embedded system?—This question will be
answered shortly!
1.3 CHARACTERISTICS OF EMBEDDED SYSTEMS
—AN OVERVIEW WITH EXAMPLES
When provided with a system, it should be identified, if it is an Embedded System.
Certain common characteristics are there for all Embedded Systems. Having
able to understand the characteristics, embedded systems can be spotted easily.
• Single Functioned

3
Embedded Systems—An Introduction
• Tightly Constraint
• Real Time and Reactive
• Complex Algorithms
• User Interface
• Multi Rate
Each of the above characteristics are discussed below in detail.
1. Single Functioned
An Embedded System can execute a specific function repeatedly i.e., dedicated
function. As an example, Air conditioner will be cooling the room. Cooling is its
dedicated functionality and it cannot be used for any other purposes. AC can’t
be used for making calls. Likewise mobile phone is an Embedded System that
can be used to make and receive calls and it can’t be used for controlling room
temperature.
Consider the list of embedded systems that are being used every day.
1. Pager
2. Microwave oven
3. Mobile phone
4. ATMs
5. Car braking systems
6. Automobile cruise controllers
7. Pace makers
8. Modem
9. Network cards and many more
Fig. 1.1: Few applications of embedded systems (all single functioned)

4 Embedded Systems
From the examples quoted, it is understood about single functioned behaviour of
Embedded Systems.
Is Laptop an Embedded System -> No, since it can be used for different
purposes. It can play media players and at the same time, laptop can be used as
a gaming machine. And the next day it can be used for typing data. So it is
multifunctional and it can’t be an Embedded System.
2. Tightly Constraint
Whatever system is being designed, they have constraints. Embedded Systems
are also tightly constraint in many aspects. Few aspects are being analyzed
here.
1. Manufacturing Cost
2. Performance
3. Size
4. Power
The above four parameters decide the success of Embedded System.
Consider buying a mobile phone as an example. If the mobile phone costs
in lakhs, will it be bought? (Instead Landline phone would be preferred). Next
scenario, the mobile phone that is bought, if it takes 1/2 an hour for making a call
and if it also hangs frequently, will it be opted? (No Way!). Third point if the
phone is weighing 3 kgs, will it be preferred? Finally coming to power criteria.
All Embedded Systems are almost battery operated. And it is mobile as well! So
it should be capable of retaining the charge for some reasonable amount of
time. Else the battery will drain faster and one has to keep charger handy all the
time. So it is very important to have this constraint in mind when designing an
embedded system.
3. Real Time and Reactive
What is real time? —A nice question to start with!
A definition can be given through an example here. Take an instance of travel in
BMW car. (Great feel it would be). (The braking system is an embedded system).
And unfortunately a lorry is coming opposite to the car... The driver is applying
brake there!. What would be the action required? It should immediately stop the
car right. This is a real time and reactive behaviour. The brake may be applied
at any point in time. And the vehicle should be stopped immediately at the instance
of applying brake. It is never known when brake has to be applied, so the
system should be ready to accept the input at any time and should be ready to
process it.

5
So keeping above example in mind and defining Real Time, it is logical
correctness of the operation in deterministic deadline (The vehicle should
be stopped immediately, which means as logical correctness of the operation in
deterministic deadline).
Few examples can be spotted for Real time and Reactive behaviour of an
Embedded System:
(a) Pace Maker’s action
(b) Flights Landing Gear Control
(c) ECG Machines output
And so on … Many examples could be cited here!
4. Complex Algorithms
The processor inside the embedded system should perform operations that are
complex in nature. An example is digital camera. It is used to take colour
photographs, motion pictures, black and white pictures, etc. It needs to pull in
lots of complex algorithms for performing all the above mentioned operations.
So as a point to conclude, every Embedded System will have lots of complex
algorithms running inside it.
5. User Interface
Here too with an example the concept can be explained. NOKIA mobile phones
are very big hit in market right, Why? What is the reason? Is that because other
mobile did not perform well? No, is the answer. Nokia had excellent and simple
user interface. Calls can be made and received very easily. Typing SMS is also
easier… So it has been read by the people very well.
So designing system with easier and comfortable interface is most
important. Also it should have options required for the operation of the device.
Example is ATM machine; it has got comfortable interfaces and options. Keep
it in mind and design the system.
6. Multi Rate
Embedded Systems need to control and drive certain operations at one rate and
certain other operations at different rate. Example can be Digital Camera. It is
used to take pictures which are still. Also it is capable of shooting video. So it
has to be capable of driving the first operation from a speed different than the
second one.
A Small Recap: Please do not forget the definition of Real Time; down the line it
will be needed.

6 Embedded Systems
1.4 CHALLENGES IN DESIGNING AN EMBEDDED SYSTEM
First and foremost problem in designing an Embedded System is “Very Less
Availability of Tools and Debuggers”.
Other than the point quoted, there are several other challenges.
Will it work?
Upgradability
Hardware Selection
Fig. 1.2: Challenges in embedded system design
Figure 1.2 diagrammatically represents the challenges. Reader will be exposed
to all these challenges with some relevant examples.
1. Meeting Deadlines
How can the deadline be met that is meant for the product? Meeting deadline
accurately will need high speed hardware. Increasing hardware components
with quality would increase the cost of the product. This is the first challenge in
front of designers.
2. Hardware Selection
Embedded Systems never had a luxury of having much hardware. Taking memory
into consideration first, Embedded Systems will have very little inbuilt memory.
Adding more memory of smaller size will increase cost factor. So keep memory
only as much as needed. It can have an expansion slot for the system, if user is
willing to expand memory, who bothers, let user expand.
Coming to processor selection, if a very high speed processor is selected, it
would end up in draining the battery at the earliest. But it can’t be compromised
with speed also. So select a processor that perfectly fits in with requirement.
Too high speed processor would cost more and can drain battery also.
3. Is it upgradable and maintainable?
Assume that a mobile phone has been designed and it is released in the market.
But after reaching to the people, the product was found with problems in one or
Meeting Deadlines
Embedded System
Design Challenges
Hardware Selection Upgradability
Will it work?

7
two aspects. The developer would know that problem and it can be fixed. But
how will it reach the phone that had already reached to the public?
So it must be supporting with upgradation of versions of software for it.
Keep this in mind that the product should be upgradable with the same hardware!
Secondly, when develop software for embedded systems, it should be kept
in mind on maintainability. The code should not be just written in such a way that
only developer who developed it can understand. It should be understandable
for other engineers also. Other engineers should also be able to understand and
fix bugs in the code if any, if need be.
4. Will it work?
Nice Question. Isn’t it? Yeah. Please ensure if the system that has been designed
is really working fine. How can it be ensured? Through rigorous testing it is
possible; it needs to be proceeded with testing in many ways. First can be Unit
Testing, next stage is Sanity Testing and the third stage can be Regression testing.
Also even if the product has entered, it has to be constantly monitored. If any
customer complaint rises, that bug has to be looked into and has also to be fixed.
And more importantly, the bug that is fixed should not introduce any new bugs.
Let’s now get to know about the categorization of the embedded systems!
1.5 CATEGORIZATION OF EMBEDDED SYSTEMS
Embedded Systems can be categorized based on the complexity in building, cost
factors, purpose of the system, tools and other related environment availability,
etc. Keeping these points, Table 1.1 has been framed and it has dealt with
categories. Broadly one can classify embedded system into any of these,
1. Small Scale Embedded Systems,
2. Medium Scale Embedded Systems, and
3. Sophisticated Embedded Systems.
Table 1.1: Categorization of Embedded Systems
Small Scale
Embedded System
Medium Scale
Embedded System
Sophisticated
Embedded System
Processor Here it can be 8 bit
or 16 bit processor.
(it can’t do
computationally
intensive process)
It can be a 16 bit or
32 bit processor here.
(think of little complex
and intensive process
with this processor)
PLA, PAL, FPGA
and ASIC will fall in
this category.
(These are high end
design elements that
can be used to do
wonders)
Contd...

8 Embedded Systems
Hardware
Complexity
Very little complexity
will be visualized
here.
We will have to face
more complexity in
terms of peripheral
additions, interfaces
etc.,
Highly Complex.
(designers need
enormous expertise
to do proceed with
this)
Software
Complexity
No complexity will
be there in this
coding. Because the
device is not meant
for performing
complex
functionalities.
There will be
complexity added up.
This will have few
functions and code
might be lengthy.
Yeah. Most
Complex.
Designer needs to
be a master to work
on the code.
Power Battery operated Battery operated Can be Battery or
Live Source based
on the application.
Tools
Availabiltiy
Can be programmed
in simple
environment. So no
much research on
tools is required
here.
Here we will have to
use Debugger,
Compiler, IDE etc., as
the task goes slightly
cumbersome.
Designer needs
sophisticated
environment here.
Examples Calculator can be
the simplest
example. Stepper
motor controller can
be added to the list.
Washing Machine,
Microwave Oven, and
Vending machine.
Flight Landing Gear
Systems, Car
Braking Systems,
Military Applications,
Robots.
1.6 EXAMPLES OF EMBEDDED SYSTEMS
Coming to examples, everything around us can be taken! Yeah, each and
everything these days are embedded systems. Let’s take this way.
From the time of getting up in the morning,
1. Digital Water Heater! (After bath need to breakfast!). Here temperature
is the process variable and it is the input to be set by user. Controller will
take care on the controlling action and will take care of the heating process.
2. Microwave Oven (coffee after breakfast). Here again temperature will
be the process variable. Same controlling action will be taken.
3. Braking System, Music Player, Tire Pressure Monitoring System, Airbags,
Power Windows and GPS (Many more embedded systems are there
inside … only 1% is quoted, workplace has been reached now. Car braking
system can be an instance; it shows the real time and reactive behaviour.
Brake would be applied at any point in time, but still it would stop the car.)
4. All gym equipments from treadmill to cycling equipments are embedded
systems.

9
5. Video games, all digital gaming machines, I pod, MP3/MP4 players, Xbox
and what not!
POINTS TO REMEMBER
1. An Embedded System is single functioned and AC can be remembered
as a simple example.
2. Embedded Systems are Real time systems which is reactive in nature.
3. Many design challenges are associated with making an embedded
system, including cost, power etc.
4. Embedded Systems are classified into three major divisions—Small scale,
medium scale and large scale Embedded Systems.
Review Questions
1. What is an Embedded System? Give an example.
2. Embedded Systems are quoted as single functioned systems. Justification
is required in this case.
3. Define Real time.
4. Throw an example for real time and reactive Embedded System.
5. What are the major categories of the Embedded Systems? Give an example
for each division.
6. Is LCD projector an Embedded System? Please justify.
1.7 QUIZ
1. Pick odd one out! (Embedded is the clue)
(a) Laptop (b) Projector
(c) Mobile phone (d) MP3 player
2. Some of the important characteristics expected in consumer electronics
products are ...............
(a) Recovering from failures
(b) Low cost
(c) Performance
(d) Low unit cost, low power consumption and smaller product size
3. One of the most important characteristics of Embedded Systems for
automotive industry (with respect to the inmates of the vehicle) is
................
(a) Recovering from failures

10 Embedded Systems
(b) Low cost
(c) Safety
(d) Low unit cost, low power consumption and smaller product size
4. .................. manages resources like CPU time and memory of an
Embedded System.
(This is a general question, try to answer this.)
5. Embedded System can do multiprocessing — True or False.
6. What is Real time? Please give an example.
7. Give an example of multi rate characteristic of an Embedded System.
8. Embedded Systems are almost battery operated—True or False.
9. Mobile phone is not an Embedded System—True or False.
Answers for Quiz
1. Laptop
2. Low unit cost, low power consumption and smaller product size
3. Safety
4. Operating system
5. False
6. Braking, Pace maker’s behaviour can be a good example here.
7. A digital camera can work on a black and white image, colour image,
video and audio. Processing is different in all these which is referred as
multi rate.
8. True
9. False (May be in future, Mobile phones would do multiple things and can
break this question).

Components of
Embedded Systems
2
Learning Outcomes
R Understanding of Microprocessor and Microcontroller
R Functional Building Blocks of Embedded Systems
R Processor and Controller
R Memory, Ports and Communication Devices
R CISC vs. RISC Processors
R General Purpose Processor and DSP Processor
R Direct Memory Access—Indepth Analysis
R Cache Memory and its types
R Co-design of Hardware and Software
R System on Chip
R Tools for Embedded Systems
R Recap
R Quiz
2.1 UNDERSTANDING OF MICROPROCESSOR AND
MICROCONTROLLER
A microprocessor incorporates most or all of the functions of a computer’s
Central Processing Unit (CPU) on a single integrated circuit. A microcontroller
is a small computer on a single integrated circuit containing a processor core,
memory, and programmable input/output peripherals.
Microprocessors generally require external components to implement
program memory, RAM memory and input/output. Intel’s 80186, 80188, and
80386 are examples of microprocessors. Microcontrollers incorporate program
memory, RAM memory and input/output resources internal to the chip.
Microchip’s ‘PIC’ series and Atmel’s ‘AVR’ series are examples of
microcontrollers.

12 Embedded Systems
2.2 FUNCTIONAL BUILDING BLOCKS OF EMBEDDED
SYSTEMS
Embed means to fix (something) firmly and deeply or enclose something closely
in a surrounding mass. Figure 2.1 shows a simple embedded system.
The various blocks that build the embedded systems include ports, RAM, switch
controllers, Reset software buttons, LAN, PCI card, JTAG connector, etc.
2 port WAN
Serial
Console
USB
(host)
Printer port
Power
connector
JTAG
MCU
Boot Flash
Extension
Reset S/W
SD RAM
Flash
LEDs
4 port LAN
Switch
Controller
PCMCIA
card
Fig. 2.1: A simple embedded system
An Embedded System has a different set of issues to deal with than does desktop
software. This includes:
1. Handle situations that don’t arise with desktop software like doing several
things at once, responding to external events (button presses, sensor
readings, etc.).
2. Cope with all unusual conditions without human intervention including
Meet strict processing deadlines and never fail.
3. Able to log issues when things go out of control which helps in debugging
the issue later.
Embedded Systems were initially hardwired systems and then were
Microprocessor-based, then moved on to Microcontroller-based and
Specialized (application) processors and finally we have reached System
on a Chip (SOC).

13
Components of Embedded Systems
Micro
Processor
Memory System
Data bus
Address bus
Input/Output
Digital
Outputs
Digital
Inputs
Fig. 2.2: Basic building blocks of an embedded processor
Memory system forms a major block in embedded system. This includes RAM,
ROM, cache memory and hard drive memory. There should be provision to
provide input to the system by means of cable, SD cards etc. and proper output
mechanism is also required to test the system functionality. The basic building
blocks of Embedded System are illustrated in Fig. 2.2.
Required features for Embedded System include
R Throughput
R Response
R Low power
R Reliability
R Safety
R Maintainability
R Cost, size and weight
2.3 PROCESSOR AND CONTROLLER
Microprocessors generally require external components to implement program
memory, RAM memory and input/output. Intel’s 80186, 80188, and 80386 are
examples of microprocessors.
Microcontrollers incorporate program memory; RAM memory and input/
output resources internal to the chip. Microchip’s PIC series and Atmel’s AVR
series are examples of microcontrollers. Figure 2.3 depicts a PIC 18F8720
microcontroller in an 80-pin TQFP package.
It is not unusual to see these terms used interchangeably. In simple terms,
Microprocessor = CPU
Microcontroller = CPU, peripherals and memory

14 Embedded Systems
Peripherals = ports, clock, timers, UART, ADC converters, LCD drivers, DAC
and others.
Memory = EEPROM, SRAM, Flash, etc.
About 55% of all CPUs sold in the world are 8-bit microcontrollers and
microprocessors.
Fig. 2.3: A PIC 18F8720 microcontroller in an 80-pin TQFP package
A typical home in a developed country is likely to have only four general purpose
microprocessors but around three dozen microcontrollers. A typical mid range
automobile has as many as 30 or more microcontrollers. They can also be found
in many electrical devices such as washing machines, microwave ovens, and
telephones.
2.4 MEMORY, PORTS AND COMMUNICATION DEVICES
Computer data storage, often called storage or memory, refers to computer
components and recording media that retain digital data used for computing for
some interval of time. Computer data storage provides one of the core functions
of the modern computer, that of information retention. It is one of the fundamental
components of all modern computers, and coupled with a central processing
unit (CPU, a processor), implements the basic computer model used since the
1940s.
A register file is an array of processor registers in a Central Processing
Unit (CPU). Modern integrated circuit-based register files are usually
implemented by way of fast static RAMs with multiple ports. Such RAMs are
distinguished by having dedicated read and write ports, whereas ordinary
multiported SRAMs will usually read and write through the same ports.We will
discuss in detail about memory, ports and devices below.

15
2.4.1 Memory
Many types of memory devices are available for use in modern computer systems.
The RAM family includes two important memory devices: static RAM
(SRAM) and dynamic RAM (DRAM) as shown in Fig. 2.4. The primary
difference between them is the lifetime of the data they store. SRAM retains its
contents as long as electrical power is applied to the chip. If the power is turned
off or lost temporarily, its contents will be lost forever. DRAM, on the other
hand, has an extremely short data lifetime, typically about four milliseconds.
This is true even when power is applied constantly.
Memories in the ROM family are distinguished by the methods used to
write new data to them, and the number of times they can be rewritten. This
classification reflects the evolution of ROM devices from hardwired to
programmable to erasable-and-programmable. A common feature of all these
devices is their ability to retain data and programs forever, even during a power
failure.
In practice, almost all computers use a variety of memory types, organized
in a storage hierarchy around the CPU, as a trade-off between performance
and cost. Generally, the lower a storage is in the hierarchy, the lesser its bandwidth
and the greater its access latency is from the CPU. This traditional division of
storage to primary, secondary, tertiary and off-line storage is also guided by cost
per bit.
Fig. 2.4: Writable volatile random access memory
As memory technology has matured in recent years, the line between RAM
and ROM has blurred. Now, several types of memory combined features of
both. These devices do not belong to either group and can be collectively referred
to as hybrid memory devices. Hybrid memories can be read and written as
desired, like RAM, but maintain their contents without electrical power, just like
ROM. Two of the hybrid devices, EEPROM and flash, are descendants of
ROM devices. These are typically used to store code. The third hybrid, NVRAM,
is a modified version of SRAM. NVRAM usually holds persistent data.

16 Embedded Systems
2.4.2 Ports
Data can be sent either serially, one bit after another through a single wire, or in
parallel, multiple bits at a time, through several parallel wires. Most famously,
these different paradigms are visible in the form of the common PC ports “serial
port” and “parallel port”.
Early parallel transmission schemes often were much faster than serial
schemes but at added cost and complexity of hardware. Serial data transmission
is much more common in new communication protocols due to a reduction in
the I/O pin count, hence a reduction in cost. Common serial protocols include
SPI, and I2
C. Surprisingly, serial transmission methods can transmit at much
higher clock rates per bit transmitted, thus tending to outweigh the primary
advantage of parallel transmission.
Parallel transmission protocols are now mainly reserved for applications
like a CPU bus or between IC devices that are physically very close to each
other, usually measured in just a few centimetres. Serial protocols are used for
longer distance communication systems, ranging from shared external devices
like a digital camera to global networks or even interplanetary communication
for space probes; however some recent CPU bus architectures are even using
serial methodologies as well.
2.4.3 Communication Devices
Embedded Systems talk with the outside world via peripherals, such as:
R Serial Communication Interfaces (SCI): RS-232, RS-422, RS-485, etc.
R Synchronous Serial Communication Interface: I2
C, SPI, PCI, etc.
R Universal Serial Bus (USB), Multi Media Cards (SD Cards, Compact
Flash, etc.)
R Networks: Ethernet, Controller Area Network, etc.
R Timers: PLL(s), Capture/Compare and Time Processing Units.
R Discrete IO: aka General Purpose Input/Output (GPIO).
R Analog to Digital/Digital to Analog (ADC/DAC).
R Debugging: JTAG, ISP, ICSP, BDM Port, BITP and DP9 ports.
Some commonly used communication devices include I2
C, SPI and PCI. I2
C is
a multi-master, low-bandwidth, short distance, serial communication bus protocol.
Nowadays it is not only used on single boards, but also to attach low-speed
peripheral devices and components to a motherboard, embedded system, or
cell-phone, as the new versions provide lots of advanced features and much

17
higher speed. The features like simplicity and flexibility make this bus attractive
for consumer and automotive electronics.
2.5 CISC VS. RISC PROCESSORS
Reduced Instruction Set Computing or RISC is a CPU design strategy
based on the insight that simplified instructions can provide higher performance
if this simplicity enables much faster execution of each instruction. A computer
based on this strategy is a Reduced Instruction Set Computer. There are many
proposals for precise definitions, but the term is slowly being replaced by the
more descriptive load-store architecture. Well known RISC families include
DEC Alpha, AMD 29k, ARC, ARM, Atmel AVR, MIPS, PA-RISC, Power
(including Power PC) and SPARC.
A Complex Instruction Set Computer or CISC, is a computer where
single instruction can execute several low-level operations (such as a load from
memory, an arithmetic operation, and a memory store) and/or is capable of
multi-step operations or addressing modes within single instruction. The term
was retroactively coined in contrast to Reduced Instruction Set Computer
(RISC).
Before the RISC philosophy became prominent, many computer architects
tried to bridge the so called semantic gap, i.e., to design instruction sets that
directly supported high-level programming constructs such as procedure calls,
loop control, and complex addressing modes, allowing data structure and array
accesses to be combined into single instructions. Instructions are also typically
highly encoded in order to further enhance the code density. The compact nature
of such instruction sets results in smaller program sizes and fewer (slow) main
memory accesses, which at the time resulted in a tremendous savings on the
cost of computer memory and disc storage, as well as faster execution. It also
meant good programming productivity even in assembly language, as high level
languages such as FORTRAN or Algol were not always available or appropriate.
RISC→
→
→
→
→CISC Migration
(a) Determined by VLSI technology.
(b) Software cost goes up constantly. To be convenient for programmers.
(c) To shorten the semantic gap between HLL and architecture without
advanced compilers.
(d) To reduce the program length because memory was expensive.
(e) VAX 11/780 reached the climax with >300 instructions and >20 addressing
modes.

18 Embedded Systems
CISC→
→
→
→
→RISC Migration
(a) Things changed: HLL, Advanced Compiler, Memory size, etc.
(b) Finding: 25% instructions used in 95% time.
(c) Size: usually <100 instructions and <5 addressing modes.
(d) Other properties: fixed instruction format, register based, hardware control,
etc.
(e) Gains: CPI is smaller, Clock cycle shorter, Hardware simpler, Pipeline
easier.
(f) Cheaper: Programmability becomes poor, but people use HLL instead of
IS.
2.6 GENERAL PURPOSE PROCESSOR AND DSP PROCESSOR
The essential difference between a DSP and a microprocessor is that a DSP
processor has features designed to support high-performance, repetitive,
numerically intensive tasks. In contrast, general purpose processors or
microcontrollers are either not specialized for a specific kind of applications or
they are designed for control-oriented applications.
Most general purpose microprocessors and operating systems can execute
DSP algorithms successfully, but are not suitable for use in portable devices
such as mobile phones and PDAs because of power supply and space constraints.
A specialized digital signal processor, however, will tend to provide a lower-cost
solution, with better performance, lower latency, and no requirements for
specialized cooling or large batteries. Features that accelerate performance in
DSP applications include:
(a) Single-cycle multiply-accumulate capability; high-performance DSPs often
have two multipliers that enable two multiply-accumulate operations per
instruction cycle; some DSP have four or more multipliers.
(b) Specialized addressing modes, for example, pre- and post-modification of
address pointers, circular addressing, and bit-reversed addressing.
(c) Most DSPs provide various configurations of on-chip memory and
peripherals tailored for DSP applications. DSPs generally feature multiple-
access memory architectures that enable DSPs to complete several
accesses to memory in a single instruction cycle.
(d) Specialized execution control. Usually, DSP processors provide a loop
instruction that allows tight loops to be repeated without spending any
instruction cycles for updating and testing loop counter or for jumping
back to the top of the loop.

19
(e) DSP processors are known for their irregular instruction sets, which
generally allow several operations to be encoded in a single instruction.
For example, a processor that uses 32-bit instructions may encode two
additions, two multiplications, and four 16-bit data moves into a single
instruction. In general, DSP processor instruction sets allow a data move
to be performed in parallel with an arithmetic operation. GPPs/MCUs, in
contrast, usually specify a single operation per instruction.
While the above differences traditionally distinguish DSPs from GPPs/MCUs,
in practice it is not important what kind of processor you choose. What is really
important is to choose the processor that is best suited for your application; if a
GPP/MCU is better suited for your DSP application than a DSP processor, the
processor of choice is the GPP/MCU. It is also worth noting that the difference
between DSPs and GPPs/MCUs is fading: many GPPs/MCUs now include
DSP features, and DSPs are increasingly adding microcontroller features.
2.7 DIRECT MEMORY ACCESS
Direct Memory Access (DMA) is a feature of modern computers and
microprocessors that allows certain hardware subsystems within the computer
to access system memory for reading and/or writing independently of the central
processing unit. Many hardware systems use DMA including disk drive
controllers, graphic cards, network cards and sound cards. DMA is also used
for intra-chip data transfer in multi-core processors, especially in multiprocessor
system-on-chips, where its processing element is equipped with a local memory
(often called scratchpad memory) and DMA is used for transferring data between
the local memory and the main memory.
Computers that have DMA channels can transfer data to and from devices
with much less CPU overhead than computers without a DMA channel. Similarly
a processing element inside a multi-core processor can transfer data to and
from its local memory without occupying its processor time and allowing
computation and data transfer concurrency.
Without DMA, using Programmed Input/Output (PIO) mode for
communication with peripheral devices, or load/store instructions in the case of
multicore chips, the CPU is typically fully occupied for the entire duration of the
read or write operation, and is thus unavailable to perform other work. With
DMA, the CPU would initiate the transfer, do other operations while the transfer
is in progress, and receive an interrupt from the DMA controller once the operation
has been done. This is especially useful in real time computing applications
where not stalling behind concurrent operations is critical. Another and related

20 Embedded Systems
application area is the various forms of stream processing where it is essential
to have data processing and transfer in parallel, in order to achieve sufficient
throughput.
Address Bus
Data Bus
Control Bus
CPU
BR BG
Memory
Bus
Grand
Bus
Request
I/O
Data
I/O
Control
DMA
Controller
I/O
Device
Fig. 2.5: Embedded system with DMA
The DMA controller includes several registers: address register, count
register, control register and status register as illustrated in Fig. 2.5. The DMA
Address Register contains the memory address to be used in the data transfer.
The CPU treats this signal as one or more output ports. The DMA Count Register,
also called Word Count Register, contains the no. of bytes of data to be
transferred. Like the DMA Address register, it too is treated as an output port
by the CPU.
The DMA Control Register accepts commands from the CPU. It is also
treated as an output port by the CPU. Most DMA controllers also have a Status
Register which can be accessed to get necessary status information.
To initiate a DMA transfer, the CPU loads the address of the first memory
location of the memory block (to be read or written from) into the DMA Address
register. It does this via an I/O output instruction, such as the OTPT instruction
for the relatively simple CPU. It then writes the number of bytes to be transferred
into the DMA Count register in the same manner. Finally, it writes one or more
commands to the DMA Control register.
These commands may specify transfer options such as the DMA transfer
mode, but should always specify the direction of the transfer, either from I/O to
memory or from memory to I/O. The last command causes the DMA controller
to initiate the transfer. The controller then sets BR to 1 and, once BG becomes
1, seizes control of the system buses.

21
Modes vary by how the DMA controller determines when to transfer data,
but the actual data transfer process is the same for all the modes.
DMA Modes are:
(a) BURST Mode
(b) Cycle Stealing Mode
(c) Transparent Mode
Choice of mode is based on the application and software. Different applications
require different type of modes to be supported. Let’s take a look at the different
modes in general.
BURST Mode
1. Sometimes called Block Transfer Mode.
2. An entire block of data is transferred in one contiguous sequence. Once
the DMA controller is granted access to the system buses by the CPU, it
transfers all bytes of data in the data block before releasing control of the
system buses back to the CPU.
3. This mode is useful for loading programs or data files into memory, but it
does render the CPU inactive for relatively long periods of time.
CYCLE STEALING Mode
1. Viable alternative for systems in which the CPU should not be disabled
for the length of time needed for Burst transfer modes.
2. DMA controller obtains access to the system buses as in burst mode,
using BR and BG signals. However, it transfers one byte of data and then
de-asserts BR, returning control of the system buses to the CPU. It
continually issues requests via BR, transferring one byte of data per request,
until it has transferred its entire block of data.
3. By continually obtaining and releasing control of the system buses, the
DMA controller essentially interleaves instruction and data transfers. The
CPU processes an instruction, then the DMA controller transfers a data
value, and so on.
4. The data block is not transferred as quickly as in burst mode, but the CPU
is not idled for as long as in that mode.
5. Useful for controllers monitoring data in real time.
TRANSPARENT Mode
1. This requires the most time to transfer a block of data, yet it is also the
most efficient in terms of overall system performance.
2. The DMA controller only transfers data when the CPU is performing
operations that do not use the system buses. For example, the relatively

22 Embedded Systems
simple CPU has several states that move or process data solely within
the CPU:
NOP1: (No operation)
LDAC5: AC ← DR
JUMP3: PC ← DR,TR
CLAC1: AC ← 0, Z ←1
3. Primary advantage is that CPU never stops executing its programs and
DMA transfer is free in terms of time.
4. Disadvantage is that the hardware needed to determine when the CPU is
not using the system buses can be quite complex and relatively expensive.
2.8 CACHE MEMORY AND ITS TYPES
A CPU cache is a cache used by the central processing unit of a computer to
reduce the average time to access memory. The cache is a smaller, faster
memory which stores copies of the data from the most frequently used main
memory locations. As long as most memory accesses are cached memory
locations, the average latency of memory accesses will be closer to the cache
latency than to the latency of main memory.
When the processor needs to read from or write to a location in main
memory, it first checks whether a copy of that data is in the cache. If so, the
processor immediately reads from or writes to the cache, which is much faster
than reading from or writing to main memory.
Most modern desktop and server CPUs have at least three independent
caches: an instruction cache to speed up executable instruction fetch, a data
cache to speed up data fetch and store, and a translation look aside buffer used
to speed up virtual-to-physical address translation for both executable instructions
and data.
Types of Cache Memory
Direct Mapping
This is the simplest of the Cache mapping schemes. Each block of main memory
is mapped only to one possible cache line. The mapping is expressed as: Cache
line number = (main memory block number) modulo (number of lines in the
cache).
Associative Mapping
This method overcomes the disadvantage of direct mapping. Each memory
block can be loaded into any line of the cache. Memory address is just interpreted
as a tag and a word field. Tag field uniquely identifies a block of main memory.

23
Set Associative Mapping
This combines both the schemes (direct and associative mapping). This has the
advantages of both direct and associative mapping. Cache is divided into v sets,
each of which consists of k lines.
2.9 CO-DESIGN OF HARDWARE AND SOFTWARE
Software/Hardware co-design can be defined as the simultaneous design of
both hardware and software to implement in a desired function. Successful co-
design goes hand in hand with co-verification, which is the simultaneously
verification of both software and hardware and in what extent it fits into the
desired function.
There are so many traditional barriers to effective co-design and co-
verification such as organizational structures and old fashioned paradigms of
other companies in the same market or concepts developed in the past and
worked well back then. Suppliers often lack an integrated view of the design
process, too. What we need are tools which better estimate the constraints
between the boundaries, before iterating through a difficult flow.
By using simulation models, we can find conflicts between top-down
constraints, which come from design requirements and bottom-up constraints,
which come from physical data. Bottom-up constraints for software can only
be realized in a hardware context because the abstraction-level of software is
higher than that of hardware on which it is executed.
Hardware-software co-design exists for several decades. To ensure system
capability, designers had to face the realities of combining digital computing with
software algorithms. To verify interaction between these two prototypes,
hardware had to be built. But in the 90’s this won’t suffice because co-design is
turning from a good idea into an economic necessity.
Predictions for the future point to greater embedded software content in
hardware systems than ever before. So something has to be done to speed up
andimprovetraditionalsoftware-hardwareco-design.Developmentsinthismatter
direct to:
1. Top-down system level co-design and co-synthesis work at universities.
2. Major advances made by EDA (Electronic Design Automation) companies
in high speed emulation systems.
Co-design focuses on the areas of system specification, architectural design,
hardware-software partitioning and iteration between hardware and software
as design progresses. Finally, co-design is complimented by hardware-software
integration and tested. Design re-use is being applied more often, too.

24 Embedded Systems
Previous and current generation IC’s are finding their way into new designs
as embedded cores in a mix-and-match fashion. This requires greater
convergence of methodologies for co-design and co-verification and high
demands on system-on-a-chip-density. That’s why this concept was an elusion
for many years, until recently. In the future the need for tools to estimate the
impact of design changes earlier in the design process will increase.
To create a system-level design, the following steps should be taken:
1. Specification capture: Decomposing functionality into pieces by creating
a conceptual model of the system. The result is a functional specification,
which lacks any implementation detail.
2. Exploration: Exploration of design alternatives and estimating their quality
to find the best suitable one.
3. Specification: The specification as noted in 1 is now refined into a new
description reflecting the decisions made during exploration as noted in 2.
4. Software and hardware: For each of the components an implementation
is created, using software and hardware design techniques.
5. Physical design: Manufacturing data is generated for each component.
When successfully run over the steps above, Embedded System design
methodology from product conceptualization to manufacturing is roughly defined.
This hierarchical modeling methodology enables high productivity, preserving
consistency through all levels and thus avoiding unnecessary iteration, which
makes the process more efficient and faster.
2.10 SYSTEM ON CHIP
System on chip refers to integrating all components of a computer or other
electronic system into a single integrated circuit called chip. It may contain
digital, analog, mixed-signal, and often radio-frequency functions—all on a single
chip substrate. A typical application is in the area of Embedded Systems.
The contrast with a microcontroller is one of degree. Microcontrollers
typically have fewer than 100K of RAM and often really are single-chip-systems;
whereas the term SOC is typically used with more powerful processors, capable
of running software such as Windows or Linux, which need external memory
chips (flash, RAM) to be useful, and which are used with various external
peripherals.
In short, for larger systems System-on-a-chip is hyperbole, indicating
technical direction more than reality: increasing chip integration to reduce
manufacturing costs and to enable smaller systems. Many interesting systems
are too complex to fit on just one chip built with a process optimized for just one
of the system’s tasks.

25
A typical SOC consists of:
R One microcontroller, microprocessor or DSP core(s).
R Memory blocks including a selection of ROM, RAM, EEPROM and flash.
R Timing sources including oscillators and phase-locked loops.
R Peripherals including counter-timers, real-time timers and power-on reset.
R External interfaces including industry standards such as USB, UART and
SPI.
R Analog interfaces including ADCs and DACs.
These blocks are connected by either a proprietary or industry-standard bus
such as the AMBA bus from ARM. DMA controllers route data directly between
external interfaces and memory, bypassing the processor core and thereby
increasing the data throughput of the SOC.
2.11 TOOLS FOR EMBEDDED SYSTEMS
Most Embedded Systems run hardware diagnostics to check the health of the
hardware. Diagnostics are also used to confirm a fault that might have been
detected during normal operations. Used to verify reliability of the embedded
device, the basic hardware access code can be used as reference for writing
device driver code.
Diagnostic Types
(a) Power on Self Tests (POST)—Can test internal working of the board
immediately after it is powered up.
(b) Out of Service Tests—The board to be tested has to be configured in “out
of service” mode and then verify its interfaces with neighbouring boards.
(c) In-Service Monitoring—Checks health of the system when the system is
actually running in normal mode.
Break Point—Debug from RAM or ROM
Software Breakpoints—is created by inserting a 2 byte TRAP instruction which
will divert normal program flow to the debugger. Software breakpoints are useless
with ROM memory since a TRAP cannot be inserted.
Hardware Breakpoints—use comparators to detect accesses to a location and
no code memory contents are modified. These Logic circuits watch every bus
cycle, stopping execution when the address at which you’ve set the breakpoint
occurs. Only hardware breakpoints can be used if the execution is from ROM
systems.

26 Embedded Systems
Compilers
A compiler is a computer program (or set of programs) that transforms source
code written in a programming language (the source language) into another
computer language (the target language, often having a binary form known as
object code). The most common reason for wanting to transform source code
is to create an executable program.
Linker
In computer science, a linker or link editor is a program that takes one or more
objects generated by a compiler and combines them into a single executable
program as shown in Fig. 2.6. In IBM mainframe environments such as OS/360
this program is known as a linkage editor.
lib obj obj
lib dll exe
linker
Fig. 2.6: Linking process
On Unix variants, the term loader is often used as a synonym for linker. Other
terminology was in use, too. For example, on SINTRAN III, the process
performed by a linker (assembling object files into a program) was called loading
(as in loading executable code onto a file). Because this usage blurs the distinction
between the compile-time process and the run-time process, this article will use
linking for the former and loading for the latter. However, in some operating
systems the same program handles both the jobs of linking and loading a program;
see dynamic linking.
Simulators and Emulators
A simulator is a software that duplicates some processor in almost all the possible
ways. Emulator is a piece of computer hardware or software used with one
device to enable it to emulate another i.e., an emulator is a hardware which
duplicates the features and functions of a real system, so that it can behave like
the actual system.
Usually the emulators and simulators are used for the testing of new
architectures and also to give training in some complex systems. A most famous
example for a simulator is the flight simulator that simulates the functionalities
of an aircraft.

27
A hardware emulator is an emulator which takes the form of a hardware
device. Examples include the DOS-compatible card installed in some old-world
Macintoshes like Centris 610 or Performa 630 that allowed them to run PC
programs and FPGA-based hardware emulators. The advantages of using
emulator are listed below.
• Emulators maintain the original look, feel, and behaviour of the digital
object, which is just as important as the digital data itself.
• Despite the original cost of developing an emulator, it may prove to be the
more cost efficient solution over time.
• Reduces labour hours, because rather than continuing an ongoing task of
continual data migration for every digital object, once the library of past
and present operating systems and application software is established in
an emulator, these same technologies are used for every document using
those platforms.
ISS and Debuggers
The basic instruction simulation technique is to first execute the monitoring
program passing the name of the target program as an additional input parameter.
GDB is one of debuggers which have compiled-in ISS. The target program
is then loaded into memory, but control is never passed to the code.
The machine code instructions are treated as an input stream which can be
monitored and executed. The debugger can work along with other memory
protection tools. These tools protect against accidental or deliberate Buffer
overflow.
For test and debugging purposes, the monitoring program can provide
facilities to view and alter registers, memory, and restart location or obtain a
mini core dump. Core dump has the recorded state of the working computer
program at a specific time, generally when the program has terminated
abnormally. It prints symbolic program names with current data values.
Instruction simulation provides the opportunity to detect errors before execution
which means that the conditions are still exactly as they were and not destroyed
by the error.
We can debug
(a) either an executable or
(b) a core file or
(c) a running process
A watch point is a special breakpoint that stops your program when the
value of an expression changes. We can use a watch point to stop execution

28 Embedded Systems
whenever the value of an expression changes, without having to predict a
particular place where this may happen.
Watch points may be implemented in software or hardware. GDB does
software watch pointing by single-stepping your program and testing the variable’s
value each time, which is hundreds of times slower than normal execution.
Causes for Core Dump
A “segmentation fault” is often caused by trying to access a memory location
that is not in the address space of the process.
A “bus error” is typically caused by trying to access an object with an improperly
aligned address.
An “illegal instruction” typically occurs when execution branches into data.
This sometimes happens when the stack is overwritten.
An “arithmetic exception” is typically caused by integer division by zero.
Debugging Deadlocks/Race Conditions
Necessary and Sufficient Conditions:
1. Serially reusable resources—the processes involved share resources which
they use under mutual exclusion.
2. Incremental acquisition—processes hold on to resources already allocated
to them while waiting to acquire additional resources.
3. No pre-emption—once acquired by a process, resources cannot be “pre-
empted” (forcibly withdrawn) but are only released voluntarily.
4. Wait-for cycle—a circular chain (or cycle) of processes exists such that
each process holds a resource which its successor in the cycle is waiting
to acquire.
Stack Overflow
Common conditions for stack overflow include the size of stack which may not
be sufficient to keep local variables and passed parameters. The other reason
could be large buffers which may be used as local variables. To avoid this
scenario, use
1. Determine the right stack size required for each task and allocate stack
from the heap of the main task.
2. While creating the task, assign the above allocated stack.
3. Fill the top of the stack with the known pattern “oxdeadfeed”.
4. Assign a separate task to monitor the stacks of each task periodically.
5. If the top of the stack is hit, the known pattern would have been overwritten.
6. To detect stack overflow quickly, the stack size can be reduced temporarily.

29
7. Gain knowledge about available memories in the system and utilize it
gracefully.
POINTS TO REMEMBER
1. During the 1960s, computer processors were often constructed out of
small and medium-scale ICs containing from tens to a few hundred
transistors. The integration of a whole CPU onto a single chip greatly
reduced the cost of processing power.
2. Microcontrollers are “embedded” inside some other device (often a
consumer product) so that they can control the features or actions of
the product. Another name for a microcontroller, therefore, is “embedded
controller”.
3. The difference between RISC and CISC chips is getting smaller and
smaller. What counts is how fast a chip can execute the instructions it is
given and how well it runs existing software.
4. A DMA transfer copies a block of memory from one device to another.
While the CPU initiates the transfer by issuing a DMA command, it
does not execute it. For so-called “third party” DMA, as is normally
used with the ISA bus, the transfer is performed by a DMA controller
which is typically part of the motherboard chipset.
5. SOC designs usually consume less power and have a lower cost and
higher reliability than the multi-chip systems that they replace. And with
fewer packages in the system, assembly costs are reduced as well.
6. Generally, high-level programming languages, such as Java, make
debugging easier, because they have features such as exception handling
that make real sources of erratic behaviour easier to spot. In programming
languages such as C or assembly, bugs may cause silent problems such
as memory corruption, and it is often difficult to see where the initial
problem happened. In those cases, memory debugger tools may be
needed.
2.12 QUIZ
1. Hardware is tangible, but software is intangible – right or wrong?
2. Which type of memory is most closely connected to the processor?
(a) Main memory
(b) Secondary memory
(c) Disk memory

30 Embedded Systems
3. How is it possible that both programs and data can be stored on the same
floppy disk?
(a) A floppy disk has two sides, one for data and one for programs.
(b) Programs and data are both software, and both can be stored on any
memory device.
(c) A floppy disk has to be formatted for one or for the other.
4. Which one do you prefer while developing an application – CISC or RISC?
– Justify your choice.
(a) CISC
(b) RISC
5. What are the two general types of programs?
(a) Entertainment and Productivity
(b) Microsoft and IBM
(c) System software and Application software
6. Why does not a processor contain a cache of huge size?
(a) Costly
(b) Spacious
(c) Not available in the market
(d) No use
7. What tool is used for debugging the software on a hardware?
(a) JTAG
(b) BTAG
Answers for Quiz
1. Right
2. (a)
3. (b)
4. (b) (Parallelism)
5. (c)
6. (a)
7. (a)

Design Methodologies,
Life Cycle and Modeling
of Embedded Systems
3
Learning Outcomes
R Software Life Cycle
R Embedded Life Cycle
• Waterfall model
• Spiral model
• Consecutive refinement model
• Rapid Application Development (RAD) Model
R Modeling of Embedded Systems
• UML (Unified Modeling Language)
• FSM (Finite State Machine) and
• Petri net modeling
R Simulation and Emulation
R Recap
R Quiz
3.1 SOFTWARE LIFE CYCLE
Before one understands life cycle of an embedded system, it would be good to
go with understanding the basic software life cycle. Before a project is triggered
in any software concern, there are sequences and steps to be pursued. In other
words, a good start will lead to good finish. So, following are the sequences will
effect in better class of the deliverables.
1. Requirement collection and analysis
2. Design (breakdown into modules)
3. Coding
4. Integration (amalgamate of all the modules)

32 Embedded Systems
5. Testing (does it really toil?)
Above steps are sequential and are being represented in the flowchart format in
Fig. 3.1. Every step has been explained shortly.
Requirement collection and analysis
Design (Divide and Conquer approach)
Coding (Implementation of design)
Testing
Integration (Modules integration)
Fig. 3.1: Block diagrammatic representation of software life cycle
Life cycle starts with requirement collection. First the designer has to be
clear on what exactly the product is meant for. Requirements have to be collected
with paramount care as missing out one of the requirements would nuisance the
final product. If the product is designed for customer usage, it would be better to
analyze the same sort of products that are already in market, so that the cons of
the existing product can be addressed clearly in the new product. A better start
will lead to a better finish as always.
Coming to the second phase, a product might have to execute so many
operations. For an instance, assume cellular phone. It should be proficient of
making and receiving calls, it would be good if it has a FM radio, Digital camera
and an MP3 player. These are all different ratio and require different expertise
to develop these features. It would be wise if the requirements are now broken
into small modules and assigned to different teams for working on them. Here
divide and conquer policy is being followed and the work is being assigned to the
right people with right expertise. This would also be easier for the managers to
manage the teams. And most importantly as many people work on the product,
total duration required to manufacture would be reduced in a big way.

33
Design Methodologies, Life Cycle and Modeling of Embedded Systems
The third and most important action is coding. Developers should write the
code for the functionalities that they are assigned with. Language can be (C,
CPP or JAVA etc.,) chosen based on the application. Coding has to be written in
a modular way. Also code should have enough comments and there should be
enough scope for upgradation of the code. And it would be better if needless
inclusion of header files is avoided.
Integration comes next. Here all the small modules (Assuming mobile phone
again, modules could be Radio, call handling, messaging, music player etc.)
have to be integrated to get a final end product. During integration great care
should be taken for ensuring that all the functionalities are integrated properly in
such a way that no functionality is getting affected. After integration testing has
to be done at various levels.
The final phase of cycle is testing. The product has to be tested for the
functionality.Initially,developerwilldosomeminimalleveloftesting.Itisreferred
as unit testing. But there would be specific testers who can test the product
better at various levels. Software and hardware have to be tested for stability.
There should be set of test cases that have to be run to ensure the working of
the product. And more importantly even after the product has been released it
has to be constantly monitored for the performance. There might be some
complaints that would be raised by consumers. Until the product gets stabilized
in the market, testing has to be done constantly.
3.2 EMBEDDED LIFE CYCLE
Keeping the above in mind, one can move on to the embedded system design
life cycle. There are lots of methodologies that can be followed for designing an
embedded system.
1. Waterfall model
2. Spiral model
3. Consecutive refinement model
4. Rapid Application Development (RAD) model
All the above methodologies are discussed in this chapter.
1. Waterfall Model
The block diagrammatic representation of Waterfall model is shown in
Fig. 3.2. The lines quoted in the backward direction have to be forgotten initially.
Explanation of it would be given below.
The flow will remain the same as normal software life cycle. But, there is
a very big drawback in the conformist approach. No attention is being given at
each step if the requirement has been met successfully. For example, if 3rd

34 Embedded Systems
phase is being carried out, after completion of the phase in this model there is no
scope for checking with previous couple of phases if the target has been achieved
accurately.
But considering the lines that are drawn in backward direction the above
problem can be addressed easily. After the completion of phase 2, one should go
back and check with phase one if the requirements that have been quoted at
phase 1 are met in phase 2. So here even if one of the requirements is missed
out it could be speckled and corrections can be done immediately instead of
checking all the things at the end which would require lots of human efforts and
money.
Requirement
collection and analysis
Design
(Divide and Conquer approach)
Coding (Implementation
of design)
Testing
Integration
(Modules integration)
Fig. 3.2: Block diagrammatic representation of waterfall model
Advantages
1. Simple method.
2. Flow is easy even for a new entrant to understand the process.
Disadvantages
1. Without backtracking it seems to be highly improbable.
2. Secondly, with backtracking one has to spend a lot of time in each and
every phase.
2. Spiral Model
This is one of the other ways which one can go behind. The diagrammatic
representation is presented in Fig. 3.3.

35
Design Methodologies, Life Cycle and Modeling of Embedded Systems
Testing &
Requirement
Analysis
Fig. 3.3: Block diagrammatic representation of spiral model
(As the spiral gets larger, time required is also getting more)
Here in this model, each and every phase will have to undergo testing and
checking with requirement after the completion of that phase. So it will take lots
of time for each phase to be completed. And spiral gets larger and larger as it
moves on (It is an indication of more time being spent in that phase). It is
because testing will take more time at each phase. After the initial system is
made, designer and testing team should focus more on functionality of the system
and they must ensure if it is working fine and if they are meeting the requirement.
If the testers find some problems, they have to be fixed and again fully fledged
testing has to be carried out. After confirmation the final product can be produced
and could be released to the market.
Advantages
1. Highly realistic and chances for errors are less.
Disadvantages
1. Though it is a realistic model, it takes a lot of time which may affect the
product to reach the market on time.
3. Consecutive Refinement Model
This model is represented in Fig. 3.4.

Exploring the Variety of Random
Documents with Different Content

"I felt my airing rather droll,
Jogging with Gripe-all cheek-by-jowl,
And hearing him, with no great awe,
Expound the secrets of the law.
—When arriv'd at seven miles' end
He smil'd and said, 'Good bye, my friend:
Now homewards you will turn and tell,
That thus far you have left me well.'
I left him with a hope, how vain!
I ne'er might see his face again.
My spur did sprightly poney goad
Till I had got into the road
Which did to Oxford's city lead,
When I restrain'd my foaming steed,
And, calmly pacing on my way,
Ere Great Tom toll'd the following day,
I had embrac'd my rev'rend friend
And kindest patron, Doctor Bend.
Drawn by Rowlandson

Quæ Genus at Oxford.
"I told a simple, artless tale,
That seem'd completely to prevail,
As I beheld his face the while
Beam with a kind, approving smile.
''Tis a bold trick,' the Doctor said,
'Which you, my lively spark, have play'd,
But since to College you are come,
I'll try to make the place your home;
Where I should hope you need not fear
To be cut short in your career;
I think, at least, we may engage
To keep you safe till you're of age,
When I shall leave you to the struggling
With Gripe-all's artifice and juggling:
But still the cunning lawyer knows
I have good friends 'mong some of those
Who lead the bar or have a seat
Where the keen eye detects a cheat.
He will, I doubt not, swear and curse,
Nay, he may say you've stole his horse;
But if he meets with no disaster,
In two days he shall see his master,
And John will have a strict command
To give a letter to his hand
Which I shall with due caution write
Before I seek my bed to-night,
And if my mental eye sees clear
Will fix my friend Quæ Genus here.'
John met the lawyer on the road,
Just as he reach'd his own abode,
And ere at home he could have heard
Of my escape a single word:
Told him at once all he could tell,

That I at Oxford was, and well,
Where as I stay'd, I had of course,
With many thanks return'd his horse,
John said, he rather look'd confus'd
As the epistle he perus'd.
—Whether it bore a kind request
I should with Alma Mater rest,
Or any hint that might apply
To the High Court of Chancery:
If soothing it contain'd or threat,
I never knew or I forget,—
With all submission it was met. }
To all it ask'd he did agree,
And sent his kind regards to me,
While he his counsel did commend
Not to run off from Doctor Bend,
Nor e'er be govern'd by the whim
That made me run away from him.
"Thus soon in Scholar's cap and gown,
I was seen saunt'ring up and down
The High-Street of fair Oxford Town. }
And though I stood not first in fame,
I never bore an idler's name.
I was content, nay 'twas my pride
The Doctor ne'er was heard to chide,
Which, as your Oxford youths can tell,
Was getting onward rather well.
My friends, the Worthies, near the Lake,
Lov'd me for Doctor Syntax' sake,
And, free from e'en a speck of care,
I pass'd a short-liv'd Summer there.
—But time, as it is us'd, roll'd on,
And I, at length, was twenty-one.

"I now became a man of cares
To bear the weight of my affairs,
To know my fortune's full amount,
And to arrange a clear account
Between the vile, rapacious elf,
The Lawyer Gripe-all and myself.
—No sooner to the place I came,
Soon as was heard my well-known name,
The bells my coming did proclaim, }
And had I stay'd the following day,
I would have made the village gay!
Thus Gripe-all was full well prepar'd
And put at once upon his guard.
I went unwittingly alone
To claim my right and ask my own,
Though arm'd, to cut the matter short,
With an enliv'ning dose of Port,
While he was ready to display
The spirit of the law's delay.
—A step, he said, he could not stir
Without Baptismal Register,
And many a proof he must receive,
Which well he knew I could not give;
And till these papers I could shew,
He must remain in Statu quo.
But still, as a kind, gen'rous friend,
And from respect to Doctor Bend,
He would, though cash did not abound,
Advance me then four hundred pound.
I took the notes and thought it best
To wait the settling of the rest;
But soon I saw, as I'm alive,
That I had sign'd receipt for five.
My fingers caught the fraudful paper,
At which he 'gan to fume and vapour,

And let loose language full of ire,
Such as 'you bastard, rascal, liar,'
On which I caught him by the nose,
And gave the wretch some heavy blows,
Nay, as the blood ran down his face,
I dash'd the ink all in his face,
So that his figure might have done
E'en for the pit of Acheron.
Inky black and bloody red
Was o'er his ghastly visage spread,
As he lay senseless on the floor,
And, as I then thought, breath'd no more.
—The office, now a scene of blood,
Most haply in the garden stood,
So that our scene of sanguine riot
Did not disturb domestic quiet:
The notes were in my pocket stor'd,
And the receipt was in the hoard;
But as I now believ'd him dead,
I thought of being hang'd—and fled.
Nor did I make the whisky wait
Which then stood at the garden gate.
The driver who there held the reins,
Took me through many secret lanes
And woodland roads, that might evade
Pursuit, if any should be made.
He had an humble play-mate been
When I was sportive on the green;
But now, like me, to manhood grown,
Was as a skilful driver known;
And would have gone to serve Quæ Genus
Though fire and water were between us.
I told him all the fears I felt,
And how I had with Gripe-all dealt;

Nay, urg'd him, if I were pursued,
To cheat the blood-hounds, if he could,
All which he mainly swore he would. }
Nay, hop'd I'd given him such a drubbing,
As to send him Beelzebubbing;
Though, first or last, he sure would go
To his relations down below.
Drawn by Rowlandson
Conflict between Quæ Genus & Lawyer Gripe-All.

"Thus as we talk'd a mail-coach pass'd,
And as I could not go too fast,
I found, perchance, an empty seat,
And thus I made a quick retreat;
Nay should, in eight and forty hours,
By the wheels' ever-rolling powers,
Have a secure retirement found,
Safe from pursuit, on Scottish ground.
But as Misfortune, it is said,
Calls in associates to her aid,
And, indeed, is seldom known
To pay her visits all alone;
So either from the sultry weather,
Or anxious thoughts, or both together,
I was stopp'd short in my career,
By intermitting fits severe
Of heat and cold: a Galen came,
And Julep was the good man's name,
For truly good he prov'd to me
In skill and in humanity.
''Tis not,' he said, 'disease alone,
Which various symptoms have made known,
But they're encreasing as I find,
By a disturb'd and anxious mind,
And if that cannot be subdued,
Med'cine will do but little good.'
I therefore, my distresses told,
In short, my story did unfold,
While, as I spoke, in his kind eye,
I saw the tear of sympathy,
And did beneath his roof receive
The care that pitying skill could give.
"The fever wag'd a painful strife,
A struggling chance 'tween Death and Life,

That play'd upon my yielding spine,
Which did to outward curve incline:
I felt the mark would ne'er forsake
Its cruel seat upon my back;
I bent beneath the foul disaster
That ne'er would yield to any plaister:
Nor medicine, nor knife can cure it,
And must struggle to endure it.
Thus when restor'd to health and vigour,
I was become a crook-back'd figure:
My former round and healthful face
Had lost its plump, its rosy grace,
And was reduc'd from this same cause
To pale and lean and lantern jaws,
That none who once Quæ Genus knew
Would recollect him on the view;
Nor e'en would recognition wait
Though he should pass by Gripe-all's gate.
When in the glass I chanc'd to view,
The figure I now scarcely knew,
I shudder'd and despis'd it too. }
—'At length,' said Julep, 'I commend,
Ere you depart, a worthy friend,
A lawyer too, nay, do not start,
Whose well-stor'd head and honest-heart,
Throughout his life were ne'er disjoin'd,
And in his practice are combin'd
The cause of truth and right to aid;
Who ne'er has heard the poor upbraid
His conscious dealings, while 'tis known,
The wealthy do his virtues own.
Thus, as your fate has been accurs'd,
Of legal dealers, with the worst;
You now may, as by all confess'd,
Obtain good counsel from the best.

"On such a character intent,
To Lawyer Make-peace thus I went,
And told my curious story o'er
As I have told it you before.
With a keen look my face he ey'd,
And in a gentle tone replied.
'If the good man you thus have bang'd,
You may contemplate being hang'd;
But, as the case to me appears,
I trust you may dismiss your fears;
For even now you do not know
What evil follow'd from the blow;
And though some blood may have been spill'd,
It follows not the man was kill'd:
Besides, whatever ill was done,
There was no witness, no not one
To prove which of you was in fault,
Who first provok'd or gave th' assault;
And if, my friend, you had not fled
You need not fear, though he were dead.
—No advertisement has appear'd
To state the crime, as I have heard,
And surely I've the means to know
If any measures had been so.
But still, remember, I advise
That you move under a disguise,
'Till time and chance have drawn aside
That veil that does these threat'nings hide,
Which, in your present dubious state,
May on your wary footsteps wait.
Change your dress and change your name,
For neither now must be the same.'

Quæ Genus.
'My dress and name I'll do anon,
The fever all the rest has done;
For Doctor Bend I would defy
The fondled Foundling to descry,
In his mis-shapen misery. }
Johnny Quæ Genus, now adieu!
Jack Page I substitute for you!'
Lawyer Make-peace.

'You have good friends whom you can trust,
Who to misfortune will be just,
They will, I doubt not, let you know,
How you must act and what to do.
And much I think you have been wrong,
To have with-held your pen so long.
Obey me now in all I've said;
Be secret and be not afraid.'
"He spoke, and, in the kindest way,
Urg'd me to make no more delay;
And when I sought to give the fee;
'No, no,' he said, 'to such as thee
For mere good words I'm never paid;—
This is my way of plying trade.
When you have made a fair escape
From this unlucky, wretched scrape,
And when you are again restor'd
To your own happy bed and board;
When from all thraldom you are free,
Then, if it suits, remember me.'
"My notes were sew'd up in my coat,
For Julep would not take a groat.
'When you reach home,' he kindly said;
'Like his friend Make-peace, I'll be paid.'
Thus I set off, as was my plan,
Guis'd as a trudging, trav'lling man,
And in his journey going on
To seek his fate in London town.
My needfuls in an oil-cloth sack,
Were buckled to my wretched back,
And late at night when the full moon
In an unclouded brightness shone,
I left those gen'rous friends behind
Which such as me so seldom find:

Which such as me so seldom find:
A Galen, with that goodness fraught,
Who gave his skill and drugs for nought;
And an attorney, whose great aim
Was to put roguery to shame;
Nay, whose superior virtues tell
The Law can shew a Miracle.
"You must, Sir Jeff'ry, often see
The strange effects of vanity;
Another you will find in me. }
You'll scarce believe as I relate
The folly which I now must state:
That I've been such a silly elf
I now can scarce believe myself:
And I could wish I dare conceal
What duty bids me to reveal.
—Did not calm prudence whisper now
To my existing state to bow,
To tell it all to such a friend
As I had found in Doctor Bend,
Or a quick pilgrimage to make
To Worthy-Hall beside the Lake,
Where, for dear Doctor Syntax' sake, }
The troubled Foundling would receive
All that protecting care could give.
This was the counsel Make-peace gave,
A lawyer who was not a knave;
Who would advise without a fee,
And felt for human misery.
—This Reason said in lessons strong,
As I pac'd my still way along,
When the dull sound of my own feet
And Philomela's sonnet sweet
Did on the gen'ral silence break,
And seem'd to keep the night awake.

Then Vanity sat pick-a-pack
Perch'd on the hump upon my back,
And whisper'd into either ear,
'Such humbling counsels do not hear.
Where poor Quæ Genus has been known
His alter'd form must ne'er be shown:
With this sad shape he never can
Hold himself forth a gentleman:
No art can furnish you a cloak
To hide from pity or from joke.
If passing on a river's ridge,
Or, perchance lolling o'er a bridge,
You gaze upon the stream below
Whose crystal mirror's seen to flow,
Would not the picture meet your eye
Of your own sad deformity?
At Oxford you would be the talk
Of the High-street or Christ-Church-walk,
While many quizzing fools look round
To view your rising back begown'd.
—How would you bear the wond'ring ken
Of the good folk of Sommerden,
While they with pitying looks lament
The once straight form, but now so bent!
Then leave the world where you have been,
Where I would be no longer seen,
Nor let the jealous eye compare,
What you once was with what you are.
Might I advise, I'd sooner die
Unknown, in humble privacy,
Again,' said whisp'ring vanity, }
'Than e'er appear where I was known
For graces which were then my own,
That pity or that scorn might point
At such a form, so out of joint.'

"I need not say how many days
I sought the bye and secret ways,
For ever list'ning to the tongue
That whisper'd soft and pleaded strong,
To set each better feeling wrong. }
Hence I resign'd myself to chance,
Left fortune, friends, inheritance,
And madly felt that I was hurl'd
Thus mark'd to wander through the world.
To snatch at, and at once receive,
Whate'er the world might chance to give.
'Twas not a whimsy of the brain,
That did the idle scheme sustain,
'Twas something which I can't explain. }
All feeling center'd in the pack
That had thus risen on my back;
And as I felt the burden there,
It seem'd the seat of ev'ry care,
Of ev'ry painful thought brimfull,
Like Old Pandora's Ridicule.
But as every single note
Which I from Gripe-all's grasp had got,
Was still secure within my coat, }
I had sufficient means and more
To travel all the kingdom o'er
With staff in hand, and well-shod feet,
And oil'd umbrella form'd to meet
The show'rs that might my passage greet. }
One pocket did a bible hold,
The other held the story told,
Which good Æneas did rehearse
To Dido, in immortal verse;
While from a loop before descended
A flute that oft my hours befriended:

Thus I with verse, with prose or fist,
Was scholar, fiddler, methodist.
As fit occasion might demand,
I could let Scripture Phrase off-hand,
Or fine re-sounding verses quote,
Or play a tune in lively note.
Thus qualified to cut and carve,
I need not fear that I should starve;
While in some future lucky stage
Of my uncertain pilgrimage,
I might have hopes, remov'd from strife,
To be a fixture for my life.

"Such was the wild, fantastic scheme
Such was the strange distracted dream,
That, stranger still, rose from the pack
Which chance had fix'd upon my back.
Of friends forgetful, 'twas my plot
That I by friends should be forgot.—
I seem'd to wish that I were thrown
Upon some island yet unknown,
Where crooked figure is the feature
Of all the living, reas'ning nature;
And where deformity would be
A shape of perfect symmetry;
Which Swift would not have fail'd to spare,
Had his bold fancy wander'd there,
And Lemuel Gulliver had been
The visitor of such a scene.
"In this same state I wander'd on,
Grumbling and doubting and alone,
Though some encouragement I met
Which made me whilom cease to fret;
For, tales I hap'd by chance to know
And pleasant fancies I could show,
With which my active mind was stor'd,
Had sometimes paid my bed and board;
Nay, had prolong'd my welcome stay
Throughout a grave or lively day.
"One evening by a riv'let's side
That did in gentle murmurs glide,
Where the green turf its carpet spread,
And willow boughs wav'd o'er my head,
I sat reclin'd, nor was my flute,
As I could wake its music, mute:
When a huge waggon pass'd along,
And soon a chorus join'd the song

And soon a chorus join d the song.
Invited by the social strain,
I rose and sought the jocund train;
Men, women, children, all so gay,
Who loudly cheer'd the tedious way.
The cargo which the waggon bore
Were modern times and those of yore;
The image of each living scene,
And of such things as ne'er had been:
Witches and goblins, clouds and skies
Deck'd out in their varieties,
The river's flow, the ocean's waves,
The crowns of kings, the bonds of slaves,
Helmets and mitres, robes and arms,
Terrific forms, and beauty's charms,
All mov'd along, together hurl'd,
Th' outfittings of a mimic world:
When what with spouting, what with song,
As the procession trudg'd along,
No cunning was required to see,
It was a strolling company,
Who were proceeding to make known
Their talents in a neighb'ring town.
Here a strange thought occur'd that I
Might try my powers in Tragedy;
While the vain fancy was possess'd
I might appear among the best:
In short among them I display'd
An earnest of the acting trade.
The bills were blazon'd with my name,
A candidate for scenic fame,
And 'twas announc'd that Mr. Page
Would first appear on any stage.
The part which I of course preferr'd
Was Shakespear's well known R. the Third.
I wanted not the wardrobe's aid,
My crook back was already made;

My crook-back was already made;
My form disdain'd the aid of art,
And thus I play'd the tyrant's part:
But from my being thus disjoin'd,
To this same part I was confin'd.
Though by this outfit I must own
I could perform the awkward clown,
Or any other hunch-back fellow,
A Pantaloon, or Punchinello,
Where white and red be-mark'd my face,
And excellence was my disgrace:
For here I shrunk beneath the pack
That fate had nail'd upon my back.
"I wish'd to figure as Othello,
But he was a fine, straight-made fellow,
Whom, with a shape, so crook'd, so bent,
I could not dare to represent,
And though his face was olive brown,
No injury his form had known;
While mine, in its unseemly guise,
Fair Desdemona must despise:
Nor could it be a bard's design,
That love-sick maids should e'er incline
To such an outrag'd shape as mine. }
My voice possess'd a tender strain,
That could express a lover's pain;
But such a figure never yet
Was seen to win a Juliet.
Nay ladies lolling in a box,
Would think it a most curious hoax,
If through their glasses they should see
Lord Townly such an imp as me.
Thus for a month or more, Jack Page
Fretted and strutted on the stage,
Sometimes affording Richard's figure

In all its native twist and vigour;
Or bearing kick, or smack, or thump
From Harlequin upon his hump.
Though I say not, I was ill-paid
For the fine acting I display'd.
Nay, had I less mis-shapen been,
I might to the Theatric scene,
Have turn'd my strange life's future views,
And courted the Dramatic Muse.
"But as I could not smooth my shape
From the hips upwards to the nape,
And as to so confin'd a round
My imitative powers were bound,
My Genius I resolv'd to try
In writing Farce or Comedy,
In which I could exert my art
For my dear self to form a part
Wherein the keen, applauding eye
Might dwell on my deformity,
And where the picture might beguile
The judgement to afford a smile.
—When this same work I had perform'd
My vanity was rather warm'd.
'Humour,' 'twas said, 'the piece discovers,'
And it was call'd, 'The Crooked Lovers.'
"I think, Sir Jeff'ry you may guess,
The plot my Farce aims to possess,—
A kind of praise of ugliness; }
Where Beauty is not seen to charm,
Nor fill the heart with fond alarm;
Where finest eyes may gleam in vain,
May wake no joy, or give no pain:
And though the beaming smiles may grace
The rosy bloom of Delia's face,

Here they excite no am'rous passion,
Nor call forth tender inclination:
Such the desire, that ev'ry day,
Amuses Cupid when at play,
But other objects must engage
The scenes I offer'd to the stage:
Lame legs, club feet, and blinking eyes,
With such like eccentricities,
Call'd forth my amorous desire,
And set my actors all on fire.
With me no Damon longs to sip
The sweets of Cath'rine's pouting lip,
But smoke-dried Strephon seeks the bliss
Of a well-guarded, snuffy kiss,
Where the long nose, delightful wonder,
Scarce from the chin can keep asunder;
Where lovers' hearts ne'er feel a thump,
But when they view each other's hump.

"Now here again I was o'erthrown
By a crook-back, and not my own;
The May'rs gay wife, whose back appears
Upon a level with her ears,
Was pleas'd at first that I had prov'd
She was an object to be lov'd;
But as the Parish Parson too,
With a small form was quite askew,
And as, when it was pleasant weather,
This pair would take a walk together,
Would saunter through the winding glade,
Or sit beneath the beechen shade;
And, as it seem'd, were never cloy'd
With tender converse so enjoy'd;
It hap'd some Critic keen discovers
Whom I meant by 'The Crooked Lovers.'
The May'ress call'd th' obedient Mayor
To frown from magisterial chair,
And with the terrors of his mace
To drive my Hunch-back from the place;—
And on the high-road I once more
Was trav'lling as I did before.
"To you, Sir, it was never known
To feel the state which I must own:
No home, not knowing where to go,
How I should act and what to do.
Just as a ship whose rudder's lost,
Nor within sight of any coast;
Without the power to stand the shock
Of tempest, or to shun the rock.
From the strange nature of my birth,
I knew no relative on earth,
Nor to my giddy thoughts was given
To look with any hope to Heaven.

To London I propos'd to go,
Where not a being did I know:
To me it was an unknown shore,
Where I had never been before,
At least, since of all care bereft,
I was a helpless Foundling left.
Thus, as I thought, behold I stood,
Beside a mill-dam's spreading flood;
The waters form'd to drive the mill
With its tremendous wheel, stood still,
While evening glimmer'd on the hill. }
One plunge I said and all is o'er,
My hopes and fears will be no more;
An unknown child, an unknown man,
And I shall end as I began.
Nor can I say what would have follow'd,
I, and my hump, might have been swallow'd
In the deep, wat'ry gulph beneath,
Had I not heard a hautbois breath
A lively, but an uncouth strain,
As it appear'd from rustic swain,
Which, as it dwelt upon my ear,
Told me that merriment was near,
And did at once dispel the gloom
That might have sought a wat'ry tomb.
I turn'd my footsteps tow'rds the sound
That was now heard the valley round;
When soon upon the rural green,
The sight of busy mirth was seen.

Drawn by Rowlandson
Quæ Genus at a sheep shearing.

"With sights like these, I had been us'd
In early days to be amus'd
When I but wav'd my boyish hand
The rural groupes obey'd command,
When ev'ry rustic feast I grac'd
And was in highest station plac'd,
Though I did to no name aspire,
Yet I was nam'd the youthful 'Squire,
For Madam Syntax sake was shown
The honour which was not my own.
But now, such was my fortune's change,
A wand'rer I was left to range
I scarce knew where, and doom'd to wait
For what might be my future fate.
Thus I approach'd the busy throng,
And when I heard the joyous song,
Though, with a mingled sense of pain,
My flute pour'd forth a doubtful strain.
—'Twas a sheep-shearing that employ'd
The festive toil which all enjoy'd,
And I was welcom'd to receive
The bounties that the feast could give;
And while I did my carols play,
With flowers the maidens made me gay,
And as they gave my back a thump,
Each stuck a nosegay on my hump.
Here I must own, there's no concealing,
These compliments attack'd my feeling,
And I was deck'd out in a part,
Which on my back, was near my heart;
Yet, as sweet smiles shew'd the intent
That no offensive thought was meant,
I, with kind words and sprightly tune
Strove to repay the fragrant boon.
—The yeoman, master of the feast,

Was kind, and own'd me as his guest,
And as he view'd each added fleece
That did his summer wealth encrease,
He joyous made the toast go round
To the song's animating sound,
While the patient ewes grown light,
And eas'd of all their fleecy weight,
No more the shearer's hand restrain
But bound off to their hills again.
Such was the scene that did awhile
My bosom of its cares beguile,
For he must have a wretched heart
To whom those joys no joy impart,
Which others are beheld to feel
And to th' attentive eye reveal;
Nay, I must own that this night's pleasure,
Which revell'd in unbounded measure,
A kind, though short, oblivion shed
O'er my crook-back and thoughtful head:
Yes, brief it was, for soon again
My pleasure yielded to my pain,
And all the jocund, festive folly
Was then restor'd to melancholy.
The ale was good, my draughts were deep,
And, overcome by sudden sleep,
Upon a chair my head repos'd,
And soon my eyes were soundly clos'd.
Th' Exciseman, a smart, parish wit,
Thought he could make a funny hit,
And with his ochre red and black,
Drew a fierce face upon my back,
The thought, at least, was not quite civil,
With all the emblems of the devil.
He had display'd his humour's art
Upon a very tender part,
At least, my pride, as you must know,

Had to my fancy made it so.
When, by the roar caus'd by the joke,
I from the slumb'ring fit awoke;
Soon did I make th' Exciseman sick
Of such a mortifying trick:
His gauging-rod was heard to crack
In many a stroke upon his back,
Till, by his supplicating tone,
I found I had aveng'd my own.
But though the marks were brush'd with care,
By the same hand which trac'd them there;
And though I was most warmly prest,
By the kind master of the feast,
To pass another jovial day;
I felt offence and walk'd away.
"'Do what I can, go where I will,
This Hump's my evil genius still,
And serves in some odd way or other
My any sense of joy to smother.'
—Such was th' expression that my tongue
Would mutter as I trudg'd along.
—But Reason told me, cease your strife
With this companion of your life;
'Tis fix'd as fate, and you must wear it,
Therefore with resignation bear it.
It is, I own, an ugly tumour,
But you should treat it with good humour,
And still be pleas'd you cannot trace
Any mis-givings on your face.
The change you surely would not try
For a lame leg or squinting eye:
Though somewhat out of line your figure,
You still enjoy Health's active vigour:
All's right before, so never mind
A certain awkwardness behind;
F h t f t

For sure, when you present your front,
No eye can see a blemish on't.
With merry and good-humour'd folk,
Treat it, Oh treat it as a joke,
And if, by chance, you meet a fool
Who turns it into ridicule,
Tell him you'd rather have the feature,
Coarse as it is, than his ill-nature.
Take care that none who know you, find
An awkward hump within your mind:
Oh, let it be your constant care
To banish disproportion there,
And you will laugh with friends who crack
Chance-medley jokes upon your back!
Quæ Genus assisting a Traveller.
"To Reason I attention lent;
Th' advice was good,—and, strait or bent,
I now resolv'd to be content. }

"Thus, as I urg'd my onward way,
In spirits rather growing gay,
With saddle bags and all alone,
A sprightly horse came trotting on,
As if he had his rider thrown. }
The beast I, with some trouble, caught,
And then its fallen master sought,
Whom, within half a mile I found
All pale and stretch'd upon the ground:
When I approach'd, as in surprise,
He gave a groan and op'd his eyes.
A crystal brook ran murm'ring by,
Its cooling fluid to supply,
And soon its sprinklings did afford
The power that banish'd strength restor'd.
Thus, when re-mounted on his steed,
We did, in progress slow, proceed:
I cautious pac'd it by his side
With tighten'd rein the horse to guide;
And with attentive eye, prevent
Another downfall accident.
"We might have gone a mile or more,
When we beheld a lofty tower
That did in stately form arise,
A welcome sight to anxious eyes,
Marking a spot where might be found
Some styptic to a bleeding wound.
I shall be brief,—the Horseman's head
Was soon repos'd on downy bed;
The Surgeon came and he was bled: }
The lancet was by blisters follow'd,
And potions, in due order, swallow'd.
He look'd his thanks, then squeez'd my hand,

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Embedded Systems Second Edition D Sundaram R M Kothari Dwarkadas Pralhaddas N

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Embedded Systems Second Edition D Sundaram R M Kothari Dwarkadas Pralhaddas N