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![The Cortex-M55 processor was announced in February 2020. (Note: Helium technology is
not available in the Cortex-M33 processor).
Those extensions are optional. Additionally, a number of system-level features are also op-
tional in those processors. More detailed explanations are covered in subsequent chapters
about each of the system-level features.
The architecture specification document—called Armv8-M Architecture Reference Man-
ual [1]—is a public document that details the programmer’s model, instruction set architec-
ture (ISA), exception handling model, and debug architecture. However, this document does
not specify how the processors are built. For example, Armv8-M Architecture does not spec-
ify how many pipeline stages are needed, what bus interface design should be used, and what
the instruction cycle timing looks like.
1.4 Characteristics of the Cortex-M23 and Cortex-M33 processors
Both the Cortex-M23 and Cortex-M33 processors:
• are32-bitprocessors,with32-bitbusinterfacesandhavea32-bitarithmeticlogicunit(ALU).
• have a 32-bit linear address space, which supports up to 4GB of memories and peripherals.
• use a hardware unit called Nested Vectored Interrupt Controller (NVIC) for interrupt
management (includes peripheral interrupts and internal system exceptions).
• include various features for operating system (OS) support such as system tick timer,
shadowed stack pointers.
• include sleep mode support and various low-power optimization features.
• support separation of privileged and unprivileged execution levels, which allows the OS
(or other privileged software) to restrict unprivileged application tasks from accessing
critical system control resources.
• support the optional Memory Protection Unit (MPU), which allows the OS (or other
privileged software) to define memory spaces, which are accessible by each unprivileged
application tasks.
• can be used in a single processor or in multiprocessor designs.
• support a range of optional debug and trace features to enable software developers to
quickly analyze problems and bugs in application codes.
• support an optional TrustZone security extension to allow the software to be further
partitioned into different security domains.
There are also a number of differences between the two processors. The Cortex-M23
processor:
• is a two-stage Von-Neumann processor design. The main system bus is based on the
Advanced High-performance Bus (AHB) on-chip bus protocol from Advanced
Microcontroller Bus Architecture (AMBA®
) version 5.
• supports an optional single-cycle I/O interface (which is also available in the Cortex-M0+
processor). This interface allows some of the peripherals to be accessed with just one clock
cycle (the normal system bus is based on a pipelined on-chip bus protocol and needs a
minimum of two clock cycles per transfer).
5
1.4 Characteristics of the Cortex-M23 and Cortex-M33 processors](https://image.slidesharecdn.com/11063846-250527133157-4522a934/85/Definitive-Guide-To-Arm-Cortexm23-And-Cortexm33-Processors-Joseph-Yiu-26-320.jpg)
![1.11 Further reading
The Arm website is divided into a number of sections which has useful information on
various aspects of Arm Cortex-M processor products.
1.11.1 Product pages on developer.arm.com
This is the product information web page where you can find an overview of the products
and relevant links to the various parts of the Arm websites.
Web site
Cortex-M processor page https://developer.arm.com/products/processors/cortex-m/
Cortex-M23 processor page https://developer.arm.com/products/processors/cortex-m/cortex-m23
Cortex-M33 processor page https://developer.arm.com/products/processors/cortex-m/cortex-m33
M-Profile architecture https://developer.arm.com/products/architecture/m-profile
TrustZone https://developer.arm.com/ip-products/security-ip/trustzone
1.11.2 Documentation on developer.arm.com
There is a range of documents available on the Arm website that is useful for learning about
software development for the Cortex-M23 and Cortex-M33 processors. The main documen-
tation page is called developer.arm.com (https://developer.arm.com/documentation).
The key Cortex-M23/Cortex-M33 document that you find on the website includes:
Reference Document
[1] Armv8-M Architecture Reference Manual
This is the specification of the architecture on which the Cortex-M23 and Cortex-M33 processors are
based. It contains detailed information about the instruction set and about architecture defined
behaviors, etc.
[2] Cortex-M23 Device Generic User Guide
This is a user guide written for software developers using the Cortex-M23 processor. It provides
information on the programmer’s model, details on using core peripherals such as the NVIC and
general information about the instruction set.
[3] Cortex-M23 Technical Reference Manual
This is the specification of the Cortex-M23 processor. It gives information on the features that are
implemented and details some of the implementation-specific behaviors.
[4] Cortex-M33 Device Generic User Guide
This is a user guide written for software developers using the Cortex-M33 processor. It provides
information on the programmer’s model, details on using core peripherals such as the NVIC, and
general information about the instruction set.
Continued
15
1.11 Further reading](https://image.slidesharecdn.com/11063846-250527133157-4522a934/85/Definitive-Guide-To-Arm-Cortexm23-And-Cortexm33-Processors-Joseph-Yiu-36-320.jpg)
![Reference Document
[5] Cortex-M33 Technical Reference Manual
This is the specification of the Cortex-M33 processor. It gives information on the features that are
implemented and details some of the implementation-specific behaviors.
[6–9] Arm CoreSight™ MTB-M23/ETM-M23/MTB-M33/ETM-M33 Technical Reference Manual
These are the specifications for the instruction trace support components and are intended for debug
tool vendors only. Software developers do not need to read these documents.
The developer website also contains various application notes and additional useful doc-
umentation. One document I would like to highlight is the Procedure Call Standard for the
Arm Architecture (AAPCS), which is referenced in several sections of Chapter 17:
Reference Document
[10] Procedure Call Standard for the Arm Architecture
This document specifies how software code should work in interfunction calls. This information is often
needed for software projects with mixed assembly and C languages.
1.11.3 Community.arm.com
This section of the website allows website users, including Arm experts, to interact and
allows individuals (including companies) to post documents or other material relating to
Arm technologies. To make it easier for Arm website users to locate information about
Cortex-M processors, I have created and continue to maintain several blog pages in the
Arm Community website:
Reference Document
[11] Armv8-M Architecture Technical Overview
This whitepaper summarizes the architecture enhancements of the Armv8-M architecture and gives an
overview of how the TrustZone®
technology works. I have also included links to various useful
documents relating to the Armv8-M architecture.
[12] Cortex-M resources
I maintain a list of useful links to papers, videos, and presentations on various Cortex-M topics.
[13] Getting started with Arm Microcontroller Resources
This is an introductory page for people who want to start using Arm microcontrollers. The blog covers
entry-level information for Cortex-A, Cortex-R, and Cortex-M processors.
References
[1] Armv8-M Architecture Reference Manual. https://developer.arm.com/documentation/ddi0553/am
(Armv8.0-M only version). https://developer.arm.com/documentation/ddi0553/latest/ (latest version includ-
ing Armv8.1-M). Note: M-profile architecture reference manuals for Armv6-M, Armv7-M, Armv8-M and
Armv8.1-M can be found here: https://developer.arm.com/architectures/cpu-architecture/m-profile/docs.
[2] Arm Cortex-M23 Devices Generic User Guide. https://developer.arm.com/documentation/dui1095/latest/.
[3] Arm Cortex-M23 Processor Technical Reference Manual. https://developer.arm.com/documentation/
ddi0550/latest/.
[4] Arm Cortex-M33 Devices Generic User Guide. https://developer.arm.com/documentation/100235/latest/.
16 1. Introduction](https://image.slidesharecdn.com/11063846-250527133157-4522a934/85/Definitive-Guide-To-Arm-Cortexm23-And-Cortexm33-Processors-Joseph-Yiu-37-320.jpg)
![[5] Arm Cortex-M33 Processor Technical Reference Manual. https://developer.arm.com/documentation/100230/
latest/.
[6] Arm CoreSight MTB-M23 Technical Reference Manual. https://developer.arm.com/documentation/ddi0564/
latest/.
[7] Arm CoreSight ETM-M23 Technical Reference Manual. https://developer.arm.com/documentation/ddi0563/
latest/.
[8] Arm CoreSight MTB-M33 Technical Reference Manual. https://developer.arm.com/documentation/100231/
latest/.
[9] Arm CoreSight ETM-M33 Technical Reference Manual. https://developer.arm.com/documentation/100232/
latest/.
[10] Procedure Call Standard for the Arm Architecture (AAPCS). https://developer.arm.com/documentation/
ihi0042/latest/.
[11] Armv8-M Architecture Technical Overview. https://community.arm.com/developer/ip-products/
processors/b/processors-ip-blog/posts/whitepaper-armv8-m-architecture-technical-overview.
[12] Cortex-M resources. I maintain a list of useful links to papers, videos and presentations on various Cortex-M
topics. https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/cortex-
m-resources.
[13] GettingstartedwithArmMicrocontrollerResources.Thisisanintroductorypageforpeoplewhowanttostartusing
arm microcontrollers. The blog covers entry level information for Cortex-A, Cortex-R and Cortex-M processors.
https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/getting-started-
with-arm-microcontroller-resources.
17
References](https://image.slidesharecdn.com/11063846-250527133157-4522a934/85/Definitive-Guide-To-Arm-Cortexm23-And-Cortexm33-Processors-Joseph-Yiu-38-320.jpg)
![{
while ((UART_FLAG 0x40)==0); // No data, wait
return UART_DATA; // read character
}
As previously mentioned, this solution (defining each peripheral register as a pointer using
a C macro) is fine for simple applications. However, when there are multiple units of the same
peripherals available in the system, it will require defining registers for each of those periph-
erals, which can make code maintenance difficult. In addition, defining each register as an
individual pointer could result in a larger program size as each register address is stored
as a 32-bit constant in the program flash memory.
To simplify the code and to use program space more efficiently, we can define the periph-
eral register set as a data structure and then define the peripheral as a memory pointer to this
data structure (as shown in the following C program code).
Example of register-definition for a UART using a data structure and a memory pointer based on
this structure
typedef struct { // Base on Arm Primecell PL011
volatile unsigned long DATA; // 0x00
volatile unsigned long RSR; // 0x04
unsigned long RESERVED0[4];// 0x08 – 0x14
volatile unsigned long FLAG; // 0x18
unsigned long RESERVED1; // 0x1C
volatile unsigned long LPR; // 0x20
volatile unsigned long IBRD; // 0x24
volatile unsigned long FBRD; // 0x28
volatile unsigned long LCR_H; // 0x2C
volatile unsigned long CR; // 0x30
volatile unsigned long IFLS; // 0x34
volatile unsigned long MSC; // 0x38
volatile unsigned long RIS; // 0x3C
volatile unsigned long MIS; // 0x40
volatile unsigned long ICR; // 0x44
volatile unsigned long DMACR; // 0x48
} UART_TypeDef;
#define Uart0 ((UART_TypeDef *) 0x40003000)
#define Uart1 ((UART_TypeDef *) 0x40004000)
#define Uart2 ((UART_TypeDef *) 0x40005000)
/* ----- UART Initialization ---- */
void uartinit(void) // Simple initialization for Primecell PL011
{
Uart0-IBRD =40; // ibrd : 25MHz/38400/16 = 40
32 2. Getting started with Cortex-M programming](https://image.slidesharecdn.com/11063846-250527133157-4522a934/85/Definitive-Guide-To-Arm-Cortexm23-And-Cortexm33-Processors-Joseph-Yiu-53-320.jpg)
![Uart0-FBRD =11; // fbrd : 25MHz/38400 - 16*ibrd = 11.04
Uart0-LCR_H =0x60; // Line control : 8N1
Uart0-CR =0x301; // cr : Enable TX and RX, UART enable
Uart0-RSR =0xA; // Clear buffer overrun if any
}
/* ----- Transmit a character ---- */
int sendchar(int ch)
{
while (Uart0-FLAG 0x20); // Busy, wait
Uart0-DATA = ch; // write character
return ch;
}
/* ----- Receive a character ---- */
int getkey(void)
{
while ((Uart0-FLAG 0x40)==0); // No data, wait
return Uart0-DATA; // read character
}
In this example, as shown above, the Integer Baud Rate Divider (IBRD) register for UART
#0 is accessed by the symbol Uart0-IBRD and the same register for UART #1 is accessed by
Uart1-IBRD.
With this arrangement, the same register data structure for the UART peripheral can be
shared between multiple UARTs inside the chip, making code maintenance easier. In addi-
tion, the compiled code could be smaller due to the reduced requirement of the immediate
data storage.
With further modification, a function developed for the peripherals can be shared between
multiple units by passing the base pointer to the function:
Example of register-definition for a UART and driver code which support multiple UARTs using
passing of the base pointer as a parameter
typedef struct { // Base on Arm Primecell PL011
volatile unsigned long DATA; // 0x00
volatile unsigned long RSR; // 0x04
unsigned long RESERVED0[4];// 0x08 – 0x14
volatile unsigned long FLAG; // 0x18
unsigned long RESERVED1; // 0x1C
volatile unsigned long LPR; // 0x20
volatile unsigned long IBRD; // 0x24
volatile unsigned long FBRD; // 0x28
volatile unsigned long LCR_H; // 0x2C
volatile unsigned long CR; // 0x30
33
2.3 Introduction to Arm Cortex-M programming](https://image.slidesharecdn.com/11063846-250527133157-4522a934/85/Definitive-Guide-To-Arm-Cortexm23-And-Cortexm33-Processors-Joseph-Yiu-54-320.jpg)
Definitive Guide To Arm Cortexm23 And Cortexm33 Processors Joseph Yiu
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- 6. DEFINITIVE GUIDE TOARM® CORTEX® -M23 AND CORTEX-M33 PROCESSORS
- 7. About the imageon the book cover—Musca-S1 IoT demonstrator The image on the book cover is a photograph of the Musca-S1, a test chip board with two Arm Cortex- M33 processors, the Arm Corstone-200 foundation IP package and security IP components from the Arm CryptoCell-300 family. The Musca test chip and development board were developed for ecosys- tem enablement activities and for use as a reference platform to demonstrate the handling of Platform Security Architecture (PSA) level 1 certification and PSA Functional API certification. The Musca-S1 test chip is the industry’s first MRAM-enabled IoT SoC demonstrator. Further information about the Musca-S1 can be found on the Arm’s developer website: https://developer.arm.com/tools-and-software/development-boards/iot-test-chips-and-boards/ musca-s1-test-chip-board
- 8. DEFINITIVE GUIDE TO ARM® CORTEX® -M23 ANDCORTEX-M33 PROCESSORS JOSEPH YIU Distinguished Engineer, Automotive and IoT Line of Business, Arm, Cambridge, UK
- 9. Newnes is animprint of Elsevier The Boulevard, Langford Lane, Kidlington, Oxford OX5 1GB, United Kingdom 50 Hampshire Street, 5th Floor, Cambridge, MA 02139, United States © 2021 Elsevier Ltd. All rights reserved. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying, recording, or any information storage and retrieval system, without permission in writing from the publisher. Details on how to seek permission, further information about the Publisher’s permissions policies and our arrangements with organizations such as the Copyright Clearance Center and the Copyright Licensing Agency, can be found at our website: www.elsevier.com/permissions. This book and the individual contributions contained in it are protected under copyright by the Publisher (other than as may be noted herein). Notices Knowledge and best practice in this field are constantly changing. As new research and experience broaden our understanding, changes in research methods, professional practices, or medical treatment may become necessary. Practitioners and researchers must always rely on their own experience and knowledge in evaluating and using any information, methods, compounds, or experiments described herein. In using such information or methods they should be mindful of their own safety and the safety of others, including parties for whom they have a professional responsibility. To the fullest extent of the law, neither the Publisher nor the authors, contributors, or editors, assume any liability for any injury and/or damage to persons or property as a matter of products liability, negligence or otherwise, or from any use or operation of any methods, products, instructions, or ideas contained in the material herein. Library of Congress Cataloging-in-Publication Data A catalog record for this book is available from the Library of Congress British Library Cataloguing-in-Publication Data A catalogue record for this book is available from the British Library ISBN: 978-0-12-820735-2 For information on all Newnes publications visit our website at https://www.elsevier.com/books-and-journals Publisher: Mara Conner Acquisitions Editor: Tim Pitts Editorial Project Manager: Mariana C. Henriques Production Project Manager: Nirmala Arumugam Cover Designer: Greg Harris Typeset by SPi Global, India
- 10. Dedication This book isdedicated to my family, and, all the cats and dogs in the neighborhood that kept me entertained (but no more dead rats under my chair please!!)
- 11. This page intentionallyleft blank
- 12. Contents Preface xi Contributing author:Paul Beckmann xiii Acknowledgments xv 1. Introduction 1.1 Microcontrollers and processors 1 1.2 Classification of processors 3 1.3 The Cortex-M23 and Cortex-M33 processors and the Armv8-M architecture 3 1.4 Characteristics of the Cortex-M23 and Cortex-M33 processors 5 1.5 Why have two different processors? 6 1.6 Applications of the Cortex-M23 and Cortex-M33 7 1.7 Technical features 8 1.8 Comparison with previous generations of Cortex-M processors 8 1.9 Advantages of the Cortex-M23 and Cortex-M33 processors 11 1.10 Understanding microcontroller programming 14 1.11 Further reading 15 References 16 2. Getting started with Cortex-M programming 2.1 Overview 19 2.2 Some basic concepts 22 2.3 Introduction to Arm Cortex-M programming 29 2.4 Software development flow 41 2.5 Cortex Microcontroller Software Interface Standard (CMSIS) 44 2.6 Additional information on software development 50 Reference 51 3. Technical overview of the Cortex-M23 and Cortex-M33 processors 3.1 Design objectives of Cortex-M23 and Cortex-M33 processors 53 3.2 Block diagrams 54 3.3 Processor 57 3.4 Instruction set 58 3.5 Memory map 58 3.6 Bus interfaces 61 3.7 Memory protection 61 3.8 Interrupt and exception handling 62 3.9 Low power features 63 3.10 OS support features 64 3.11 Floating-point unit 64 3.12 Coprocessor interface and Arm Custom Instructions 65 3.13 Debug and trace support 65 3.14 Multicore system design support 66 3.15 Key feature enhancements in Cortex-M23 and Cortex-M33 processors 66 3.16 Compatibility with other Cortex-M processors 70 3.17 Processor configuration options 71 3.18 Introduction to TrustZone 71 3.19 Why TrustZone enables better security? 80 3.20 Firmware asset protection with eXecute-Only-Memory (XOM) 83 Reference 84 4. Architecture 4.1 Introduction to the Armv8-M architecture 85 4.2 Programmer’s model 87 4.3 Memory system 112 4.4 Exceptions and Interrupts 124 4.5 Debug 131 4.6 Reset and reset sequence 133 4.7 Other related architecture information 136 References 137 vii
- 13. 5. Instruction set 5.1Background 139 5.2 Instruction set features in various Cortex-M processors 141 5.3 Understanding the assembly language syntax 143 5.4 Use of a suffix in an instruction 147 5.5 Unified Assembly Language (UAL) 150 5.6 Instruction set—Moving data within the processors 151 5.7 Instruction set—Memory access 158 5.8 Instruction set—Arithmetic operations 182 5.9 Instruction set—Logic operations 185 5.10 Instruction set—Shift and rotate operations 185 5.11 Instruction set—Data conversions (extend and reverse ordering) 191 5.12 Instruction set—Bit field processing 193 5.13 Instruction set—Saturation operations 195 5.14 Instruction set—Program flow control 198 5.15 Instruction set—DSP extension 208 5.16 Instruction set—Floating point support instructions 219 5.17 Instruction set—Exception-related instructions 225 5.18 Instruction set—Sleep mode-related instructions 227 5.19 Instruction set—Memory barrier instructions 228 5.20 Instruction set—TrustZone support instructions 231 5.21 Instruction set—Coprocessor and Arm custom instructions support 232 5.22 Instruction set—Other functions 236 5.23 Accessing special registers with the CMSIS-CORE 240 References 243 6. Memory system 6.1 Overview of the memory system 245 6.2 Memory map 247 6.3 Memory types and memory attributes 251 6.4 Access permission management 254 6.5 Memory endianness 259 6.6 Data alignment and unaligned data access support 262 6.7 Exclusive access support 263 6.8 Memory ordering and memory barrier instructions 267 6.9 Bus wait state and error support 269 6.10 Single-cycle I/O port—Cortex-M23 only 270 6.11 Memory systems in microcontrollers 272 6.12 Software considerations 278 References 279 7. TrustZone support in the memory system 7.1 Overview 281 7.2 SAU and IDAU 283 7.3 Banked and nonbanked registers 285 7.4 Test Target (TT) instructions and region ID numbers 287 7.5 Memory protection controller and peripheral protection controller 292 7.6 Security aware peripherals 296 References 297 8. Exceptions and interrupts—Architecture overview 8.1 Overview of exceptions and interrupts 299 8.2 Exception types 303 8.3 Overview of interrupts and exceptions management 303 8.4 Exception sequence introduction 307 8.5 Definitions of exception priority levels 310 8.6 Vector table and vector table offset register (VTOR) 315 8.7 Interrupt input and pending behaviors 318 8.8 Target states of exceptions and interrupts in TrustZone systems 322 8.9 Stack frames 325 8.10 EXC_RETURN 335 8.11 Classification of synchronous and asynchronous exceptions 340 References 340 9. Management of exceptions and interrupts 9.1 Overview of exception and interrupt management 341 9.2 Details of the NVIC registers for interrupt management 346 viii Contents
- 14. 9.3 Details ofSCB registers for system exception management 354 9.4 Details of special registers for exception or interrupt masking 362 9.5 Vector table definition in programming 369 9.6 Interrupt latency and exception handling optimizations 373 9.7 Tips and hints 378 References 380 10. Low power and system control features 10.1 The quest for low power 381 10.2 Low power features in the Cortex-M23 and Cortex-M33 processors 383 10.3 More on WFI, WFE, and SEV instructions 395 10.4 Developing low power applications 401 10.5 System Control Block (SCB) and system control features 404 10.6 Auxiliary Control Register 413 10.7 Other registers in the System Control Block 415 11. OS support features 11.1 Overview of the OS support features 417 11.2 SysTick timer 418 11.3 Banked stack pointers 427 11.4 Stack limit checking 432 11.5 SVCall and PendSV exceptions 436 11.6 Unprivileged execution level and the Memory Protection Unit (MPU) 444 11.7 Exclusive access 446 11.8 How should an RTOS run in a TrustZone environment? 448 11.9 Concepts of RTOS operations in Cortex-M processors 450 References 462 12. Memory Protection Unit (MPU) 12.1 Overview of the MPU 463 12.2 MPU registers 466 12.3 Configuration of the MPU 474 12.4 TrustZone and MPU 482 12.5 Key differences between the MPU in Armv8-M architecture and the architecture of the previous generations 484 References 485 13. Fault exceptions and fault handling 13.1 Overview 487 13.2 Cause of faults 489 13.3 Enabling fault exceptions 496 13.4 Fault handler designs considerations 497 13.5 Fault status and other information 499 13.6 Lockup 507 13.7 Analysis of fault events 509 13.8 Stack trace 512 13.9 Fault handler to extract stack frame and display fault status 514 Reference 517 14. The Floating-Point Unit (FPU) in the Cortex-M33 processor 14.1 Floating-point data 519 14.2 Cortex-M33 Floating-point Unit (FPU) 524 14.3 Key differences between the FPUs of the Cortex- M33 FPU and the Cortex-M4 539 14.4 Lazy stacking in details 540 14.5 Using the FPU 547 14.6 Floating-point exceptions 553 14.7 Hints and tips 556 References 557 15. Coprocessor interface and Arm Custom Instructions 15.1 Overview 559 15.2 Overview of the architecture 565 15.3 Accessing coprocessor instructions via intrinsic functions in C 566 15.4 Accessing Arm Custom Instructions via the intrinsic functions in C 568 15.5 Software steps to take when enabling the coprocessor and the Arm Custom Instructions 570 15.6 Coprocessor power control 571 15.7 Hints and tips 572 References 573 ix Contents
- 15. 16. Introduction tothe debug and trace features 16.1 Introduction 575 16.2 Debug architecture details 580 16.3 An introduction to debug components 596 16.4 Starting a debug session 633 16.5 Flash memory programming support 634 16.6 Software design considerations 635 References 635 17. Software development 17.1 Introduction 637 17.2 Getting started with the Keil Microcontroller Development Kit (MDK) 639 17.3 Procedure Call Standard for the Arm Architecture 679 17.4 Software scenarios 681 References 683 18. Secure software development 18.1 Overview of Secure software development 685 18.2 TrustZone technical details 688 18.3 Secure software development 701 18.4 Creating a Secure project in Keil MDK 720 18.5 CMSE support in other toolchains 731 18.6 Secure software design considerations 733 References 750 19. Digital signal processing on the cortex-M33 processor 19.1 DSP on a microcontroller? 751 19.2 Why use a Cortex-M processor for a DSP application? 752 19.3 Dot product example 754 19.4 Getting more performance by utilizing the SIMD instructions 757 19.5 Dealing with overflows 759 19.6 Introduction to data types for signal processing 761 19.7 Cortex-M33 DSP instructions 765 19.8 Writing optimized DSP code for the Cortex-M33 processor 779 References 798 20. Using the Arm CMSIS-DSP library 20.1 Overview of the library 799 20.2 Function naming convention 801 20.3 Getting help 802 20.4 Example 1—DTMF demodulation 802 20.5 Example 2—Least squares motion tracking 813 20.6 Example 3—Real-time filter design 818 20.7 How to determine the implemented instruction set features in a Cortex-M33 based system 845 References 847 21. Advanced topics 21.1 Further information on stack memory protection 849 21.2 Semaphores, load-acquire and store-release instructions 851 21.3 Unprivileged interrupt handler 854 21.4 Re-entrant interrupt handler 859 21.5 Software optimization topics 865 Reference 876 22. Introduction to IoT security and the PSA Certified™ framework 22.1 From processor architecture to IoT security 877 22.2 Introduction of PSA Certified 878 22.3 The Trusted Firmware-M (TF-M) project 889 22.4 Additional information 895 References 896 Index 897 The Appendix section of this book, covering information about debug and trace connector layouts and the graphical representations of DSP instructions, is available on the companion website for this book at https://www.elsevier.com/ books-and-journals/book-companion/ 9780128207352. x Contents
- 16. Preface It has beena while since the last Definitive Guide to Arm® Cortex® -M Processor book was released. Now, Cortex-M23- and Cortex-M33-based products are arriving in the market and many of them provide so- phisticated security features—the definition of “modern microcontrollers” seems to have taken a big step forward. Although the mechanisms of these security features are tai- lored for small silicon devices with a low power footprint, many of these security tech- nologies are, in principle, similar to high-end computing systems. While security is a very broad topic, a key aspect of security in billions of connected de- vices is the “Root of Trust,” such as secret keys and secure boot mechanisms—all of which need to be protected. With Arm TrustZone® technology, which is supported by the Cortex-M23 and Cortex-M33 proces- sors, these security-critical assets can be protected in a secure processing environ- ment (Secure world). At the same time, ap- plications running in the normal processing environment (Non-secure world) can be de- veloped easily and are able to utilize security features provided by the secure firmware. Together with other Arm projects, such as the Platform Security Architecture (PSA) and Trusted Firmware-M, software devel- opers are able to easily create software for se- cure IoT products. The interaction between Secure and Non- secure software components brings a new di- mension of complexity to the architecture. While Non-secure software development is still very similar to that which was needed on previous Cortex-M processors, Secure software developers creating secure firm- ware now need to be familiar with a range of new architectural features that have been introduced in the Armv8-M architecture. Unlike previous editions of the Definitive Guides to Arm Cortex-M Processor, this book is focused on the architecture of the Arm Cortex-M23 and Cortex-M33 processors. To enable software developers to create secure solutions based on the Armv8-M architecture, there is a need, as provided in this book, to provide an in-depth explanation of the archi- tectural features which are currently not avail- able elsewhere. As a result, the amount of coverage given to application-level examples and guidance on using development tools is reduced to keep the size of this book manage- able. Since application-level examples and ap- plication notes for various tools are available from other parties, those materials should sat- isfy the demand for those aforementioned areas that this book does not cover. Hopefully, you will find this book useful and well worth reading. Joseph Yiu xi
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- 18. Contributing author: PaulBeckmann Paul Beckmann’s contribution to Chapters 21 and 22 of the Definitive Guide to Arm Cortex-M3 and Cortex-M4 processor has been used in Chapters 19 and 20 of my latest book. I have added new material to these chapters and this includes examples of a real-time filter based on the CMSIS-DSP library. Paul Beckmann is the founder of DSP Concepts, an engineering services company that specializes in DSP algorithm development and supporting tools. He has many years of expe- rience developing and implementing numerically intensive algorithms for audio, communi- cations, and video. Paul has taught industry courses on digital signal processing and holds a variety of patents in processing techniques. Prior to founding DSP Concepts, Paul spent 9 years at Bose Corporation and was involved in R&D and product development activities. xiii
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- 20. Acknowledgments I would liketo thank my friends who have been extremely supportive during this book project, especially Ivan who spent 5 months helping me proofread it. (He did not know how bad my writing was when he agreed to help … Sorry!) I would like to thank the Arm marketing teams for their support on this project, also Thomas Grocutt in Arm Research for provid- ing technical information for Secure soft- ware, Sanjeev Sarpal in Advanced Solutions Nederland B.V. for providing support in the digital filter design topic, and Paul Beckmann from DSP Concepts who contrib- uted to the chapters covering digital signal processing. And of course, thanks to all the readers who gave me feedback on my previous books, which was a great help and assisted me when preparing to write this new book. Finally, thanks to the staff at Elsevier whose input had enabled this book to be published. Regards, Joseph Yiu xv
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- 22. C H AP T E R 1 Introduction 1.1 Microcontrollers and processors Processors are used in a majority of electronic products: phones, televisions, remote controls, home appliances, electronic toys, computers and their accessories, transportation, building security and safety systems, bank cards, etc. In many cases, those processors are placed inside chips called microcontrollers, which are designed to serve a wide range of ap- plications. Microcontrollers are programmable, which require software developers to write software that runs on those chips. Quite often we call these products embedded systems, as the chips inside the products are usually well hidden. In order to allow microcontrollers to interact with external environments, they contain a range of functional blocks called peripherals. For example, an analog to digital converter (ADC) allows external voltage signals from sensors to be measured, and a Serial Peripheral Interface (SPI) allows an external LCD display module to be controlled. Different microcon- trollers have different peripherals and microcontrollers from different vendors can have sim- ilar peripherals, but with different programmer’s model and features. To collect and process the data from peripherals and to control various interfaces, we need to have processors in microcontrollers and software that runs on those processors. In addition to the processor, there are many other components inside a microcontroller. Fig. 1.1 shows the common components in a microcontroller. In the diagram there are a lot of acronyms. They are explained in Table 1.1. Some complex microcontroller products can contain a lot more components. In many instances, there are also Direct Memory Access (DMA) controllers, data cryptography accel- erators, and complex interfaces like a USB and an ethernet. Some microcontrollers can also contain more than one processor. Different microcontroller products can have different processors, memory sizes, periph- erals, packages, etc. So, even for two microcontrollers that have the same processor inside, they can have different memory maps and peripheral registers. As a result, to carry out the same application function, the program codes required for different microcontroller products can be completely different. 1 Definitive Guide to Arm® Cortex® -M23 and Cortex-M33 Processors # 2021 Elsevier Ltd. All rights reserved. https://doi.org/10.1016/B978-0-12-820735-2.00001-9
- 23. Processor Main System Businfrastructure Flash Memory SRAM Crystal Oscillator(s) PLL Bus Bridge GPIO Timer UART SPI I2C I2S ADC RTC Power Management DAC PWM Manufacturing Test support Boot ROM Voltage regulator Watchdog Timer System Control I/O Pads Peripheral Bus Infrastructure System analog components Digital Peripherals Analog / Mixed Signal Peripherals Digital logic Memories FIG. 1.1 A simple microcontroller. TABLE 1.1 Typical components in a microcontroller. Item Descriptions ROM Read-Only Memory: Nonvolatile memory storage for program code. Flash memory A special type of ROM that can be reprogrammed many times, typically for storing program code. SRAM Static Random Access Memory: for data storage (volatile) PLL Phase Lock Loop: a device to generate a programmable clock frequency based on a reference clock. RTC Real-Time Clock: a low power timer for counting seconds (typically runs on a low power oscillator) and, in some cases, it also has minutes, hours, and calendar functions. GPIO General Purpose Input/Output: a peripheral with a parallel data interface to control external devices and to read back the status of external signals. UART Universal Asynchronous Receiver/Transmitter: a peripheral to handle data transfers in a simple serial data protocol. I2C Inter-Integrated Circuit: a peripheral to handle data transfers in a serial data protocol. Unlike UART, a clock signal is required which can also provide a higher data rate. SPI Serial Peripheral Interface: another serial communication interface for off-chip peripherals. I2S Inter-IC Sound: a serial data communication interface specifically for audio information PWM Pulse Width Modulator: a peripheral to output waveform with a programmable duty cycle. ADC Analog to Digital Converter: a peripheral to convert analog signal level information into digital form. DAC Digital to Analog Converter: a peripheral to convert data values to analog signals. Watchdog timer A programmable timer device for ensuring the processor is running a program. When enabled, the program running needs to update the watchdog timer within a certain time gap. If the program crashes, the watchdog times out and this can then be used to trigger a reset or a critical interrupt event. 2 1. Introduction
- 24. 1.2 Classification ofprocessors There are many different types of processors and many ways of classifying them. A simple classification method is based on the width of the data path (e.g., the data path in an ALU or in a register bank). Using this method, we see 8-bit, 16-bit, 32-bit, and 64-bit processors. Another classification method is based on their applications. For example, Arm® classify their proces- sor products into: Application processors: These include processors that are used as the main processor in computers, servers, tablets, mobile phones, and smart TVs. Normally those processors support full-feature OS such as Linux, Android™, Windows™, and have a user interface to allow users to operate the device. Typically, these processors run at a high clock frequency and deliver a very high performance. Real-time processors: Real-time processors are often found in systems that need high performance, but do not require a full-feature OS, and might be well hidden inside the prod- uct. In many cases, Real-time Operating Systems (RTOSs) are being used in those processors for task scheduling and intertask messaging. Applications of real-time processors can be found in baseband modems in phones, specialized microcontrollers in automotive systems, and controllers in hard disk drives or solid-state disks (SSDs). Microcontroller processors: Microcontroller processors are found in most microcontroller products (although some microcontrollers might use application processors or real-time processors instead). The design of these processors is usually focused on low power and fast responsiveness rather than processing power or data processing throughput. In some cases, the design needs to be extremely low power, or low cost, or both at the same time. To cover these different requirements, Arm developed multiple processor product families: • Cortex® -A processors for the application processor market • Cortex-R processors for the real-time processor market • Cortex-M processors for the microcontroller processor market In 2018, Arm released a separate product line called Neoverse™, which is a processor product line for servers and infrastructure products. In some chip designs, it is possible to see a combination of different processors. For exam- ple, a chip designed for Network Attached Storage (NAS) devices might contain: • Cortex-R processors for handling data storage management, • One or more Cortex-A processor(s) for running network protocol processing and embedded server software to support a web-based administration interface, and • Cortex-M processors for power management. 1.3 The Cortex-M23 and Cortex-M33 processors and the Armv8-M architecture The Cortex® -M23 and Cortex-M33 processors are designed by Arm® (https://www.arm. com) and were announced at Arm TechCon in October 2016. Silicon products based on these two processors arrived in the market during 2018. 3 1.3 The Cortex-M23 and Cortex-M33 processors and the Armv8-M architecture
- 25. The Cortex-M23 andCortex-M33 processors are based on a processor architecture version called Armv8-M, which was announced in 2015. This architecture version is a successor to the previous Armv6-M and Armv7-M architectures, which were used in a number of very suc- cessful Cortex-M processor products (Fig. 1.2). Previously, there were two versions of architecture for the Cortex-M processors: • Armv6-M architecture: Designed for ultra-low-power applications. Supports a small, compact instruction set and is suitable for general data processing and I/O control tasks. • Armv7-M architecture: Designed for mid-range and high-performance systems. This architecture supports a richer instruction set (a superset of the instructions in Armv6-M and has an optional floating-point and DSP extensions). The Armv8-M maintains a similar partitioning by splitting the architecture into two subprofiles: • Armv8-M Baseline: Architecture designed for ultra-low-power designs. The features and instruction set are a superset of Armv6-M. • Armv8-M Mainline: Architecture designed for mainstream and high-performance designs. The features and instruction set are a superset of Armv7-M. From an architectural specification point of view, Armv8-M Mainline is an extension of the Armv8-M Baseline architecture. There are other extensions in the architecture, including: • DSP instructions (including a range of single instruction multiple data (SIMD) operations), available in Mainline subprofile only. • A floating-point extension (includes the floating-point unit hardware and instructions), available in Mainline subprofile only. • A security extension called TrustZone® ; available for both Baseline and Mainline subprofiles. • Helium™ technology, a vector extension also known as M-profile Vector Extension (MVE). This was introduced in Armv8.1-M and is available in the Cortex-M55 processor. Armv6-M Architecture Armv7-M Architecture Armv8.x-M Architecture Mainlinesubprofile Baseline subprofile Cortex-M23 processor Cortex-M33 processor Cortex-M3 processor Cortex-M4 processor Cortex-M0 processor Cortex-M1 processor Cortex-M0+ processor Cortex-M7 processor Area optimized – ideal for ultra-low-power designs. Rich instruction set – ideal for main stream and high performance processor systems. Cortex-M35P processor Cortex-M55 processor FIG. 1.2 Evolution of architecture versions for Cortex-M processors. 4 1. Introduction
- 26. The Cortex-M55 processorwas announced in February 2020. (Note: Helium technology is not available in the Cortex-M33 processor). Those extensions are optional. Additionally, a number of system-level features are also op- tional in those processors. More detailed explanations are covered in subsequent chapters about each of the system-level features. The architecture specification document—called Armv8-M Architecture Reference Man- ual [1]—is a public document that details the programmer’s model, instruction set architec- ture (ISA), exception handling model, and debug architecture. However, this document does not specify how the processors are built. For example, Armv8-M Architecture does not spec- ify how many pipeline stages are needed, what bus interface design should be used, and what the instruction cycle timing looks like. 1.4 Characteristics of the Cortex-M23 and Cortex-M33 processors Both the Cortex-M23 and Cortex-M33 processors: • are32-bitprocessors,with32-bitbusinterfacesandhavea32-bitarithmeticlogicunit(ALU). • have a 32-bit linear address space, which supports up to 4GB of memories and peripherals. • use a hardware unit called Nested Vectored Interrupt Controller (NVIC) for interrupt management (includes peripheral interrupts and internal system exceptions). • include various features for operating system (OS) support such as system tick timer, shadowed stack pointers. • include sleep mode support and various low-power optimization features. • support separation of privileged and unprivileged execution levels, which allows the OS (or other privileged software) to restrict unprivileged application tasks from accessing critical system control resources. • support the optional Memory Protection Unit (MPU), which allows the OS (or other privileged software) to define memory spaces, which are accessible by each unprivileged application tasks. • can be used in a single processor or in multiprocessor designs. • support a range of optional debug and trace features to enable software developers to quickly analyze problems and bugs in application codes. • support an optional TrustZone security extension to allow the software to be further partitioned into different security domains. There are also a number of differences between the two processors. The Cortex-M23 processor: • is a two-stage Von-Neumann processor design. The main system bus is based on the Advanced High-performance Bus (AHB) on-chip bus protocol from Advanced Microcontroller Bus Architecture (AMBA® ) version 5. • supports an optional single-cycle I/O interface (which is also available in the Cortex-M0+ processor). This interface allows some of the peripherals to be accessed with just one clock cycle (the normal system bus is based on a pipelined on-chip bus protocol and needs a minimum of two clock cycles per transfer). 5 1.4 Characteristics of the Cortex-M23 and Cortex-M33 processors
- 27. • supports asubset of the instructions defined in the Armv8-M architecture (i.e., Baseline subprofile). The Cortex-M33 processor: • is a three-stage pipeline design with Harvard bus architecture support. It has two main bus interfaces (based on AMBA 5 AHB) which allow instruction and data accesses to be carried out at the same time. There is also a separate AMBA Advanced Peripheral Bus (APB) interface for extending the debug subsystem. • supports an optional coprocessor interface. This interface allows chip designers to add hardware accelerators that are tightly coupled to the processor for the acceleration of specialized processing operations. • supports instructions defined in the Armv8-M Mainline subprofile, including optional DSP instructions and optional single-precision floating-point instructions. In October 2019, Arm announced that the future release of the Cortex-M33 processor will support Arm Custom Instructions. This new optional feature will enable chip designers to optimize their products for a range of specialized data processing operations. Traditionally, Arm processors are defined as Reduced Instruction Set Computing (RISC) ar- chitecture. However, with the instruction set in Arm processors having evolved over a number of years, the number of instructions supported by the Cortex-M33 processor is quite high com- pared to classic RISC processors. At the same time, some of the Complex Instruction Set Com- puting (CISC) processors are designed with pipeline structures similar to RISC processors. As a result, the boundary between RISC and CISC has become blurred and somewhat nonapplicable. 1.5 Why have two different processors? Both the Cortex-M23 and the Cortex-M33 processors are based on Armv8-M architecture and support the TrustZone security extension. They also share many common features. How- ever, they are also different in the following areas: Cortex-M23 processor: • The Cortex-M23 processor is much smaller than the Cortex-M33 (up to 75% smaller in typical configurations). • The Cortex-M23 processor is 50% more energy efficient than the Cortex-M33 in simple data processing tasks (measured by running Dhrystone benchmark). • The Cortex-M23 processor supports an optional single-cycle I/O for low latency peripheral access. Cortex-M33 processor: • The Cortex-M33 processor is around 50% faster than Cortex-M23 at the same clock frequency (measured by running Dhrystone and CoreMark® benchmarks). • The Cortex-M33 processor supports an optional DSP extension and an optional single precision floating point unit (These features are not available on the Cortex-M23 processor). 6 1. Introduction
- 28. • The Cortex-M33supports an optional coprocessor interface to enable chip designers to add hardware accelerators, and supports the Arm Custom Instructions feature. There are also some additional differences in system-level features, such as fault handling exceptions. The reason for separating the Cortex-M23 (Armv8-M Baseline) and the Cortex-M33 (Armv8-M Mainline) is that there are many different types of embedded systems and they have very different and diverse requirements. In many cases, the processors inside those systems only need to perform simple data processing or control tasks. And, potentially, some of these systems need to be extremely low power. For example, when an energy harvesting method is used to provide the energy for the processor system. In such a case, a simple processor is sufficient and the Cortex-M23 processor would suffice for those applications. In other cases, where processing requires higher performance, especially where data cal- culations need to be frequently carried out in a floating-point format, the Cortex-M33 proces- sor would be the one to go for. There are also some applications where the requirement could be met by using the Cortex-M23, the Cortex-M33, as well as other Cortex-M processors. In these instances, the selection decision could be based on the peripherals available on the chip, on other system-level features, and on product pricing, etc. 1.6 Applications of the Cortex-M23 and Cortex-M33 The Cortex-M23 and Cortex-M33 processors are both very versatile and can be used in a wide range of applications. Microcontrollers: Cortex-M processors are widely used in microcontroller products, par- ticularly designs that are focused on a range of Internet-of-Things (IoT) applications. In some of these products, the TrustZone security extension is utilized to enhance the security of the system. These processors can also be used in other microcontroller applications, including consumer products (e.g., touch sensors, audio control), information technologies (e.g., com- puter accessories), industrial systems (e.g., motor controls, data acquisitions), fitness/medical devices (e.g., health monitoring). The low gate count nature of the Cortex-M23 processor makes it particularly suitable for a wide range of low-cost consumer products like home appliances and smart lighting. Automotive: A range of specialized microcontroller products that are built for applications that have very high functional safety requirements, such as those required in the automotive industry. The Cortex-M23 and Cortex-M33 processors are designed to provide real-time re- sponsiveness, which is critical in some of those systems. In addition, the Memory Protection Unit (MPU) in Cortex-M processors enables a high-level of robustness for system-level oper- ations. Furthermore, the Cortex-M23 and Cortex-M33 processors were tested extensively to ensure their functional correctness in various conditions. In recent years, the automotive in- dustry increased its security requirements due to the increased connectivity in cars and to fight against crime (i.e., car theft and hacking). The TrustZone security extension in the Cortex-M23 and Cortex-M33 processors is an important feature that enables automotive system designers to create more dedicated security measures in defense of such attacks. 7 1.6 Applications of the Cortex-M23 and Cortex-M33
- 29. Data communication: Today’sdatacommunication systemscan befairly complex and, at the same time, are battery powered, thus requiring extremely good energy efficiency. Many of these systemshaveprocessor(s)embeddedinsidetohandlefunctionssuchascommunicationchannel management, encoding, and decoding of communication packets, as well as power manage- ment. The energy efficiency and performance of the Cortex-M processors makes them ideal for those applications. Some of the instructions in the Cortex-M33 processor (like bit field oper- ations) make it particularly useful for communication packet processing tasks. Today, many Bluetooth and ZigBee controllers are based on Cortex-M processors. As the security require- ments in IoT applications increase, the TrustZone security extension in Cortex-M23 and Cortex-M33 processors have become very attractive because security-sensitive information can be protected without any significant increase in the software overhead. System-on-Chips (SoC): Although many application SoCs used in mobile phones and tab- lets use Cortex-A processors (a different range of Arm applications processors which have a much higher level of performance), they also often contain Cortex-M processors for use in various subsystems, e.g., for functions like power management, offloading of peripheral man- agement (e.g., audio), finite state machine (FSM) replacement, and sensor hubs. The Cortex-M processors are designed to support a wide range of multicore design scenarios and, with the introduction of TrustZone for Armv8-M, enables even better integration with the TrustZone support that exists on the Cortex-A processors. Mixed-signal applications: An emerging range of products like smart sensors, Power Management IC (PMIC), and Microelectromechanical systems (MEMS) now also include pro- cessors to provide additional intelligence like calibration, signal conditioning, event detec- tion, and error detection. The low gate count and low power nature of the Cortex-M23 processor make it ideal for most of those applications. In other applications like smart micro- phones, a level of digital signal processing (DSP) capability is needed and the Cortex-M33 processor is therefore often more suitable. Today, there are more than 3000 microcontroller parts based on Arm Cortex-M processors. Since the Cortex-M23 and Cortex-M33 processors are new, the number of devices that are presently available based on these two processors is relatively low. However, it is expected that these two processors will in time become much more common. 1.7 Technical features Table 1.2 is a summary of the key technical features of the Cortex-M23 and Cortex-M33 processors. 1.8 Comparison with previous generations of Cortex-M processors The Cortex-M processors have been available for quite a long time (over 10 years). The oldest Cortex-M processor is the Cortex-M3, which was announced in 2004. The Cortex-M processors have been tremendously successful; most microcontroller vendors build their mi- crocontroller products using Cortex-M processors and use these processors in a range of multicore System-on-Chips (SoC), Application Specific Integrated Circuits (ASIC), Applica- tion Specific Standard Products (ASSP), sensors, etc. 8 1. Introduction
- 30. Although the previousrange of Cortex-M processors fully satisfied the requirement of many applications, there has, in recent years, been a need to enhance the Cortex-M processors to address new challenges in: • Security • Flexibility • Processing capability • Energy efficiency As a result, the Cortex-M23 and Cortex-M33 processors were developed. The Cortex-M23 processor contains many enhancements over the previous Cortex-M0 and Cortex-M0+ pro- cessors (Fig. 1.3). The instruction set enhancements from Armv6-M to Armv8-M Baseline include: • Signed and unsigned integer divide instructions. • Two compare-and-branch instructions (both 16 bits) and a 32-bit branch instruction (supports a larger branch range). TABLE 1.2 Key features of the Cortex-M23 and Cortex-M33 processors. Cortex-M23 Cortex-M33 Architecture Baseline instructions Mainline instructions (extension) DSP extension Floating-point extension Armv8-M Baseline subprofile Y – – – Armv8-M Mainline subprofile Y Y Optional Optional (single precision) Hardware Bus architecture Pipeline Main bus interface Other bus interface Coprocessor and Arm Custom Instructions support Von Neumann Two stages 132-bit AHB5 Single-cycle I/O interface – Harvard Three stages 232-bit AHB5 Private peripheral bus (PPB) for debug components Support up to eight coprocessors/accelerators Nested Vectored Interrupt Controller (NVIC) Interrupt support Programmable priority levels Non-Maskable Interrupt (NMI) Yes Up to 240 interrupts 2 bits (four levels) Yes Yes Up to 480 interrupts 3–8-bits (8–256 levels) Yes Low power support (sleep modes) Yes Yes OS support SysTick (system tick) timer Shadow stack pointers Memory Protection Unit (MPU) Yes Optional (up to 2) Y Optional (4/8/12/16 regions) Yes Yes (up to 2) Y Optional (4/8/12/16 regions) TrustZone security extension Security Attribution Unit (SAU) Custom attribution unit support Optional 0/4/8 regions Yes Optional 0/4/8 regions Yes 9 1.8 Comparison with previous generations of Cortex-M processors
- 31. • Additional MOV(move) instructions for immediate data generation. • Exclusive access instructions for semaphore operations. • Load acquire, store release instructions for C11 atomic data support. • Instructions that are required for the TrustZone security extension. Similarly, the Cortex-M33 also has a number of enhancements when compared to the Cortex-M3 and Cortex-M4 processors (Fig. 1.4). The instruction set enhancements from the Cortex-M4 (Armv7-M) to Armv8-M Mainline include: • Floating-point instructions upgraded from FPv4 architecture to FPv5. • Load acquire, store release instructions for C11 atomic data support. • Instructions that are required for the TrustZone security extension. In addition, both the Cortex-M23 and Cortex-M33 processors have a range of other en- hancements from a chip-level design point of view. For example: • Better flexibility in design configuration options. • Better low power support with new multiple power-domain control interfaces. Although there are many different enhancements, migration of most applications from the previous Cortex-M processors to the new processors should be straightforward because: • They are still based on 32-bit architecture and have the same 4GB architecturally defined memory space partitioning. Processor internal components like NVIC and SysTick support the same programming model. • All instructions in previous processors are supported. Adding: • Unprivileged execution level • Memory Protection Unit (MPU) • Single cycle I/O interface • Micro Trace Buffer (MTB) Adding: • TrustZone(R) security extension • Instruction set enhancements • Increases number of interrupts • New MPU design • Stack limit checking (Secure stacks only) • Embedded Trace Macrocell (ETM) • Enhancements in debug components Armv6-M architecture Armv6-M architecture Armv8-M Baselinearchitecture FIG. 1.3 Key enhancements of the Cortex-M23 processor when compared with the Cortex-M0 and Cortex-M0+ processors. 10 1. Introduction
- 32. While the Armv8-Marchitecture is designed to be highly compatible with Armv6-M and Armv7-M architectures, software developers will still need to adapt their existing application software when migrating to the new microcontroller devices. For example, there could be software changes needed due to differences in the peripheral programmer’s models, memory map, etc. In addition, the development tools and Real Time Operating System (RTOS) will need to be updated to support these new processors. 1.9 Advantages of the Cortex-M23 and Cortex-M33 processors Similar to the previous Cortex-M processors, the Cortex-M23 and Cortex-M33 processors have a number of advantages compared to most other processors commonly used for microcontrollers, particularly when compared to legacy 8-bit and 16-bit designs. Small footprint: When comparing the Cortex-M23 and Cortex-M33 processors to most other 32-bit processors, Cortex-M processors are relatively small and, on average, have a very low power requirement. Although they are larger than 8-bit processors and some other 16-bit designs, especially when comparing 8-bit designs like the 8051 to the Cortex-M33 processor, the increase in the processor’s size is offset by a higher code density—which enables the same application to be carried out with a smaller program memory space. Since the area and power of the processor are often proportionately small when compared to the area and power of the overall microcontroller system (especially when compared to the area and power of flash Armv7-M architecture Armv7-M architecture Adding: • Floating point unit (single precision) • DSP instructions • Faster Multiply Accumulate (MAC) operations Adding: • TrustZone(R) security extension • Instruction set enhancements • Increases number of interrupts • New MPU design • Stack limit checking • Coprocessor interface • Arm Custom Instructions (from r1 in 2020) • Micro Trace Buffer (MTB) • Enhancements in debug components • Higher performance • Better energy efficiency Armv8-M Mainline architecture FIG. 1.4 Key enhancements of the Cortex-M33 processor when compared with the Cortex-M3 and Cortex-M4 processors. 11 1.9 Advantages of the Cortex-M23 and Cortex-M33 processors
- 33. memories and analogcomponents), the use of a 32-bit Cortex-M processor in a microcontrol- ler system does not greatly impinge on its cost or increase its power consumption. Low power: In addition to its small silicon size, the Cortex-M23 and Cortex-M33 proces- sors support a range of low power features. For example, architecturally, the processor sup- ports specialized instructions for entering sleep modes. And there is a range of design optimizations to reduce the power of the processors. For example, by stopping the clock or removing power to sections of the design when those sections are not in use. Performance: While the Cortex-M23 processor is one of the smallest 32-bit processors on the market, it can still deliver a performance of 0.98DMIPS/MHz (Dhrystone 2.1) and 2.5 CoreMark® /MHz, which is much higher than most 8-bit and 16-bit designs. Additionally, it does not significantly increase the system-level power and silicon area. For applications that need higher performance, the Cortex-M33 processor could be used instead as it offers an im- pressive performance of 1.5 DMIPS/MHz and 4.02 CoreMark/MHz. With the high through- put of these processors, the systems can complete their processing tasks faster and stay in sleep mode longer to save power. Or run the processor at a slower clock rate to reduce peak power consumption. Energy efficiency: Combining low power and great performance, the Cortex-M23 and Cortex-M33 are two of the most energy-efficient processors for a wide range of embedded applications. This enables a longer battery life, a smaller battery size, and allows a simpler power supply design at chip and circuit board level. In the past, the low-power capabilities of other Cortex-M processors had already been demonstrated using ULPMark™-CP from EEMBC® (http://www.eembc.org/ulpmark/). It is therefore expected that a number of new microcontroller devices based on the Cortex-M23 and Cortex-M33 processors will achieve similar or better results. Interrupt handling capabilities: All Cortex-M processors have an integrated Nested Vec- tored Interrupt Controller (NVIC) for interrupt handling. This unit and the processor core design supports low latency interrupt handling. For example, interrupt latency is only 15 clock cycles in the Cortex-M23 and 12 cycles in the Cortex-M33 processor. In order to re- duce the overhead of software executions, the reading of exception vectors (the starting ad- dresses of interrupt service routines), the stacking of essential registers, and the nesting of interrupt services are automatically handled by the hardware. The interrupt management fea- tures are also very flexible, e.g., all peripheral interrupts have programmable priority levels. All these characteristics make the Cortex-M processors suitable for many real-time applications. Security: With the TrustZone security extension, microcontroller vendors and chip de- signers can build a range of advanced security features for their IoT chip designs. By default, TrustZone technology supports two security domains (Secure and Non-secure), and with additional software, like Trusted Firmware-M, can create more security partitions in the software. Ease of use: The Cortex-M processors are designed to be easy to use. For example, most applications can be programmed in C language. Since the Cortex-M processors use 32-bit lin- ear addressing they can handle up to 4GB of address range and, by so doing, avoid a range of architectural limitations that are typically found in 8-bit and 16-bit processors (e.g., memory size and stack size restrictions and restrictions on re-entrant code). Typically, application soft- ware development environments (except when developing software running on the Secure side in a TrustZone environment) do not require a special C language extension. 12 1. Introduction
- 34. Code density: Comparedwith many other architectures, the instruction set used by Cortex-M processors (called Thumb instructions) offers very high code density. The Thumb instruction set contains both 16-bit and 32-bit instructions (most of the instructions supported by the Cortex-M23 processor are 16-bit), and, when they can, the C/C++ compilers will select the 16-bit version of the instruction to reduce program size while, at the same time generating a very efficient code sequence. The high code density enables applications to be fitted onto a chip with a small program memory, thus reducing cost and, potentially, reducing power, and chip package size. OS support: Unlike many legacy processors, the Cortex-M processors are designed to sup- port efficient OS operations. The architecture includes features like shadow stack pointers, system tick timers, and dedicated exceptions types for OS operations. Today, there are more than 40 different types of RTOS running on Cortex-M processors. Scalability: Cortex-M processors are highly scalable in two ways. First, most parts of the programmer’s models for these processors are consistent across different designs—from the smallest Cortex-M0 to the highest performance Cortex-M7 processor. This enables software code to be easily ported across different Cortex-M processors. The second aspect is that Cortex-M processors are designed to be very flexible, meaning that they can either be used in a single processor system (e.g., low-power and low-cost microcontrollers), or be part of a complex SoC design where the chips contain many processors working together. Software portability and reusability: The consistency of the architecture also gives rise to an important benefit of the Cortex-M processors: a high level of software portability and reusability. A range of Arm initiatives such as the Cortex Microcontroller Software Interface Standard (CMSIS) enhances this further by providing a consistent software interface for the various Cortex-M designs. This enables software vendors and developers to safeguard their investment in the long term, as well as enabling them to develop their products much quicker. Debug features: Cortex-M processors include many debug features that enable software developers to test their codes and easily analyze software problems. In addition to the halting of software execution, breakpoints, watchpoints, and single stepping, which are standard fea- tures in modern microcontrollers, the debug features present in Cortex-M processors also in- clude instruction trace, data trace, and profiling supports, which can be linked together in a multicore system to enable the easier debugging of multicore systems. The debug and trace features in the Cortex-M23 and the Cortex-M33 processors have been enhanced to make them more flexible compared to previous designs. Flexibility: The Cortex-M processor designs are configurable. Chip designers can, therefore, decide which optional features to add to the design during the chip design stage. This enables the design to achieve the best trade-off between functionality, cost, and energy efficiency. Software ecosystem: Cortex-M processors are supported by a wide range of software development tools, RTOS products, as well as other middleware (e.g., audio codec). In addi- tion to the numerous Cortex-M devices and development boards available, these software solutions enable software developers to create high-quality products in a short time frame. Quality: Arm processors are thoroughly tested to meet very high-quality levels and most Cortex-M processors, like the Cortex-M23 and Cortex-M33, are designed to be compliant with safety requirements. This enables Cortex-M microcontrollers to be used in a wide range of 13 1.9 Advantages of the Cortex-M23 and Cortex-M33 processors
- 35. automotive, industrial, andmedical applications. Cortex-M based products are also used in many safety-critical systems, including applicationsa for the space industry. 1.10 Understanding microcontroller programming If you have been programming on a desktop and learning how to program microcontroller systems, you might be surprised to find that programming microcontrollers are quite differ- ent from what you are used to, and what you have learned before. For example: • Most microcontroller systems do not have a graphic user interface (GUI). • The microcontroller system might not contain any operating system (typically this is called bare metal). Or, in some instances, a light-weight RTOS is used, which only manages task scheduling and intertask communication. Unlike desktop environments, many of these operating systems do not provide other system Application Programming Interface (API) for data communication and peripheral control. • In desktop environments, the applications access peripheral functions via APIs or device drivers provided in the OS. Whereas in microcontroller applications, it is not unusual to access the peripheral registers directly. However, most Cortex-M microcontroller vendors also provide device driver libraries to make it easier for software developers to create their applications. • Memory size and power consumption are constraining factors in many microcontroller systems. In contrast, the amount of memory and processing power in a desktop environment is significantly greater. • In desktop environments, the use of assembly language is quite rare, and most application developers use a wide range of high-level programming languages, including: Java/ JavaScript, C#, and Python. Today, most microcontroller projects are still based on C and C+ +. In some instances, a small portion of the software could be written in assembly language. To learn microcontroller programming on the Cortex-M processor family, you need: • Some experience in C language programming. Experience in using microcontroller programming tools certainly helps, but this is not always necessary. Compared to using legacy 8-bit and 16-bit microcontrollers, many people find that using microcontrollers based on the Cortex-M processors is far easier. • A basic understanding of electronics. Knowledge of electronics would be useful to understand some of the examples in this book. For example, understanding what a UART is would help because using a UART to connect to a computer to display a program’s operation results is a commonly used technique. • While not necessary, the experience of using Real-Time Operating Systems (RTOS) would help to understand some of the topics in this book. Most of the examples in this book are based on the Keil® Microcontroller Development Kit (Keil MDK). However, where relevant, a number of sections have information about the IAR™ Electronic Workbench for Arm (EWARM) and the gcc toolchain. a Example: VA10820 from Vorago Technologies (https://www.voragotech.com/products/va10820). 14 1. Introduction
- 36. 1.11 Further reading TheArm website is divided into a number of sections which has useful information on various aspects of Arm Cortex-M processor products. 1.11.1 Product pages on developer.arm.com This is the product information web page where you can find an overview of the products and relevant links to the various parts of the Arm websites. Web site Cortex-M processor page https://developer.arm.com/products/processors/cortex-m/ Cortex-M23 processor page https://developer.arm.com/products/processors/cortex-m/cortex-m23 Cortex-M33 processor page https://developer.arm.com/products/processors/cortex-m/cortex-m33 M-Profile architecture https://developer.arm.com/products/architecture/m-profile TrustZone https://developer.arm.com/ip-products/security-ip/trustzone 1.11.2 Documentation on developer.arm.com There is a range of documents available on the Arm website that is useful for learning about software development for the Cortex-M23 and Cortex-M33 processors. The main documen- tation page is called developer.arm.com (https://developer.arm.com/documentation). The key Cortex-M23/Cortex-M33 document that you find on the website includes: Reference Document [1] Armv8-M Architecture Reference Manual This is the specification of the architecture on which the Cortex-M23 and Cortex-M33 processors are based. It contains detailed information about the instruction set and about architecture defined behaviors, etc. [2] Cortex-M23 Device Generic User Guide This is a user guide written for software developers using the Cortex-M23 processor. It provides information on the programmer’s model, details on using core peripherals such as the NVIC and general information about the instruction set. [3] Cortex-M23 Technical Reference Manual This is the specification of the Cortex-M23 processor. It gives information on the features that are implemented and details some of the implementation-specific behaviors. [4] Cortex-M33 Device Generic User Guide This is a user guide written for software developers using the Cortex-M33 processor. It provides information on the programmer’s model, details on using core peripherals such as the NVIC, and general information about the instruction set. Continued 15 1.11 Further reading
- 37. Reference Document [5] Cortex-M33Technical Reference Manual This is the specification of the Cortex-M33 processor. It gives information on the features that are implemented and details some of the implementation-specific behaviors. [6–9] Arm CoreSight™ MTB-M23/ETM-M23/MTB-M33/ETM-M33 Technical Reference Manual These are the specifications for the instruction trace support components and are intended for debug tool vendors only. Software developers do not need to read these documents. The developer website also contains various application notes and additional useful doc- umentation. One document I would like to highlight is the Procedure Call Standard for the Arm Architecture (AAPCS), which is referenced in several sections of Chapter 17: Reference Document [10] Procedure Call Standard for the Arm Architecture This document specifies how software code should work in interfunction calls. This information is often needed for software projects with mixed assembly and C languages. 1.11.3 Community.arm.com This section of the website allows website users, including Arm experts, to interact and allows individuals (including companies) to post documents or other material relating to Arm technologies. To make it easier for Arm website users to locate information about Cortex-M processors, I have created and continue to maintain several blog pages in the Arm Community website: Reference Document [11] Armv8-M Architecture Technical Overview This whitepaper summarizes the architecture enhancements of the Armv8-M architecture and gives an overview of how the TrustZone® technology works. I have also included links to various useful documents relating to the Armv8-M architecture. [12] Cortex-M resources I maintain a list of useful links to papers, videos, and presentations on various Cortex-M topics. [13] Getting started with Arm Microcontroller Resources This is an introductory page for people who want to start using Arm microcontrollers. The blog covers entry-level information for Cortex-A, Cortex-R, and Cortex-M processors. References [1] Armv8-M Architecture Reference Manual. https://developer.arm.com/documentation/ddi0553/am (Armv8.0-M only version). https://developer.arm.com/documentation/ddi0553/latest/ (latest version includ- ing Armv8.1-M). Note: M-profile architecture reference manuals for Armv6-M, Armv7-M, Armv8-M and Armv8.1-M can be found here: https://developer.arm.com/architectures/cpu-architecture/m-profile/docs. [2] Arm Cortex-M23 Devices Generic User Guide. https://developer.arm.com/documentation/dui1095/latest/. [3] Arm Cortex-M23 Processor Technical Reference Manual. https://developer.arm.com/documentation/ ddi0550/latest/. [4] Arm Cortex-M33 Devices Generic User Guide. https://developer.arm.com/documentation/100235/latest/. 16 1. Introduction
- 38. [5] Arm Cortex-M33Processor Technical Reference Manual. https://developer.arm.com/documentation/100230/ latest/. [6] Arm CoreSight MTB-M23 Technical Reference Manual. https://developer.arm.com/documentation/ddi0564/ latest/. [7] Arm CoreSight ETM-M23 Technical Reference Manual. https://developer.arm.com/documentation/ddi0563/ latest/. [8] Arm CoreSight MTB-M33 Technical Reference Manual. https://developer.arm.com/documentation/100231/ latest/. [9] Arm CoreSight ETM-M33 Technical Reference Manual. https://developer.arm.com/documentation/100232/ latest/. [10] Procedure Call Standard for the Arm Architecture (AAPCS). https://developer.arm.com/documentation/ ihi0042/latest/. [11] Armv8-M Architecture Technical Overview. https://community.arm.com/developer/ip-products/ processors/b/processors-ip-blog/posts/whitepaper-armv8-m-architecture-technical-overview. [12] Cortex-M resources. I maintain a list of useful links to papers, videos and presentations on various Cortex-M topics. https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/cortex- m-resources. [13] GettingstartedwithArmMicrocontrollerResources.Thisisanintroductorypageforpeoplewhowanttostartusing arm microcontrollers. The blog covers entry level information for Cortex-A, Cortex-R and Cortex-M processors. https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/getting-started- with-arm-microcontroller-resources. 17 References
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- 40. C H AP T E R 2 Getting started with Cortex-M programming 2.1 Overview If you have never programmed a microcontroller before, welcome to the exciting world of microcontroller software development. Do not worry, it is not that difficult; Arm® Cortex® -M processors are very easy to use. This book covers many aspects of the processor’s architecture. However, you do not need to understand all of those aspects to develop most of the applications. If you have been using other microcontrollers you will find that programming with Cortex- M based microcontrollers is very straight forward. Almost everything can be programmed in C/C++ because most registers (e.g., peripherals) are memory mapped, and even interrupt handlers can be programmed fully in C/C++. Also, in most normal applications there is no need to use compiler-specific language extensions, which is required in the architecture of some other processors. As long as you have a basic understanding of the C programming language, you will very soon be able to develop and run simple applications on the Cortex-M23 and Cortex-M33 processors. Usually, the following tools/resources for developing applications on microcontrollers are: • Development suites (including compilation tools and debug environment software). • Development board with microcontroller(s). • Potentially, you might need a debug adaptor. Some development boards provided by MCU vendors have a USB debug adaptor built-in and can be connected directly to the USB port of your computer. • In some applications, you might need to use an embedded operating system (OS) and firmware packages, like communication software libraries. These are also known as middleware. A range of middleware solutions like Real-Time Operating Systems (RTOSs) is available from the open source community and are free to use. 19 Definitive Guide to Arm® Cortex® -M23 and Cortex-M33 Processors # 2021 Elsevier Ltd. All rights reserved. https://doi.org/10.1016/B978-0-12-820735-2.00002-0
- 41. • Depending onthe application, you might need additional electronic hardware (e.g., a motor driver circuit for motor control) and electronic equipment (e.g., multimeter, oscilloscope). 2.1.1 Development suites A number of development suites are available: • Commercial development suites such as Keil® Microcontroller Development Kit (Keil MDK, https://www.keil.com), IAR™ Embedded Workbench for Arm (EWARM, https://www. iar.com), Segger Embedded Studio (https://www.segger.com/embedded-studio.html), etc. • Open source toolchains like gcc (https://developer.arm.com/open-source/gnu- toolchain/gnu-rm) with Eclipse Embedded CDT (https://projects.eclipse.org/projects/ iot.embed-cdt). • Tool chains from microcontroller vendors. • Web-based development environments such as mbedOS (https://mbed.com). Some commercial toolchains offer a free trial version, but with limited code size support. Most of the software development examples in this book are based on Keil MDK. You can use toolchains from other vendors. While in most cases the C code should be reusable without modification, a number of projects that illustrate assembly or inline assembly would require modification when using a different toolchain. 2.1.2 Development board For beginners, it is easier to start by using development/evaluation boards from microcon- troller vendors. While it is possible to create your own development boards, it does require a deal of technical knowledge and a range of skills and equipment (e.g., soldering of tiny surface-mounted electronic components require specialized tools). A range of low-cost development kits are available for Cortex-M processors and typically they come with software packages that contain examples and support files (e.g., C header files and driver libraries for peripheral definitions). Worth noting is that some of the development boards are tied into having to use certain development tools. Some toolchains also offer instruction set simulator features which allow you to learn pro- gramming without real hardware. However, it might be impossible to emulate certain periph- eral features in a simulator and, additionally, real hardware development boards do allow you to hook up the application to external devices (e.g., motors, audio, display module). 2.1.3 Debug adaptor The debug interface of the Cortex-M processors provides access to debug features and flash programming support (for downloading compiled program images to the chip). Most Cortex-M microcontrollers feature a debug interface based on the Serial Wire debug (requires two pins on the chip) or the JTAG (four or five pins) protocols. A debug adaptor is needed to convert a USB/Ethernet interface to one of these debug protocols. A number of low-cost 20 2. Getting started with Cortex-M programming
- 42. development boards comewith an extra microcontroller which acts as a debug adaptor, and might also support a virtual COM port feature (Fig. 2.1). If the board you are using does not have a debug adaptor, you will need to use external debug adaptor hardware. There are a number of products available from Keil, IAR, Segger, and other companies at various price points and with differing feature lists (Fig. 2.2). Many of the development suites support multiple types of debug adaptors. If you are creating your own microcontroller boards, then you need to ensure the micro- controller can be easily connected to a debug adaptor. Please note that there is a range of stan- dardized connector arrangements and they are covered in Appendix A of this book. FIG. 2.1 The concept of common low-cost development boards. FIG. 2.2 Example of debug adaptors (Keil ULINK™2, Keil ULINKPro, IAR I-Jet, Segger J-Link). 21 2.1 Overview
- 43. 2.1.4 Resources After obtainingthe tools and the development board, remember to view the vendor’s website and download some of the reference materials that you might need: • Software packages, including header files, which provide definitions of peripheral registers and peripheral driver functions. • Example codes, tutorials. • Documentation about the microcontroller device and the development board. Most MCU vendors have online forums to allow you to post questions. If you have ques- tions about Arm products, such as processors and tools, you can post them on the Arm online forum called Arm Community (https://community.arm.com). 2.2 Some basic concepts If this is the first time you have used a microcontroller, read on. For readers who are already experienced with microcontroller applications, you can skip this part and move to Section 2.3. In Section 1.1 of Chapter 1, I covered what is inside a microcontroller. I now explain what is needed to get a microcontroller to work. 2.2.1 Reset A microcontroller needs to be reset to get to a known state before program execution starts. Reset is typically generated by a hardware signal from external sources. For example, you might find a reset button on the development board which generates a reset pulse using a simple circuit (Fig. 2.3) or, in some cases, the reset could be controlled by a more sophisticated FIG. 2.3 An example of a reset connection on a low-cost microcontroller board (it has been assumed that the reset pin is active low). 22 2. Getting started with Cortex-M programming
- 44. power monitoring IntegratedCircuit (IC). Most microcontroller devices have an input pin for reset. On Arm-based microcontrollers, the reset can also be triggered by a debugger connected to microcontroller boards. This allows software developers to reset the microcontroller via the Integrated Development Environment (IDE). Some debugger adaptors can generate a reset using a dedicated pin on their debug connectors. This reset signal can be connected to the microcontroller’s reset circuit and thus be controlled by the debugger via the debug connection. After the reset is released, the internal microcontroller hardware might need a little time (i.e., wait for the internal clock oscillator to become stabilized) before the processor can start executing programs. The delay is usually very short and is not noticeable by users. 2.2.2 Clocks Almost all processors and digital circuits (including peripherals) need clock signals to operate. Microcontrollers typically support an external crystal for reference clock generation. Some microcontrollers also have internal oscillators (however, the output frequency of some of the implementations like R-C oscillators can be fairly inaccurate). Many modern microcontrollers allow software to control which clock source is to be used and have programmable Phase Lock Loops (PLLs) and clock dividers to generate the various operation frequencies that are required. As a result, you might have a microcontroller circuit with an external crystal of just 12MHz, with the processor system running at a much higher clock speed (e.g., well over 100MHz) and some of the peripherals running at a divided clock speed. In order to save power, many microcontrollers also allow software to turn on/off individ- ual oscillators and PLLs and to also turn off the clock signal to each of the peripherals. Many microcontrollers also have an additional 32kHz crystal oscillator (the crystal can be an exter- nal component on the board) for the operation of a low-power real-time clock. 2.2.3 Voltage level All microcontrollers need power to run, so you will find power supply pins on a microcontroller. Most modern microcontrollers need a very low voltage and typically use 3volts (V). Some of them can even operate with supply voltage of less than 2V. If you are going to create your own microcontroller development board, or prototyping circuits, you need to check the datasheet of the microcontroller that you are using and deter- mine the voltage levels of the components that the microcontroller will be connected to. For example, some external interfaces, like a relay switch, might require 5V signaling, which would not work with a 3V output signal from a microcontroller. In this case, an additional driver circuit would be needed. When designing a microcontroller board, one should also make sure that the voltage sup- ply is regulated. Many mains to DC adaptors do not regulate the voltage output, which means the voltage level can constantly fluctuate, and, unless a voltage regulator is added, such an adaptor is not suitable for powering microcontroller circuits. 23 2.2 Some basic concepts
- 45. 2.2.4 Inputs andoutputs Unlike personal computers, many embedded systems do not have a display, keyboard, or mouse. The available inputs and outputs can be limited to simple interfaces, like buttons/key- pad, LEDs, buzzer, and maybe an LCD display module. This hardware is connected to the microcontroller using electronic interfaces such as digital and analog inputs and outputs (I/Os), UARTs, I2C, SPI, etc. Many microcontrollers also offer USB, Ethernet, CAN, graphic LCD, and SD card interfaces. These interfaces are handled by specialized peripherals. On Arm-based microcontrollers, peripherals are controlled by memory mapped registers (examples of peripheral accesses are covered in Section 2.3.2 in this chapter). Some of these peripherals are more sophisticated than peripherals available on 8-bit and 16-bit microcon- trollers and might have more registers to program during the peripheral setup. Typically, the initialization process for peripherals often consists of the following: I. Programming the clock control circuitry to enable the clock signal connected to the peripheral and, if needed, the corresponding I/O pins. In many low-power microcontrollers, the clock signals reaching different parts of the chip can be individually turned on or off for power saving. Typically, by default, most of the clock signals are turned off and need to be enabled before the peripherals are programmed. In some instances, you will also need to enable the clock signal for part of the bus system to access certain peripherals. II. Programming of I/O configurations. Most microcontrollers multiplex several functions into each of its I/O pins. In order for a peripheral interface to work correctly, the I/O pins assignments (e.g., configuration registers for the multiplexers) might need to be programmed. In addition, some microcontrollers also offer configurable electrical characteristics for the I/O pins. This results in additional I/O configuration steps. III. Programming of the Peripheral configuration. Since most interface peripherals contain a number of programmable registers to control their operations, a programming sequence is usually needed in order to initialize the peripheral and to get it to work correctly. IV. Programming of the Interrupt configuration. If a peripheral operation requires interrupt processing, additional configuration steps are required for the interrupt controller (e.g., the NVIC in the Cortex-M processor). Most microcontroller vendors provide peripheral/device driver libraries to simplify soft- ware development. Even though device driver libraries are available, there might still be a fair amount of low-level programming work needed, though this does depend on the applica- tions being used. For example, if a user interface is needed you might need to develop your own interface functions for a user-friendly standalone embedded system. (Note: there is also commercial middleware available for creating Graphic User Interfaces (GUIs).) Nevertheless, the device driver libraries provided by microcontroller vendors should make the develop- ment of the embedded applications much easier. For the development of most deeply embedded systems, it is not necessary to have a rich user interface. However, basic interfaces like LEDs, DIP switches, and push buttons can de- liver only a limited amount of information. To assist the debugging of software during devel- opment, a simple text input/output console can be very useful. This can be handled by a simple RS-232 connection through a UART interface on the microcontroller to a UART 24 2. Getting started with Cortex-M programming
- 46. interface on apersonal computer (or via a USB adaptor). This arrangement allows you to transfer and display text messages from the microcontroller applications and to enter user inputs using a terminal application (see Fig. 2.4). Explanations for creating these message communications are covered in Chapter 17, Section 17.2.7. An alternative to using UART for message display, some development tools also have fea- tures that enable messages to be transferred through the debug connection (an example of this feature is covered in Section 17.2.8). 2.2.5 Introduction to embedded software program flows There are many different ways to structure the processing flow of an application. Here I will cover a few fundamental concepts. Please note, unlike the programming on a personal computer, most embedded applications do not have an ending of the program flow. 2.2.5.1 Polling method For simple applications, polling (sometimes also called super loop, see Fig. 2.5) is easy to set up and works fairly well for basic tasks. When the application is more complex and demands higher processing performance, then polling is not suitable. For example, if process A (in Fig. 2.5) takes a long time to complete, the other peripherals B and C will not get serviced quickly by the processor (i.e., until process A is completed). Another disadvantage of using the polling method is that the processor has to run the polling program all the time, even when no processing is required; thus reducing en- ergy efficiency. 2.2.5.2 Interrupt driven method In applications that require lower power, processing can be carried out in interrupt service routines so that the processor can enter sleep mode when no processing is required (Fig. 2.6). RS-232 serial cable Microcontroller with an Arm Cortex-M processor Level shifter Personal computer Terminal / console application Development board FIG. 2.4 Using a UART interface for user input and output during software development. 25 2.2 Some basic concepts
- 47. Start Initialization Peripheral A requires processing?Y Process A Peripheral B requires processing? Y Process B N N Peripheral C requires processing? Y Process C N FIG. 2.5 Polling method for simple application processing. Start Initialization Enter sleep mode Interrupt Service Routine A Interrupt Service Routine B Interrupt Service Routine C Interrupt FIG. 2.6 Interrupt driven application. 26 2. Getting started with Cortex-M programming
- 48. Interrupts are usuallygenerated by external sources or by on-chip peripherals to wake up the processor. In interrupt-driven applications, the interrupts from different peripherals can be assigned with different levels of interrupt priority. In this way, a high-priority interrupt request can get serviced even when a lower priority interrupt service is running; in which case the lower pri- ority interrupt service will be temporarily suspended. As a result, the latency (i.e., the delay from the generation of the interrupt request to the servicing of the requesting peripheral) for the higher priority interrupt service is reduced. 2.2.5.3 Combination of polling and interrupt-driven methods In many instances, applications can use a combination of polling and interrupt methods. By using software variables, information can be transferred between interrupt service rou- tines and the application processes (Fig. 2.7). Start Initialization Enter sleep mode Interrupt Service Routine A Interrupt Service Routine B Interrupt Service Routine C Peripheral A requires processing? Y Process A Peripheral B requires processing? Y Process B N N Peripheral C requires processing? Y Process C N Any more processing required? Y N Software variables Software variables Software variables Interrupt FIG. 2.7 Combination of polling and interrupt-driven methods in an application. 27 2.2 Some basic concepts
- 49. By dividing aperipheral processing task into an interrupt service routine and into a pro- cess running in the main program, we can reduce the duration of the interrupt service. By shortening the duration of the various interrupt services, even lower priority interrupt ser- vices could be serviced more quickly. At the same time, the system can still enter sleep mode when no processing task is required. In Fig. 2.7, the application is partitioned into processes A, B, and C, but in some instances, it might not be possible to easily partition an application task into individual parts and, thus it would need to be written as a large process. Even then, that does not delay the processing of the peripheral interrupt requests. 2.2.5.4 Handling concurrent processes In some instances, an application process could take a significant amount of time to com- plete and therefore it would be undesirable to handle it in a large application loop, as shown in Fig. 2.7. If process A takes too long to complete, processes B and C will not able to respond to peripheral requests fast enough, which might result in a system failure. Common solutions to this are: 1. Breaking down a long processing task to a sequence of states. Each time the process is processed, only one state is executed. 2. Using a Real-Time Operating System (RTOS) to manage multiple tasks. For method 1 (Fig. 2.8), a process is divided into a number of parts and a software state variable is used to track the state of the process. Each time the process is executed, the state information is updated so that next time the process is executed, the processing sequence is able to correctly resume. Restore state information Process A1 Process A2 Process A3 Process A4 Process A state = 4 state = 3 state = 2 state = 1 state = 2 state = 3 state = 4 state = 1 Process B, C, etc. FIG. 2.8 Partitioning a process into multiple parts in an application loop. 28 2. Getting started with Cortex-M programming
- 50. With this method,since the execution path of the process is shortened, other processes in the main loop can be reached quicker inside the application loop. Although the total time re- quired for the processing remains unchanged (or increased slightly due to the overhead of state being saved and restored), the system does end up being more responsive. However, when the application tasks get ever-more complex, manually partitioning the application task can become impractical. For more complex applications, a Real Time Operating System (RTOS) can be used (Fig. 2.9). An RTOS allows multiple application processes to be executed concurrently by dividing processor execution time into time slots and then allocating time slots to each task. To use an RTOS, a timer is needed to generate interrupt requests (usually these requests are generated periodically). When each time slot ends, the timer interrupt service triggers the RTOS task scheduler, which then determines whether context switching should be carried out. If context switching is to be carried out, the task scheduler suspends the currently executing task and then switches to the next task that is waiting to be executed. Using an RTOS improves the responsiveness of a system by ensuring that all tasks will be serviced within a certain amount of time. Examples of using an RTOS are covered in Chapter 17 (Section 17.2.9) and Chapter 20 (Section 20.6.4). 2.3 Introduction to Arm Cortex-M programming 2.3.1 C Programming—Data types C language supports a number of “standard” data types. However, the implementation of data type is dependent upon processor architecture as well as C compiler features. For Arm Cortex-M processors, the following data types are supported by all C compilers (Table 2.1). Process A Process B Process C OS task scheduler OS initialization Start FIG. 2.9 Using an RTOS to handle multiple concurrent application processes. 29 2.3 Introduction to Arm Cortex-M programming
- 51. When porting applicationsfrom other processor architectures to Arm processors, if the data types are of different sizes, it might be necessary to modify the C program code in order to ensure that the program operates correctly. By default, data variables in Cortex-M programming are aligned, which means the memory address of the variable should be a multiple of the size of the data. However, the Armv8-M Mainline subprofile also allows unaligned data access. Further information on this topic is covered in Chapter 6,Memory System (Section 6.6, Data alignment and unaligned data access support). In Arm programming, we refer to data sizes as byte, half word, word, and double word (Table 2.2). These terms are commonly found in Arm documentation, for example, in the instruction set details. TABLE 2.1 Sizes of data types in Cortex-M processors. C and C99 (stdint.h) data type Number of bits Range (signed) Range (unsigned) char, int8_t, uint8_t 8 128 to 127 0 to 255 short int16_t, uint16_t 16 32768 to 32767 0 to 65535 int, int32_t, uint32_t 32 2147483648 to 2147483647 0 to 4294967295 long 32 2147483648 to 2147483647 0 to 4294967295 long long, int64_t, uint64_t 64 (2^63) to (2^63 1) 0 to (2^64 1) float 32 3.40282341038 to 3.40282341038 double 64 1.797693134862315710308 to 1.797693134862315710308 long double 64 1.797693134862315710308 to 1.797693134862315710308 pointers 32 0x0 to 0xFFFFFFFF enum 8/16/32 Smallest possible data type, except when overridden by compiler option bool (C++ only), _Bool (C99) 8 True or false wchar_t 16 0 to 65535 TABLE 2.2 Data size definition in Arm processors. Term Size Byte 8 bits Half word 16 bits Word 32 bits Double word 64 bits 30 2. Getting started with Cortex-M programming
- 52. 2.3.2 Accessing peripheralsin C In Arm Cortex-M based microcontrollers, peripheral registers are memory mapped and can be accessed by data pointers. In most cases, you can use the device drivers provided by the microcontroller vendors to simplify the software development task and make it easier to port software between different microcontrollers. If it is necessary to access the peripheral registers directly, the following methods can be used. In a simple scenario of just accessing a few registers, you can define each peripheral reg- ister as a pointer using a C macro: Example registers definition for a UART using pointers and accessing the registers #define UART_BASE 0x40003000 // Base of Arm Primecell PL011 #define UART_DATA (*((volatile unsigned long *)(UART_BASE + 0x00))) #define UART_RSR (*((volatile unsigned long *)(UART_BASE + 0x04))) #define UART_FLAG (*((volatile unsigned long *)(UART_BASE + 0x18))) #define UART_LPR (*((volatile unsigned long *)(UART_BASE + 0x20))) #define UART_IBRD (*((volatile unsigned long *)(UART_BASE + 0x24))) #define UART_FBRD (*((volatile unsigned long *)(UART_BASE + 0x28))) #define UART_LCR_H (*((volatile unsigned long *)(UART_BASE + 0x2C))) #define UART_CR (*((volatile unsigned long *)(UART_BASE + 0x30))) #define UART_IFLS (*((volatile unsigned long *)(UART_BASE + 0x34))) #define UART_MSC (*((volatile unsigned long *)(UART_BASE + 0x38))) #define UART_RIS (*((volatile unsigned long *)(UART_BASE + 0x3C))) #define UART_MIS (*((volatile unsigned long *)(UART_BASE + 0x40))) #define UART_ICR (*((volatile unsigned long *)(UART_BASE + 0x44))) #define UART_DMACR (*((volatile unsigned long *)(UART_BASE + 0x48))) /* ----- UART Initialization ---- */ void uartinit(void) // Simple initialization for Arm Primecell PL011 { UART_IBRD =40; // ibrd : 25MHz/38400/16 = 40 UART_FBRD =11; // fbrd : 25MHz/38400 - 16*ibrd = 11.04 UART_LCR_H =0x60; // Line control : 8N1 UART_CR =0x301; // cr : Enable TX and RX, UART enable UART_RSR =0xA; // Clear buffer overrun if any } /* ----- Transmit a character ---- */ int sendchar(int ch) { while (UART_FLAG 0x20); // Busy, wait UART_DATA = ch; // write character return ch; } /* ----- Receive a character ---- */ int getkey(void) 31 2.3 Introduction to Arm Cortex-M programming
- 53. { while ((UART_FLAG 0x40)==0); // No data, wait return UART_DATA; // read character } As previously mentioned, this solution (defining each peripheral register as a pointer using a C macro) is fine for simple applications. However, when there are multiple units of the same peripherals available in the system, it will require defining registers for each of those periph- erals, which can make code maintenance difficult. In addition, defining each register as an individual pointer could result in a larger program size as each register address is stored as a 32-bit constant in the program flash memory. To simplify the code and to use program space more efficiently, we can define the periph- eral register set as a data structure and then define the peripheral as a memory pointer to this data structure (as shown in the following C program code). Example of register-definition for a UART using a data structure and a memory pointer based on this structure typedef struct { // Base on Arm Primecell PL011 volatile unsigned long DATA; // 0x00 volatile unsigned long RSR; // 0x04 unsigned long RESERVED0[4];// 0x08 – 0x14 volatile unsigned long FLAG; // 0x18 unsigned long RESERVED1; // 0x1C volatile unsigned long LPR; // 0x20 volatile unsigned long IBRD; // 0x24 volatile unsigned long FBRD; // 0x28 volatile unsigned long LCR_H; // 0x2C volatile unsigned long CR; // 0x30 volatile unsigned long IFLS; // 0x34 volatile unsigned long MSC; // 0x38 volatile unsigned long RIS; // 0x3C volatile unsigned long MIS; // 0x40 volatile unsigned long ICR; // 0x44 volatile unsigned long DMACR; // 0x48 } UART_TypeDef; #define Uart0 ((UART_TypeDef *) 0x40003000) #define Uart1 ((UART_TypeDef *) 0x40004000) #define Uart2 ((UART_TypeDef *) 0x40005000) /* ----- UART Initialization ---- */ void uartinit(void) // Simple initialization for Primecell PL011 { Uart0-IBRD =40; // ibrd : 25MHz/38400/16 = 40 32 2. Getting started with Cortex-M programming
- 54. Uart0-FBRD =11; //fbrd : 25MHz/38400 - 16*ibrd = 11.04 Uart0-LCR_H =0x60; // Line control : 8N1 Uart0-CR =0x301; // cr : Enable TX and RX, UART enable Uart0-RSR =0xA; // Clear buffer overrun if any } /* ----- Transmit a character ---- */ int sendchar(int ch) { while (Uart0-FLAG 0x20); // Busy, wait Uart0-DATA = ch; // write character return ch; } /* ----- Receive a character ---- */ int getkey(void) { while ((Uart0-FLAG 0x40)==0); // No data, wait return Uart0-DATA; // read character } In this example, as shown above, the Integer Baud Rate Divider (IBRD) register for UART #0 is accessed by the symbol Uart0-IBRD and the same register for UART #1 is accessed by Uart1-IBRD. With this arrangement, the same register data structure for the UART peripheral can be shared between multiple UARTs inside the chip, making code maintenance easier. In addi- tion, the compiled code could be smaller due to the reduced requirement of the immediate data storage. With further modification, a function developed for the peripherals can be shared between multiple units by passing the base pointer to the function: Example of register-definition for a UART and driver code which support multiple UARTs using passing of the base pointer as a parameter typedef struct { // Base on Arm Primecell PL011 volatile unsigned long DATA; // 0x00 volatile unsigned long RSR; // 0x04 unsigned long RESERVED0[4];// 0x08 – 0x14 volatile unsigned long FLAG; // 0x18 unsigned long RESERVED1; // 0x1C volatile unsigned long LPR; // 0x20 volatile unsigned long IBRD; // 0x24 volatile unsigned long FBRD; // 0x28 volatile unsigned long LCR_H; // 0x2C volatile unsigned long CR; // 0x30 33 2.3 Introduction to Arm Cortex-M programming
- 55. Exploring the Varietyof Random Documents with Different Content
- 56. man in encouragingher mother to partake of it. When the tray had been removed, and when the pillows of the bed had been comfortably arranged by her own hands, she at last prevailed on herself to take leave. Her mother's arms lingered round her neck; her mother's cheek nestled fondly against hers. Go, my dear, go now, or I shall get too selfish to part with you even for a few hours, murmured the sweet voice, in the lowest, softest tones. My own Rosamond! I have no words to bless you that are good enough; no words to thank you that will speak as gratefully for me as they ought! Happiness has been long in reaching me—but, oh, how mercifully it has come at last! Before she passed the door, Rosamond stopped and looked back into the room. The table, the mantel-piece, the little framed prints on the wall were bright with flowers; the musical box was just playing the first sweet notes of the air from Mozart; Uncle Joseph was seated already in his accustomed place by the bed, with the basket of fruit on his knees; the pale, worn face on the pillow was tenderly lighted up by a smile; peace and comfort and repose, all mingled together happily in the picture of the sick-room, all joined in leading Rosamond's thoughts to dwell quietly on the hope of a happier time. Three hours passed. The last glory of the sun was lighting the long summer day to its rest in the western heaven, when Rosamond returned to her mother's bedside. She entered the room softly. The one window in it looked toward the west, and on that side of the bed the chair was placed which Uncle Joseph had occupied when she left him, and in which she now found him still seated on her return. He raised his fingers to his lips, and looked toward the bed, as she opened the door. Her mother was asleep, with her hand resting in the hand of the old man. As Rosamond noiselessly advanced, she saw that Uncle Joseph's eyes looked dim and weary. The constraint of the position that he
- 57. occupied, which madeit impossible for him to move without the risk of awakening his niece, seemed to be beginning to fatigue him. Rosamond removed her bonnet and shawl, and made a sign to him to rise and let her take his place. Yes, yes! she whispered, seeing him reply by a shake of the head. Let me take my turn, while you go out a little and enjoy the cool evening air. There is no fear of waking her; her hand is not clasping yours, but only resting in it—let me steal mine into its place gently, and we shall not disturb her. She slipped her hand under her mother's while she spoke. Uncle Joseph smiled as he rose from his chair, and resigned his place to her. You will have your way, he said; you are too quick and sharp for an old man like me. Has she been long asleep? asked Rosamond. Nearly two hours, answered Uncle Joseph. But it has not been the good sleep I wanted for her—a dreaming, talking, restless sleep. It is only ten little minutes since she has been so quiet as you see her now. Surely you let in too much light? whispered Rosamond, looking round at the window, through which the glow of the evening sky poured warmly into the room. No, no! he hastily rejoined. Asleep or awake, she always wants the light. If I go away for a little while, as you tell me, and if it gets on to be dusk before I come back, light both those candles on the chimney-piece. I shall try to be here again before that; but if the time slips by too fast for me, and if it so happens that she wakes and talks strangely, and looks much away from you into that far corner of the room there, remember that the matches and the candles are together on the chimney-piece, and that the sooner you light them after the dim twilight-time, the better it will be. With those words he stole on tiptoe to the door and went out. His parting directions recalled Rosamond to a remembrance of what had passed between the doctor and herself that morning. She looked round again anxiously to the window.
- 58. The sun wasjust sinking beyond the distant house-tops; the close of day was not far off. As she turned her head once more toward the bed, a momentary chill crept over her. She trembled a little, partly at the sensation itself, partly at the recollection it aroused of that other chill which had struck her in the solitude of the Myrtle Room. Stirred by the mysterious sympathies of touch, her mother's hand at the same instant moved in hers, and over the sad peacefulness of the weary face there fluttered a momentary trouble—the flying shadow of a dream. The pale, parted lips opened, closed, quivered, opened again; the toiling breath came and went quickly and more quickly; the head moved uneasily on the pillow; the eyelids half unclosed themselves; low, faint, moaning sounds poured rapidly from the lips—changed ere long to half-articulated sentences—then merged softly into intelligible speech, and uttered these words: Swear that you will not destroy this paper! Swear that you will not take this paper away with you if you leave the house! The words that followed these were whispered so rapidly and so low that Rosamond's ear failed to catch them. They were followed by a short silence. Then the dreaming voice spoke again suddenly, and spoke louder. Where? where? where? it said. In the book-case? In the table- drawer?—Stop! stop! In the picture of the ghost— The last words struck cold on Rosamond's heart. She drew back suddenly with a movement of alarm—checked herself the instant after, and bent down over the pillow again. But it was too late. Her hand had moved abruptly when she drew back, and her mother awoke with a start and a faint cry—with vacant, terror-stricken eyes, and with the perspiration standing thick on her forehead. Mother! cried Rosamond, raising her on the pillow. I have come back. Don't you know me? Mother? she repeated, in mournful, questioning tones —Mother? At the second repetition of the word a bright flush of delight and surprise broke out on her face, and she clasped both
- 59. arms suddenly roundher daughter's neck. Oh, my own Rosamond! she said. If I had ever been used to waking up and seeing your dear face look at me, I should have known you sooner, in spite of my dream! Did you wake me, my love? or did I wake myself? I am afraid I awoke you, mother. Don't say 'afraid.' I would wake from the sweetest sleep that ever woman had to see your face and to hear you say 'mother' to me. You have delivered me, my love, from the terror of one of my dreadful dreams. Oh, Rosamond! I think I should live to be happy in your love, if I could only get Porthgenna Tower out of my mind—if I could only never remember again the bed-chamber where my mistress died, and the room where I hid the letter— We will try and forget Porthgenna Tower now, said Rosamond. Shall we talk about other places where I have lived, which you have never seen? Or shall I read to you, mother? Have you got any book here that you are fond of? She looked across the bed at the table on the other side. There was nothing on it but some bottles of medicine, a few of Uncle Joseph's flowers in a glass of water, and a little oblong work-box. She looked round at the chest of drawers behind her—there were no books placed on the top of it. Before she turned toward the bed again, her eyes wandered aside to the window. The sun was lost beyond the distant house-tops; the close of day was near at hand. If I could forget! Oh, me, if I could only forget! said her mother, sighing wearily, and beating her hand on the coverlid of the bed. Are you well enough, dear, to amuse yourself with work? asked Rosamond, pointing to the little oblong box on the table, and trying to lead the conversation to a harmless, every-day topic, by asking questions about it. What work do you do? May I look at it? Her face lost its weary, suffering look, and brightened once more into a smile. There is no work there, she said. All the treasures I had in the world, till you came to see me, are shut up in that one little box. Open it, my love, and look inside.
- 60. Rosamond obeyed, placingthe box on the bed where her mother could see it easily. The first object that she discovered inside was a little book, in dark, worn binding. It was an old copy of Wesley's Hymns. Some withered blades of grass lay between its pages; and on one of its blank leaves was this inscription—Sarah Leeson, her book. The gift of Hugh Polwheal. Look at it, my dear, said her mother. I want you to know it again. When my time comes to leave you, Rosamond, lay it on my bosom with your own dear hands, and put a little morsel of your hair with it, and bury me in the grave in Porthgenna church-yard, where he has been waiting for me to come to him so many weary years. The other things in the box, Rosamond, belong to you; they are little stolen keepsakes that used to remind me of my child, when I was alone in the world. Perhaps, years and years hence, when your brown hair begins to grow gray like mine, you may like to show these poor trifles to your children when you talk about me. Don't mind telling them, Rosamond, how your mother sinned and how she suffered—you can always let these little trifles speak for her at the end. The least of them will show that she always loved you. She took out of the box a morsel of neatly folded white paper, which had been placed under the book of Wesley's Hymns, opened it, and showed her daughter a few faded laburnum leaves that lay inside. I took these from your bed, Rosamond, when I came, as a stranger, to nurse you at West Winston. I tried to take a ribbon out of your trunk, love, after I had taken the flowers—a ribbon that I knew had been round your neck. But the doctor came near at the time, and frightened me. She folded the paper up again, laid it aside on the table, and drew from the box next a small print which had been taken from the illustrations to a pocket-book. It represented a little girl, in gypsy- hat, sitting by the water-side, and weaving a daisy chain. As a design, it was worthless; as a print, it had not even the mechanical merit of being a good impression. Underneath it a line was written in faintly pencilled letters—Rosamond when I last saw her.
- 61. It was neverpretty enough for you, she said. But still there was something in it that helped me to remember what my own love was like when she was a little girl. She put the engraving aside with the laburnum leaves, and took from the box a leaf of a copy-book, folded in two, out of which there dropped a tiny strip of paper, covered with small printed letters. She looked at the strip of paper first. The advertisement of your marriage, Rosamond, she said. I used to be fond of reading it over and over again to myself when I was alone, and trying to fancy how you looked and what dress you wore. If I had only known when you were going to be married, I would have ventured into the church, my love, to look at you and at your husband. But that was not to be —and perhaps it was best so, for the seeing you in that stolen way might only have made my trials harder to bear afterward. I have had no other keepsake to remind me of you, Rosamond, except this leaf out of your first copy-book. The nurse-maid at Porthgenna tore up the rest one day to light the fire, and I took this leaf when she was not looking. See! you had not got as far as words then—you could only do up-strokes and down-strokes. Oh me! how many times I have sat looking at this one leaf of paper, and trying to fancy that I saw your small child's hand traveling over it, with the pen held tight in the rosy little fingers. I think I have cried oftener, my darling, over that first copy of yours than over all my other keepsakes put together. Rosamond turned aside her face toward the window to hide the tears which she could restrain no longer. As she wiped them away, the first sight of the darkening sky warned her that the twilight dimness was coming soon. How dull and faint the glow in the west looked now! how near it was to the close of day! When she turned toward the bed again, her mother was still looking at the leaf of the copy-book. That nurse-maid who tore up all the rest of it to light the fire, she said, was a kind friend to me in those early days at Porthgenna.
- 62. She used sometimesto let me put you to bed, Rosamond; and never asked questions, or teased me, as the rest of them did. She risked the loss of her place by being so good to me. My mistress was afraid of my betraying myself and betraying her if I was much in the nursery, and she gave orders that I was not to go there, because it was not my place. None of the other women-servants were so often stopped from playing with you and kissing you, Rosamond, as I was. But the nurse-maid—God bless and prosper her for it!—stood my friend. I often lifted you into your little cot, my love, and wished you good-night, when my mistress thought I was at work in her room. You used to say you liked your nurse better than you liked me, but you never told me so fretfully; and you always put your laughing lips up to mine whenever I asked you for a kiss! Rosamond laid her head gently on the pillow by the side of her mother's. Try to think less of the past, dear, and more of the future, she whispered pleadingly; try to think of the time when my child will help you to recall those old days without their sorrow—the time when you will teach him to put his lips up to yours, as I used to put mine. I will try, Rosamond—but my only thoughts of the future, for years and years past, have been thoughts of meeting you in heaven. If my sins are forgiven, how shall we meet there? Shall you be like my little child to me—the child I never saw again after she was five years old? I wonder if the mercy of God will recompense me for our long separation on earth? I wonder if you will first appear to me in the happy world with your child's face, and be what you should have been to me on earth, my little angel that I can carry in my arms? If we pray in heaven, shall I teach you your prayers there, as some comfort to me for never having taught them to you here? She paused, smiled sadly, and, closing her eyes, gave herself in silence to the dream-thoughts that were still floating in her mind. Thinking that she might sink to rest again if she was left undisturbed, Rosamond neither moved nor spoke. After watching the peaceful face for some time, she became conscious that the light
- 63. was fading onit slowly. As that conviction impressed itself on her, she looked round at the window once more. The western clouds wore their quiet twilight colors already: the close of day had come. The moment she moved the chair, she felt her mother's hand on her shoulder. When she turned again toward the bed, she saw her mother's eyes open and looking at her—looking at her, as she thought, with a change in their expression, a change to vacancy. Why do I talk of heaven? she said, turning her face suddenly toward the darkening sky, and speaking in low, muttering tones. How do I know I am fit to go there? And yet, Rosamond, I am not guilty of breaking my oath to my mistress. You can say for me that I never destroyed the letter, and that I never took it away with me when I left the house. I tried to get it out of the Myrtle Room; but I only wanted to hide it somewhere else. I never thought to take it away from the house: I never meant to break my oath. It will be dark soon, mother. Let me get up for one moment to light the candles. Her hand crept softly upward, and clung fast round Rosamond's neck. I never swore to give him the letter, she said. There was no crime in the hiding of it. You found it in a picture, Rosamond? They used to call it a picture of the Porthgenna ghost. Nobody knew how old it was, or when it came into the house. My mistress hated it, because the painted face had a strange likeness to hers. She told me, when first I lived at Porthgenna, to take it down from the wall and destroy it. I was afraid to do that; so I hid it away, before ever you were born, in the Myrtle Room. You found the letter at the back of the picture, Rosamond? And yet that was a likely place to hide it in. Nobody had ever found the picture. Why should any body find the letter that was hid in it? Let me get a light, mother! I am sure you would like to have a light!
- 64. No! no lightnow. Give the darkness time to gather down there in the corner of the room. Lift me up close to you, and let me whisper. The clinging arm tightened its grasp as Rosamond raised her in the bed. The fading light from the window fell full on her face, and was reflected dimly in her vacant eyes. I am waiting for something that comes at dusk, before the candles are lit, she whispered in low, breathless tones. My mistress!—down there! And she pointed away to the farthest corner of the room near the door. Mother! for God's sake, what is it! what has changed you so? That's right! say 'mother.' If she does come, she can't stop when she hears you call me 'mother,' when she sees us together at last, loving and knowing each other in spite of her. Oh, my kind, tender, pitying child! if you can only deliver me from her, how long may I live yet!—how happy we may both be! Don't talk so! don't look so! Tell me quietly—dear, dear mother, tell me quietly— Hush! hush! I am going to tell you. She threatened me on her death-bed, if I thwarted her—she said she would come to me from the other world. Rosamond! I have thwarted her and she has kept her promise—all my life since, she has kept her promise! Look! Down there! Her left arm was still clasped round Rosamond's neck. She stretched her right arm out toward the far corner of the room, and shook her hand slowly at the empty air. Look! she said. There she is as she always comes to me at the close of day—with the coarse, black dress on, that my guilty hands made for her—with the smile that there was on her face when she asked me if she looked like a servant. Mistress! mistress! Oh, rest at last! the Secret is ours no longer! Rest at last! my child is my own again! Rest, at last; and come between us no more! She ceased, panting for breath; and laid her hot, throbbing cheek against the cheek of her daughter. Call me 'mother' again! she whispered. Say it loud; and send her away from me forever!
- 65. Rosamond mastered theterror that shook her in every limb, and pronounced the word. Her mother leaned forward a little, still gasping heavily for breath, and looked with straining eyes into the quiet twilight dimness at the lower end of the room. Gone!!! she cried suddenly, with a scream of exultation. Oh, merciful, merciful God! gone at last! The next instant she sprang up on her knees in the bed. For one awful moment her eyes shone in the gray twilight with a radiant, unearthly beauty, as they fastened their last look of fondness on her daughter's face. Oh, my love! my angel! she murmured, how happy we shall be together now! As she said the words, she twined her arms round Rosamond's neck, and pressed her lips rapturously on the lips of her child. The kiss lingered till her head sank forward gently on Rosamond's bosom—lingered, till the time of God's mercy came, and the weary heart rested at last.
- 66. CHAPTER V. FORTY THOUSANDPOUNDS. No popular saying is more commonly accepted than the maxim which asserts that Time is the great consoler; and, probably, no popular saying more imperfectly expresses the truth. The work that we must do, the responsibilities that we must undertake, the example that we must set to others—these are the great consolers, for these apply the first remedies to the malady of grief. Time possesses nothing but the negative virtue of helping it to wear itself out. Who that has observed at all, has not perceived that those among us who soonest recover from the shock of a great grief for the dead are those who have the most duties to perform toward the living? When the shadow of calamity rests on our houses, the question with us is not how much time will suffice to bring back the sunshine to us again, but how much occupation have we got to force us forward into the place where the sunshine is waiting for us to come? Time may claim many victories, but not the victory over grief. The great consolation for the loss of the dead who are gone is to be found in the great necessity of thinking of the living who remain. The history of Rosamond's daily life, now that the darkness of a heavy affliction had fallen on it, was in itself the sufficient illustration of this truth. It was not the slow lapse of time that helped to raise her up again, but the necessity which would not wait for time—the necessity which made her remember what was due to the husband who sorrowed with her, to the child whose young life was linked to hers, and to the old man whose helpless grief found no support but in the comfort she could give, learned no lesson of resignation but from the example she could set. From the first the responsibility of sustaining him had rested on her shoulders alone. Before the close of day had been counted out by the first hour of the night, she had been torn from the bedside by
- 67. the necessity ofmeeting him at the door, and preparing him to know that he was entering the chamber of death. To guide the dreadful truth gradually and gently, till it stood face to face with him, to support him under the shock of recognizing it, to help his mind to recover after the inevitable blow had struck it at last—these were the sacred duties which claimed all the devotion that Rosamond had to give, and which forbade her heart, for his sake, to dwell selfishly on its own grief. He looked like a man whose faculties had been stunned past recovery. He would sit for hours with the musical box by his side, patting it absently from time to time, and whispering to himself as he looked at it, but never attempting to set it playing. It was the one memorial left that reminded him of all the joys and sorrows, the simple family interests and affections of his past life. When Rosamond first sat by his side and took his hand to comfort him, he looked backward and forward with forlorn eyes from her compassionate face to the musical box, and vacantly repeated to himself the same words over and over again: They are all gone— my brother Max, my wife, my little Joseph, my sister Agatha, and Sarah, my niece! I and my little bit of box are left alone together in the world. Mozart can sing no more. He has sung to the last of them now! The second day there was no change in him. On the third, Rosamond placed the book of Hymns reverently on her mother's bosom, laid a lock of her own hair round it, and kissed the sad, peaceful face for the last time. The old man was with her at that silent leave-taking, and followed her away when it was over. By the side of the coffin, and afterward, when she took him back with her to her husband, he was still sunk in the same apathy of grief which had overwhelmed him from the first. But when they began to speak of the removal of the remains the next day to Porthgenna church-yard, they noticed that his dim eyes brightened suddenly, and that his wandering attention followed every word they said. After a while he rose from his chair, approached Rosamond, and looked anxiously in her face. I think I
- 68. could bear itbetter if you would let me go with her, he said. We two should have gone back to Cornwall together, if she had lived. Will you let us still go back together now that she has died? Rosamond gently remonstrated, and tried to make him see that it was best to leave the remains to be removed under the charge of her husband's servant, whose fidelity could be depended on, and whose position made him the fittest person to be charged with cares and responsibilities which near relations were not capable of undertaking with sufficient composure. She told him that her husband intended to stop in London, to give her one day of rest and quiet, which she absolutely needed, and that they then proposed to return to Cornwall in time to be at Porthgenna before the funeral took place; and she begged earnestly that he would not think of separating his lot from theirs at a time of trouble and trial, when they ought to be all three most closely united by the ties of mutual sympathy and mutual sorrow. He listened silently and submissively while Rosamond was speaking, but he only repeated his simple petition when she had done. The one idea in his mind now was the idea of going back to Cornwall with all that was left on earth of his sister's child. Leonard and Rosamond both saw that it would be useless to oppose it, both felt that it would be cruelty to keep him with them, and kindness to let him go away. After privately charging the servant to spare him all trouble and difficulty, to humor him by acceding to any wishes that he might express, and to give him all possible protection and help without obtruding either officiously on his attention, they left him free to follow the one purpose of his heart which still connected him with the interests and events of the passing day. I shall thank you better soon, he said at leave-taking, for letting me go away out of this din of London with all that is left to me of Sarah, my niece. I will dry up my tears as well as I can, and try to have more courage when we meet again. On the next day, when they were alone, Rosamond and her husband sought refuge from the oppression of the present in speaking together of the future, and of the influence which the
- 69. change in theirfortunes ought to be allowed to exercise on their plans and projects for the time to come. After exhausting this topic, the conversation turned next on the subject of their friends, and on the necessity of communicating to some of the oldest of their associates the events which had followed the discovery in the Myrtle Room. The first name on their lips while they were considering this question was the name of Doctor Chennery; and Rosamond, dreading the effect on her spirits of allowing her mind to remain unoccupied, volunteered to write to the vicar at once, referring briefly to what had happened since they had last communicated with him, and asking him to fulfill that year an engagement of long standing, which he had made with her husband and herself, to spend his autumn holiday with them at Porthgenna Tower. Rosamond's heart yearned for a sight of her old friend; and she knew him well enough to be assured that a hint at the affliction which had befallen her, and at the hard trial which she had undergone, would be more than enough to bring them together the moment Doctor Chennery could make his arrangements for leaving home. The writing of this letter suggested recollections which called to mind another friend, whose intimacy with Leonard and Rosamond was of recent date, but whose connection with the earlier among the train of circumstances which had led to the discovery of the Secret entitled him to a certain share in their confidence. This friend was Mr. Orridge, the doctor at West Winston, who had accidentally been the means of bringing Rosamond's mother to her bedside. To him she now wrote, acknowledging the promise which she had made on leaving West Winston to communicate the result of their search for the Myrtle Room; and informing him that it had terminated in the discovery of some very sad events, of a family nature, which were now numbered with the events of the past. More than this it was not necessary to say to a friend who occupied such a position toward them as that held by Mr. Orridge.
- 70. Rosamond had writtenthe address of this second letter, and was absently drawing lines on the blotting-paper with her pen, when she was startled by hearing a contention of angry voices in the passage outside. Almost before she had time to wonder what the noise meant, the door was violently pushed open, and a tall, shabbily dressed, elderly man, with a peevish, haggard face, and a ragged gray beard, stalked in, followed indignantly by the head waiter of the hotel. I have three times told this person, began the waiter, with a strong emphasis on the word person, that Mr. and Mrs. Frankland — Were not at home, broke in the shabbily dressed man, finishing the sentence for the waiter. Yes, you told me that; and I told you that the gift of speech was only used by mankind for the purpose of telling lies, and that consequently I didn't believe you. You have told a lie. Here are Mr. and Mrs. Frankland both at home. I come on business, and I mean to have five minutes' talk with them. I sit down unasked, and I announce my own name—Andrew Treverton. With those words, he took his seat coolly on the nearest chair. Leonard's cheeks reddened with anger while he was speaking, but Rosamond interposed before her husband could say a word. It is useless, love, to be angry with him, she whispered. The quiet way is the best way with a man like that. She made a sign to the waiter, which gave him permission to leave the room—then turned to Mr. Treverton. You have forced your presence on us, Sir, she said quietly, at a time when a very sad affliction makes us quite unfit for contentions of any kind. We are willing to show more consideration for your age than you have shown for our grief. If you have any thing to say to my husband, he is ready to control himself and to hear you quietly, for my sake. And I shall be short with him and with you, for my own sake, rejoined Mr. Treverton. No woman has ever yet had the chance of sharpening her tongue long on me, or ever shall. I have come here to say three things. First, your lawyer has told me all about the
- 71. discovery in theMyrtle Room, and how you made it. Secondly, I have got your money. Thirdly, I mean to keep it. What do you think of that? I think you need not give yourself the trouble of remaining in the room any longer, if your only object in coming here is to tell us what we know already, replied Leonard. We know you have got the money; and we never doubted that you meant to keep it. You are quite sure of that, I suppose? said Mr. Treverton. Quite sure you have no lingering hope that any future twists and turns of the law will take the money out of my pocket again and put it back into yours? It is only fair to tell you that there is not the shadow of a chance of any such thing ever happening, or of my ever turning generous and rewarding you of my own accord for the sacrifice you have made. I have been to Doctors' Commons, I have taken out a grant of administration, I have got the money legally, I have lodged it safe at my banker's, and I have never had one kind feeling in my heart since I was born. That was my brother's character of me, and he knew more of my disposition, of course, than any one else. Once again, I tell you both, not a farthing of all that large fortune will ever return to either of you. And once again I tell you, said Leonard, that we have no desire to hear what we know already. It is a relief to my conscience and to my wife's to have resigned a fortune which we had no right to possess; and I speak for her as well as for myself when I tell you that your attempt to attach an interested motive to our renunciation of that money is an insult to us both which you ought to have been ashamed to offer. That is your opinion, is it? said Mr. Treverton. You, who have lost the money, speak to me, who have got it, in that manner, do you?—Pray, do you approve of your husband's treating a rich man who might make both your fortunes in that way? he inquired, addressing himself sharply to Rosamond. Most assuredly I approve of it, she answered. I never agreed with him more heartily in my life than I agree with him now.
- 72. Oh! said Mr.Treverton. Then it seems you care no more for the loss of the money than he does? He has told you already, said Rosamond, that it is as great a relief to my conscience as to his, to have given it up. Mr. Treverton carefully placed a thick stick which he carried with him upright between his knees, crossed his hands on the top of it, rested his chin on them, and, in that investigating position, stared steadily in Rosamond's face. I rather wish I had brought Shrowl here with me, he said to himself. I should like him to have seen this. It staggers me, and I rather think it would have staggered him. Both these people, continued Mr. Treverton, looking perplexedly from Rosamond to Leonard, and from Leonard back again to Rosamond, are, to all outward appearance, human beings. They walk on their hind legs, they express ideas readily by uttering articulate sounds, they have the usual allowance of features, and in respect of weight, height, and size, they appear to me to be mere average human creatures of the regular civilized sort. And yet, there they sit, taking the loss of a fortune of forty thousand pounds as easily as Croesus, King of Lydia, might have taken the loss of a half-penny! He rose, put on his hat, tucked the thick stick under his arm, and advanced a few steps toward Rosamond. I am going now, he said. Would you like to shake hands? Rosamond turned her back on him contemptuously. Mr. Treverton chuckled with an air of supreme satisfaction. Meanwhile Leonard, who sat near the fire-place, and whose color was rising angrily once more, had been feeling for the bell-rope, and had just succeeded in getting it into his hand as Mr. Treverton approached the door. Don't ring, Lenny, said Rosamond. He is going of his own accord. Mr. Treverton stepped out into the passage—then glanced back into the room with an expression of puzzled curiosity on his face, as
- 73. if he waslooking into a cage which contained two animals of a species that he had never heard of before. I have seen some strange sights in my time, he said to himself. I have had some queer experience of this trumpery little planet, and of the creatures who inhabit it—but I never was staggered yet by any human phenomenon as I am staggered now by those two. He shut the door without saying another word, and Rosamond heard him chuckle to himself again as he walked away along the passage. Ten minutes afterward the waiter brought up a sealed letter addressed to Mrs. Frankland. It had been written, he said, in the coffee-room of the hotel by the person who had intruded himself into Mr. and Mrs. Frankland's presence. After giving it to the waiter to deliver, he had gone away in a hurry, swinging his thick stick complacently, and laughing to himself. Rosamond opened the letter. On one side of it was a crossed check, drawn in her name, for Forty Thousand Pounds. On the other side were these lines of explanation: Take your money back again. First, because you and your husband are the only two people I have ever met with who are not likely to be made rascals by being made rich. Secondly, because you have told the truth, when letting it out meant losing money, and keeping it in, saving a fortune. Thirdly, because you are not the child of the player- woman. Fourthly, because you can't help yourself—for I shall leave it to you at my death, if you won't have it now. Good-by. Don't come and see me, don't write grateful letters to me, don't invite me into the country, don't praise my generosity, and, above all things, don't have any thing more to do with Shrowl. Andrew Treverton. The first thing Rosamond did, when she and her husband had a little recovered from their astonishment, was to disobey the injunction which forbade her to address any grateful letters to Mr. Treverton. The messenger, who was sent with her note to Bayswater, returned without an answer, and reported that he had received directions from an invisible man, with a gruff voice, to throw it over
- 74. the garden wall,and to go away immediately after, unless he wanted to have his head broken. Mr. Nixon, to whom Leonard immediately sent word of what had happened, volunteered to go to Bayswater the same evening, and make an attempt to see Mr. Treverton on Mr. and Mrs. Frankland's behalf. He found Timon of London more approachable than he had anticipated. The misanthrope was, for once in his life, in a good humor. This extraordinary change in him had been produced by the sense of satisfaction which he experienced in having just turned Shrowl out of his situation, on the ground that his master was not fit company for him after having committed such an act of folly as giving Mrs. Frankland back her forty thousand pounds. I told him, said Mr. Treverton, chuckling over his recollection of the parting scene between his servant and himself—I told him that I could not possibly expect to merit his continued approval after what I had done, and that I could not think of detaining him in his place under the circumstances. I begged him to view my conduct as leniently as he could, because the first cause that led to it was, after all, his copying the plan of Porthgenna, which guided Mrs. Frankland to the discovery in the Myrtle Room. I congratulated him on having got a reward of five pounds for being the means of restoring a fortune of forty thousand; and I bowed him out with a polite humility that half drove him mad. Shrowl and I have had a good many tussles in our time; he was always even with me till to-day, and now I've thrown him on his back at last! Although Mr. Treverton was willing to talk of the defeat and dismissal of Shrowl as long as the lawyer would listen to him, he was perfectly unmanageable on the subject of Mrs. Frankland, when Mr. Nixon tried to turn the conversation to that topic. He would hear no messages—he would give no promise of any sort for the future. All that he could be prevailed on to say about himself and his own projects was that he intended to give up the house at Bayswater, and to travel again for the purpose of studying human nature, in different countries, on a plan that he had not tried yet—the plan of endeavoring to find out the good that there might be in people as
- 75. well as thebad. He said the idea had been suggested to his mind by his anxiety to ascertain whether Mr. and Mrs. Frankland were perfectly exceptional human beings or not. At present, he was disposed to think that they were, and that his travels were not likely to lead to any thing at all remarkable in the shape of a satisfactory result. Mr. Nixon pleaded hard for something in the shape of a friendly message to take back, along with the news of his intended departure. The request produced nothing but a sardonic chuckle, followed by this parting speech, delivered to the lawyer at the garden gate. Tell those two superhuman people, said Timon of London, that I may give up my travels in disgust when they least expect it; and that I may possibly come back to look at them again—I don't personally care about either of them—but I should like to get one satisfactory sensation more out of the lamentable spectacle of humanity before I die. CHAPTER VI. THE DAWN OF A NEW LIFE. Four days afterward, Rosamond and Leonard and Uncle Joseph met together in the cemetery of the church of Porthgenna. The earth to which we all return had closed over Her: the weary pilgrimage of Sarah Leeson had come to its quiet end at last. The miner's grave from which she had twice plucked in secret her few memorial fragments of grass had given her the home, in death, which, in life, she had never known. The roar of the surf was stilled to a low murmur before it reached the place of her rest; and the wind that swept joyously over the open moor paused a little when it
- 76. met the oldtrees that watched over the graves, and wound onward softly through the myrtle hedge which held them all embraced alike in its circle of lustrous green. Some hours had passed since the last words of the burial service had been read. The fresh turf was heaped already over the mound, and the old head-stone with the miner's epitaph on it had been raised once more in its former place at the head of the grave. Rosamond was reading the inscription softly to her husband. Uncle Joseph had walked a little apart from them while she was thus engaged, and had knelt down by himself at the foot of the mound. He was fondly smoothing and patting the newly laid turf—as he had often smoothed Sarah's hair in the long-past days of her youth—as he had often patted her hand in the after-time, when her heart was weary and her hair was gray. Shall we add any new words to the old, worn letters as they stand now? said Rosamond, when she had read the inscription to the end. There is a blank space left on the stone. Shall we fill it, love, with the initials of my mother's name, and the date of her death? I feel something in my heart which seems to tell me to do that, and to do no more. So let it be, Rosamond, said her husband. That short and simple inscription is the fittest and the best. She looked away, as he gave that answer, to the foot of the grave, and left him for a moment to approach the old man. Take my hand, Uncle Joseph, she said, and touched him gently on the shoulder. Take my hand, and let us go back together to the house. He rose as she spoke, and looked at her doubtfully. The musical box, inclosed in its well-worn leather case, lay on the grave near the place where he had been kneeling. Rosamond took it up from the grass, and slung it in the old place at his side, which it had always occupied when he was away from home. He sighed a little as he thanked her. Mozart can sing no more, he said. He has sung to the last of them now!
- 77. Don't say 'tothe last,' yet, said Rosamond—don't say 'to the last,' Uncle Joseph, while I am alive. Surely Mozart will sing to me, for my mother's sake? A smile—the first she had seen since the time of their grief— trembled faintly round his lips. There is comfort in that, he said; there is comfort for Uncle Joseph still, in hearing that. Take my hand, she repeated softly. Come home with us now. He looked down wistfully at the grave. I will follow you, he said, if you will go on before me to the gate. Rosamond took her husband's arm, and guided him to the path that led out of the church-yard. As they passed from sight, Uncle Joseph knelt down once more at the foot of the grave, and pressed his lips on the fresh turf. Good-by, my child, he whispered, and laid his cheek for a moment against the grass before he rose again. At the gate, Rosamond was waiting for him. Her right hand was resting on her husband's arm; her left hand was held out for Uncle Joseph to take. How cool the breeze is! said Leonard. How pleasantly the sea sounds! Surely this is a fine summer day? The calmest and loveliest of the year, said Rosamond. The only clouds on the sky are clouds of shining white; the only shadows over the moor lie light as down on the heather. Oh, Lenny, it is such a different day from that day of dull oppression and misty heat when we found the letter in the Myrtle Room! Even the dark tower of our old house, yonder, looks its brightest and best, as if it waited to welcome us to the beginning of a new life. I will make it a happy life to you, and to Uncle Joseph, if I can—happy as the sunshine we are walking in now. You shall never repent, love, if I can help it, that you have married a wife who has no claim of her own to the honors of a family name. I can never repent my marriage, Rosamond, because I can never forget the lesson that my wife has taught me.
- 78. What lesson, Lenny? Anold one, my dear, which some of us can never learn too often. The highest honors, Rosamond, are those which no accident can take away—the honors that are conferred by Love and Truth. THE END. WILKIE COLLINS'S NOVELS. HARPER'S ILLUSTRATED LIBRARY EDITION. 12mo, Cloth, $1 50 per Volume. WITH STEEL PORTRAIT OF THE AUTHOR BY HALPIN. In view of the visit of Mr. Wilkie Collins to this country, Messrs. Harper Brothers have the pleasure of announcing a New Library Edition of the Works of this popular novelist, embellished with many illustrations by English and American artists—some of which have been drawn expressly for this edition—and with a New Portrait of the author, engraved on Steel by Halpin. One volume will be
- 79. issued each monthuntil the completion of the series. The convenient size of the volumes will commend this tasteful edition to the favor of American readers, among whom the author of No Name, The Woman in White, Man and Wife, and The New Magdalen, is no less widely known than among his own countrymen. Wilkie Collins has no living superior in the art of constructing a story. Others may equal if not surpass him in the delineation of character, or in the use of a story for the development of social theories, or for the redress of a wrong against humanity and civilization; but in his own domain he stands alone, without a rival. * * * He holds that the main element in the attraction of all stories is the interest of curiosity and the excitement of surprise. Other writers had discovered this before Collins; but, recognizing the clumsiness of the contrivances in use by inferior authors, he essays, by artistic and conscientious use of the same materials and similar devices, to captivate his readers.—N. Y. Evening Post. We can not call to mind any novelist or romancer of past times whose constructive powers fairly can be placed above his. He is a literary artist, and a great one too, and he always takes his readers with him.—Boston Traveller. Of all the living writers of English fiction, no one better understands the art of story-telling than Wilkie Collins. He has a faculty of coloring the mystery of a plot, exciting terror, pity, curiosity, and other passions, such as belongs to few if any of his confrères, however much they may excel him in other respects. His style, too, is singularly appropriate—less forced and artificial
- 80. than the averagemodern novelist.—Boston Transcript. THE NEW MAGDALEN. BASIL. HIDE-AND-SEEK. NO NAME. THE DEAD SECRET. POOR MISS FINCH. ARMADALE. MAN AND WIFE. THE MOONSTONE. THE WOMAN IN WHITE. QUEEN OF HEARTS. ☞Harper Brothers also publish a Cheap Edition of Wilkie Collins's Novels: ARMADALE Illustrated 8vo, Paper, $1 00. ANTONINA 8vo, Paper, 50c. MAN AND WIFE Illustrated 8vo, Paper, $1 00. THE MOONSTONE Illustrated 8vo, Paper, $1 00. NO NAME Illustrated 8vo, Paper, $1 00. POOR MISS FINCH Illustrated 8vo, Paper, $1 00.
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