This document provides the program details for the ACM International Conference on Computing Frontiers 2015, including the schedule, list of sessions, and descriptions of keynote speakers and topics. The conference will take place from May 18-21, 2015 in Ischia, Italy, and will include workshops, paper presentations, posters, and two keynote speeches on network algorithms and digital transformation.
BM Research continues this work through the pursuit of new scientific instruments – whether physical devices or advanced software tools – designed to make what’s invisible in our world visible, from the macroscopic level down to the nanoscale.
This is a summary 5-in5-5 deck
BM Research continues this work through the pursuit of new scientific instruments – whether physical devices or advanced software tools – designed to make what’s invisible in our world visible, from the macroscopic level down to the nanoscale.
This is a summary 5-in5-5 deck
Maliheh (Mali) Izadi, PhD, Andrea Di Sorbo, and Sebastiano Panichella co-chaired the 3rd Intl. Workshop on NL-based Software Engineering
April 20 2024, Lisbon, Portugal.
TOP 5 Most View Article From Academia in 2019sipij
TOP 5 Most View Article From Academia in 2019
Signal & Image Processing : An International Journal (SIPIJ)
ISSN : 0976 - 710X (Online) ; 2229 - 3922 (print)
http://www.airccse.org/journal/sipij/index.html
Maliheh (Mali) Izadi, PhD, Andrea Di Sorbo, and Sebastiano Panichella co-chaired the 3rd Intl. Workshop on NL-based Software Engineering
April 20 2024, Lisbon, Portugal.
TOP 5 Most View Article From Academia in 2019sipij
TOP 5 Most View Article From Academia in 2019
Signal & Image Processing : An International Journal (SIPIJ)
ISSN : 0976 - 710X (Online) ; 2229 - 3922 (print)
http://www.airccse.org/journal/sipij/index.html
HumanTechBiota is acting as the human microbiota
(the collective microorganisms that resides symbiotically in our bodies) having an increasing role for our overall well being
A slide deck that supported my recent university lectures during this autumn in Italy (Polytechnic of Bari), Switzerland (EPFL Lausanne) and Poland (SWPS University Warsaw).
It introduces Artificial Intelligence from a business perspective, talks about the need to have a more robust AI tools with AI Ethics and Trust and eventually presents future trajectories such as the Active Intelligence frontier.
A number of Artificial Intelligence and Aanalytics tools already support our decisions but ACTIVE INTELLIGENCE SYSTEMS, that blend AI, Big Data , Analutics and IotT and much more, will take care of us
The future of AI & ML in Cognitive DiscoveryPietro Leo
My keynote slide deck for the ENEL Innovation Community MeetUp. Recorded session here: in Italian, English and Spanish https://echannel.enel.com/livePages/innovation-communities-meetup-with from minute 2h-38'
Analysis insight about a Flyball dog competition team's performanceroli9797
Insight of my analysis about a Flyball dog competition team's last year performance. Find more: https://github.com/rolandnagy-ds/flyball_race_analysis/tree/main
Techniques to optimize the pagerank algorithm usually fall in two categories. One is to try reducing the work per iteration, and the other is to try reducing the number of iterations. These goals are often at odds with one another. Skipping computation on vertices which have already converged has the potential to save iteration time. Skipping in-identical vertices, with the same in-links, helps reduce duplicate computations and thus could help reduce iteration time. Road networks often have chains which can be short-circuited before pagerank computation to improve performance. Final ranks of chain nodes can be easily calculated. This could reduce both the iteration time, and the number of iterations. If a graph has no dangling nodes, pagerank of each strongly connected component can be computed in topological order. This could help reduce the iteration time, no. of iterations, and also enable multi-iteration concurrency in pagerank computation. The combination of all of the above methods is the STICD algorithm. [sticd] For dynamic graphs, unchanged components whose ranks are unaffected can be skipped altogether.
Levelwise PageRank with Loop-Based Dead End Handling Strategy : SHORT REPORT ...Subhajit Sahu
Abstract — Levelwise PageRank is an alternative method of PageRank computation which decomposes the input graph into a directed acyclic block-graph of strongly connected components, and processes them in topological order, one level at a time. This enables calculation for ranks in a distributed fashion without per-iteration communication, unlike the standard method where all vertices are processed in each iteration. It however comes with a precondition of the absence of dead ends in the input graph. Here, the native non-distributed performance of Levelwise PageRank was compared against Monolithic PageRank on a CPU as well as a GPU. To ensure a fair comparison, Monolithic PageRank was also performed on a graph where vertices were split by components. Results indicate that Levelwise PageRank is about as fast as Monolithic PageRank on the CPU, but quite a bit slower on the GPU. Slowdown on the GPU is likely caused by a large submission of small workloads, and expected to be non-issue when the computation is performed on massive graphs.
The Building Blocks of QuestDB, a Time Series Databasejavier ramirez
Talk Delivered at Valencia Codes Meetup 2024-06.
Traditionally, databases have treated timestamps just as another data type. However, when performing real-time analytics, timestamps should be first class citizens and we need rich time semantics to get the most out of our data. We also need to deal with ever growing datasets while keeping performant, which is as fun as it sounds.
It is no wonder time-series databases are now more popular than ever before. Join me in this session to learn about the internal architecture and building blocks of QuestDB, an open source time-series database designed for speed. We will also review a history of some of the changes we have gone over the past two years to deal with late and unordered data, non-blocking writes, read-replicas, or faster batch ingestion.
Adjusting OpenMP PageRank : SHORT REPORT / NOTESSubhajit Sahu
For massive graphs that fit in RAM, but not in GPU memory, it is possible to take
advantage of a shared memory system with multiple CPUs, each with multiple cores, to
accelerate pagerank computation. If the NUMA architecture of the system is properly taken
into account with good vertex partitioning, the speedup can be significant. To take steps in
this direction, experiments are conducted to implement pagerank in OpenMP using two
different approaches, uniform and hybrid. The uniform approach runs all primitives required
for pagerank in OpenMP mode (with multiple threads). On the other hand, the hybrid
approach runs certain primitives in sequential mode (i.e., sumAt, multiply).
Unleashing the Power of Data_ Choosing a Trusted Analytics Platform.pdfEnterprise Wired
In this guide, we'll explore the key considerations and features to look for when choosing a Trusted analytics platform that meets your organization's needs and delivers actionable intelligence you can trust.
Adjusting primitives for graph : SHORT REPORT / NOTESSubhajit Sahu
Graph algorithms, like PageRank Compressed Sparse Row (CSR) is an adjacency-list based graph representation that is
Multiply with different modes (map)
1. Performance of sequential execution based vs OpenMP based vector multiply.
2. Comparing various launch configs for CUDA based vector multiply.
Sum with different storage types (reduce)
1. Performance of vector element sum using float vs bfloat16 as the storage type.
Sum with different modes (reduce)
1. Performance of sequential execution based vs OpenMP based vector element sum.
2. Performance of memcpy vs in-place based CUDA based vector element sum.
3. Comparing various launch configs for CUDA based vector element sum (memcpy).
4. Comparing various launch configs for CUDA based vector element sum (in-place).
Sum with in-place strategies of CUDA mode (reduce)
1. Comparing various launch configs for CUDA based vector element sum (in-place).
06-04-2024 - NYC Tech Week - Discussion on Vector Databases, Unstructured Data and AI
Round table discussion of vector databases, unstructured data, ai, big data, real-time, robots and Milvus.
A lively discussion with NJ Gen AI Meetup Lead, Prasad and Procure.FYI's Co-Found
1. Workshop / Industry Sessions
Proposal Deadline
Saturday November 1, 2014,
11:59.59 PM (PST)
Friday October 3, 2014,
11:59.59 PM (PST)
Paper/Poster Submission
Deadline
Friday January 30, 2015,
11:59.59 PM (PST)
Friday January 16, 2015,
11:59.59 PM (PST)
Author Notification
Monday March 2, 2015
Camera-Ready Papers Due
Friday March 20, 2015
Submit your paper here
General Chairs
Claudia Di Napoli
ICAR-CNR, IT
Valentina Salapura
IBM, US
Program Chairs
Hubertus Franke
IBM Research, US
Rui Hou
Institute for Computing
Technology, Chinese Academy of
Sciences, PRC
For more information, visit the
website at
www.computingfrontiers.org
ACM International Conference on Computing Frontiers 2015
May 18 - 21, 2015, Ischia, Italy
www.computingfrontiers.org
Program Overview
Detailed Schedule
Computing Frontiers 2015 - Program http://www.computingfrontiers.org/2015/program.html#Keynote 2
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2. Monday May 18
13:00 Registration open
14:00-17:00 Workshops
Individual workshop programs to be announced.
Tuesday May 19
08:45 Registration open
08:55-09:00 Conference Opening
09:00-10:00 Keynote 1
Chair: Claudia Di Napoli
Network Oblivious Algorithms
Gianfranco Bilardi (abstract/bio)
10:00-10:20 (break)
10:20-11:35 Session Modeling and Characterization - I
Chair: Francesca Palumbo
10:20-10:45 An Empirical High level performance model for future many-cores
Surya Narayanan Natarajan, Bharath Narasimha Swamy and André Seznec
10:45-11:10 Just-in-time Component-wise Power and Thermal Modeling
Shah Mohammad Faizur Rahman, Qing Yi and Houman Homayoun
11:10-11:35 An Instrumentation Approach for Hardware-Agnostic Software Characterization
Andreea Anghel, Laura Mihaela Vasilescu, Rik Jongerius, Gero Dittmann and Giovanni Mariani
11:35-11:45 (short break)
11:45-13:00 Session Computer Architectures
Chair: Carsten Trinitis
11:45-12:10 Near Threshold Cloud Processors for Dark Silicon Mitigation: The Impact on Emerging Scale-out
Workloads
Jing Wang, Junwei Zhang, Weigong Zhang, Keni Qiu, Tao Li and Minhua Wu
12:10-12:35 An energy-efficient custom architecture for the SKA1-Low central signal processor
Leandro Fiorin, Erik Vermij, Jan Van Lunteren, Rik Jongerius and Christoph Hagleitner
12:35-13:00 Data Access Optimization in a Processing-in-Memory System
Zehra Sura, Arpith Jacob, Tong Chen, Bryan Rosenburg, Olivier Sallenave, Carlo Bertolli, Samuel
Antao, Jose Brunheroto, Yoonho Park, Kevin O'Brien and Ravi Nair
13:00-14:20 (lunch)
14:20-15:35 Session Compilers/Languages and Frameworks
Chair: Antonio Tumeo
14:20-14:45 Compiler Analysis for OpenMP Tasks Correctness
Sara Royuela, Roger Ferrer, Diego Caballero and Xavier Martorell
14:45-15:10 Genesis: A Language for Generating Synthetic Training Programs for Machine Learning
Alton Chiu, Joseph Garvey and Tarek Abdelrahman
15:10-15:35 A Significance-Driven Programming Framework for Energy-Constrained Approximate Computing
Vassilis Vassiliadis, Charalampos Chalios, Konstantinos Parasyris, Christos D. Antonopoulos, Spyros
Lalis, Nikolaos Bellas, Hans Vandierendonck and Dimitrios S. Nikolopoulos
15:35:16:00 (break)
16:00-17:00 Poster Flash Talks
Chair: Hubertus Franke
ProductiveC: Enabling High Productivity in C-Family Languages
Hongbo Rong
Heterogeneous Energy-Efficient Cache Design in Warehouse Scale Computers
Jing Wang, Xiaoyan Zhu, Jiaqi Zhang, Minhua Wu, Weigong Zhang and Keni Qiu
B2L: A Case for Buffered and Bufferless Hybrid NoCs
Juan Fang, Sitong Liu, Zhenyu Leng, Shuying Song, Jianhua Wei and Yuening Wang
Removing Duplicated Writes in DB Checkpointing with File System-Level Block Remapping
Daejun Park and Dongkun Shin
Two-Level Logging with Non-Volatile Byte-Addressable Memory in Log-Structured File Systems
Yeonseong Hwang, Hyunho Gwak and Dongkun Shin
Handling Consistent Web Service Recovery in a RESTful Way
Anna Kobusinska, Mateusz Holenko and Piotr Zierhoffer
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3. Optimizing the Accuracy of a Satellite Trajectory Simulation by Program Transformation
Nasrine Damouche, Matthieu Martel and Alexandre Chapoutot
Enhancing an x86_64 Multi-Core Architecture with Data-Flow Execution Support
Alberto Scionti, Ho Nam, Andrea Mondelli, Marco Solinas, Antoni Portero and Roberto Giorgi
A Practical Evaluation of Synchronicity in Action Potentials with Noise
Jonathan Edwards and Simon O'Keefe
A Practical Framework for Real-time Diffusion Analysis in Social Media
Miki Enoki, Issei Yoshida and Masato Oguchi
Approximating Dictionary-Based Optimal Data Compression on a Distributed System
Sergio De Agostino:University of Rome La Sapienza
Understanding the Limiting Factors of Page Migration in Hybrid Main Memory
Santiago Bock, Bruce Childers, Rami Melhem and Daniel Mosse
Free Atomic Consistency in Storage Class Memory with Software Based Write-Aside Persistence
Ellis Giles, Kshitij Doshi and Peter Varman
Programmer-directed Partial Redundancy for Resilient HPC
Omer Subasi, Javier Arias, Osman Unsal, Jesus Labarta and Adrian Cristal
The improved parallel Ray Casting Algorithm in embedded multi-core DSP Systems
Congliang Hu, Fugen Zhou and Li Tian
17:00-18:00 Poster Presentations
19:00 Session Welcome Reception
Wednesday May 20
09:00-10:00 Keynote 2
Chair: Valentina Salapura
From managing Data to managing Cogs: Digital Transformation & Data is changing our ways to work and interact with machines
Pietro Leo (abstract/bio)
10:00-10:20 (break)
10:20-11:35 Session Algorithms and Applications
Chair: Josef Weidendorfer
10:20-10:45 Enhanced GPU-based Distributed Breadth First Search
Giancarlo Carbone, Enrico Mastrostefano, Massimo Bernaschi, Massimiliano Fatica and Mauro Bisson
10:45-11:10 An Evaluation and Analysis of Graph Processing Frameworks on Five Key Issues
Yun Gao, Wei Zhou, Jizhong Han, Dan Meng, Zhiyong Xu and Zhang Zhang
11:10-11:35 Optimizing Irregular Applications for Energy and Performance on the Tilera Many-core Architecture
Daniel Chavarrýýa-Miranda, Ajay Panyala, Mahantesh Halappanavar, Joseph Manzano and Antonino Tumeo
11:35-11:45 (short break)
11:45-13:00 Session Fault Tolerance and Quantum Computing
Chair: Pedro Trancoso
11:45-12:10 Hierarchical Synthesis of Quantum and Reversible Architectures
Archimedes Pavlidis and Dimitris Gizopoulos
12:10-12:35 Cooperative Repair Based on Tree Structure for Multiple Failures in Distributed Storage Systems with Regenerating Codes
Xiaoqiang Pei, Yijie Wang, Xingkong Ma, Yongquan Fu and Fangliang Xu
12:35-13:00 Asteroid: Scalable Online Memory Diagnostics
Musfiq Rahman and Bruce R. Childers
13:00-14:20 (lunch)
14:20-16:00 Session Resource Management
Chair: Huo Rui
14:20-14:45 TaPEr: Tackling Power Emergencies in the Dark Silicon Era by Exploiting Resource Scalability
Hui Zhao, Mahmut Kandemir and Mary Jane Irwin
14:45-15:10 HRF: A Resources Allocation Scheme for Moldable Jobs
Song Wu, Qiong Tuo, Hai Jin, Chuxiong Yan and Qizheng Weng
15:10-15:35 Scheduling Stream Programs with Improving Arithmetic Unit Usage on NoC-based VLIW Multi-core Architectures
Guoyue Jiang, Zhaolin Li, Fang Wang and Shaojun Wei
15:35-16:00 Chrysso: An Integrated Power Manager for Constrained Many-Core Processors
Sudhanshu Shekhar Jha, Wim Heirman, Ayose Falcon, Trevor E.Carlson, Kenzo Van Craeynest, Jordi Tubella, Antonio Gonzalez and Lieven
Eeckhout
16:00:16:25 (break)
16:25-16:50 Session Modeling and Characterization - II
Computing Frontiers 2015 - Program http://www.computingfrontiers.org/2015/program.html#Keynote 2
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4. Chair: Hubertus Franke
16:25-16:50 Achieving High Throughput and Low Delay in Mobile Data Networks by Accurately Predicting Queue Lengths
Ke Liu and Jack Y.B. Lee
16:50-17:15 Position-Aware Thread-Level Speculative Parallelization for Large-Scale Chip-multiprocessor
Li Yanhua, Youhui Zhang and Weimin Zheng
17:15-17:40 SARP: Producing Approximate Results with Small Correctness Losses for Cloud Interactive Services
Rui Han, Junwei Wang, Fengming Ge, Jose Luis Vazquez-Poletti and Jianfeng Zhan
19:00 Session Conference Banquet
Thursday May 21
09:10-10:50 Session Memory Technologies and Storage
Chair: Silvia Rossi
09:10-09:35 Software-Managed Energy-Efficient Hybrid DRAM/NVM Main Memory
Ahmad Hassan, Hans Vandierendonck and Dimitrios S.Nikolopoulos
09:35-10:00 DP^2: Reducing Transaction Overhead with Differential and Dual Persistency in Persistent Memory
Long Sun, Jiwu Shu and Youyou Lu
10:00-10:25 Dysource: A High Performance and Scalable NAND Flash Controller Architecture Based on Source Synchronous Interface
Lizhou Wu, Nong Xiao, Fang Liu, Yimo Du, Shuo Li and Yang Ou
10:25-10:50 ETD-Cache: An Expiration-Time Driven Cache Scheme to Make SSD-based Read Cache Endurable and Cost-efficient
Ningwei Dai, Yunpeng Chai, Yushi Liang and Chunling Wang
10:50-11:20 (break)
11:20-13:00 Session Networking
Chair: Valentina Salapura
11:20-11:45 HOSA: Hybrid Optical Switch Architecture for Data Center Networks
Muhammad Imran, Martin Collier, Pascal Landais and Kostas Katrinis
11:45-12:10 Fast packet forwarding engine based on software circuits
Marc X. Makkes, Ana Varbanescu, Cees de Laat, and Robert Meijer
12:10:12:35 AMTCP: An Adaptive Multi-path Transmission Control Protocol
Long Li, Nongda Hu, Ke Liu, Binzhang Fu, Mingyu Chen and Lixin Zhang
12:35-13:00 BandArb: Mitigating the Effects of Thermal and Process Variations in Silicon-Photonic Network
Yi Xu, Jun Yang and Rami Melhem
13:00-14:20 (lunch)
14:20-15:35 Session Tools and Social
Chair: Jens Breitbart
14:20-14:45 Scaling Application Properties to Exascale
Giovanni Mariani, Andreea Anghel, Rik Jongerius, and Gero Dittmann
14:45-15:10 Moving to Memoryland: In-Memory Computation for Existing Applications
Pedro Trancoso
15:10-15:35 Socialness in the Recruiting of Software Engineers
Jens Ehlers
15:35-15:45 Closing
Computing Frontiers 2015 - Program http://www.computingfrontiers.org/2015/program.html#Keynote 2
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