CPU Organization, Control Units, Instruction Formats & Sets S.Y. B.Tech IT - PCCoE Pune References: Stallings, Mano, Tanenbaum, Hayes

1. Computer Organization &
Architecture
CPU Organization, Control Units,
Instruction Formats & Sets
S.Y. B.Tech IT - PCCoE Pune
References: Stallings, Mano,
Tanenbaum, Hayes

2. Introduction
• Understanding how computer hardware
executes instructions
• Relationship between CPU, Memory, and I/O
• Focus: CPU Organization, Control Unit Design,
Instruction Formats and Sets

3. CPU Organization
• Major Components: ALU, Control Unit,
Registers, Buses
• General Purpose vs Special Purpose Registers
• Performance Factors: Clock speed, CPI,
Pipelining

4. Hardwired Control
• Control signals generated by combinational
logic
• Fast operation but inflexible
• Difficult to modify once implemented

5. Micro-programmed Control
• Uses control memory (ROM) to store
microinstructions
• Easier to modify, slower than hardwired
• Horizontal vs Vertical Microprogramming

6. Instruction Formats
• Components: Opcode, Operand(s), Addressing
Mode
• Fixed-length and Variable-length formats
• Examples from M. Morris Mano

7. Instruction Sets
• Definition: Complete set of instructions CPU
can execute
• CISC vs RISC architectures
• Addressing modes: Immediate, Direct,
Indirect, Register

8. Types of Operations
• Data Transfer: MOV, LOAD, STORE
• Arithmetic: ADD, SUB, MUL
• Logical: AND, OR, XOR
• Control Flow: BRANCH, JUMP
• I/O Instructions

9. RISC vs CISC
• RISC: Simple instructions, one per cycle, large
register set
• CISC: Complex instructions, multiple cycles,
fewer registers
• Trade-offs in performance, power, and
complexity

10. Summary
• CPU design impacts performance and
flexibility
• Control units can be hardwired or
microprogrammed
• Instruction formats and sets determine
capabilities
• RISC vs CISC is a major architectural choice

11. References
• William Stallings, Computer Organization and
Architecture, 10th Ed., Pearson
• M. Morris Mano, Computer System
Architecture, 3rd Ed., Pearson/PHI
• Andrew S. Tanenbaum, Structured Computer
Organization, 5th Ed., Pearson Education
• John P. Hayes, Computer Architecture and
Organization, 3rd Ed., Tata McGraw-Hill

12. CPU Organization - Block Diagram

13. RISC vs CISC Comparison