- 1. Selective Active Filtering for Four-Wire Loads: Control and Balance of Split Capacitor Voltages Gonzalo Casaravilla, Gabriel Eirea, Gabriel Barbat, Jos´ Inda and Fernando Chiaramello e Instituto de Ingenier´a El´ ctrica - Universidad de la Rep´ blica ı e u Julio Herrera y Reissig 565, CP 1300, Montevideo - Uruguay Email: [gcp, geirea, gabarbat, joseinda, fchiara]@ﬁng.edu.uy Abstract - This paper presents a controller for the DC voltages iL iC on the split capacitor topology for a four-wire selective active SYS. LOAD ﬁlter. A simple model for the dynamics of the two capacitor PLL n2 voltages is derived under the assumption of time-scale separation between the dynamics of the inverter currents and the capacitor i* 3 F +1 1 -1 1 + n1 λ1 3 / λ2 / voltages. The controller proposed is based on physical principles + + 3 + 3 iF and can be easily integrated with existing four-wire active ﬁlter controllers based on instantaneous reactive power (p-q) theory. Simulations and experimental results illustrate the beneﬁts of the CLARKE ioF* solution proposed. Multiple bandpass filter I. I NTRODUCTION Selective active ﬁlters are used for compensating perturba- Fig. 1. Selective ﬁltering scheme including the homopolar channel. tions introduced by nonlinear loads in the utility network in the form of reactive power and harmonic distortion. In the case of unbalanced loads, a homopolar current is also introduced in vα = + sen wct the neutral wire. In order to eliminate this undesirable current, -1 a four-wire selective active ﬁlter can be used, either by adding p pF iFα iα α p-q λ p-q α +/-n a fourth leg to a voltage source inverter (VSI) or by using Theory ω Theory iα α λ iFα α the split capacitor topology. The latter is a more economical MOD λ DEMOD iβ β iFβ β solution but presents the challenge of controlling both the iβ β iFβ β wo total DC voltage and the voltage balance between the two q ω qF -1 capacitors. vβ = Previous works have shown ways to control shunt active − cos wct selective ﬁlters [1] [2] (series and parallel methods) depending on the selected control type [3]. These works are typically Fig. 2. Selective ﬁlter basic cell (SFBC) and its symbol. about three-wire circuits, where homopolar currents are not considered. From the expression of homopolar currents as a sequences function [4] shown in (1), it is evident that channels iα (t) and iβ (t) are completely decoupled from io (t). In par- Therefore, ﬁltering the homopolar component can be ticular, homopolar channel io (t) only depends on homopolar achieved by adding a separate ﬁlter to the homopolar channel harmonic components I0n . as shown in Fig. 1. This selective ﬁltering scheme was ∞ proposed in [5] and is based on the selective ﬁlter basic cell √ (SFBC) [6] [7] shown in Fig. 2. iα (t) = 3I+n sin(wn t + δ+n ) + n=1 An alternative way of controlling a four-wire shunt active ∞ √ ﬁlter was presented in [8], in which a nonlinear model-based 3I−n sin(wn t + δ−n ) (1) controller is proposed. There are, however, no clear guidelines n=1 ∞ for selecting the controller parameters. √ iβ (t) = − 3I+n cos(wn t + δ+n ) + This paper extends the results in [5] by presenting a detailed n=1 analysis of the DC voltages regulation loop. A small-signal ∞ √ dynamic model is derived in Sec. II. The model shows that 3I−n cos(wn t + δ−n ) (2) the dynamics of the total voltage and the dynamics of the n=1 ∞ difference between the two capacitor voltages are decoupled, √ io (t) = 6I0n sin(wn t + δon ) (3) so the design of the controller is simpliﬁed. Simulation and n=1 experimental results are presented in Sec. III. 978-1-4244-1668-4/08/$25.00 ©2008 IEEE 4636
- 2. SFBC (labeled as +1) that controls the amount of positive- iL iC sequence fundamental current in phase with the grid voltage. DISTORTING LOAD On the other hand, in order to balance VDC1 and VDC2 , i∗ (in o iN fact io ) is drained from the middle point of the capacitors. For POWER GRID example if the difference between VDC1 and VDC2 (relative VOLTAGE LEVEL iF ADJUSTMENT TRANSFORMERS to VDC ) increases, the control drains a current i∗ that tends o (one per phase) to increase VDC2 and reduce VDC1 . + In the next subsection, a simple small-signal model for the VDC1 - C dynamics of the DC voltages is derived. It is shown that this + control strategy creates two decoupled loops. The model is VDC2 C SHUNT ACTIVE - also shown to be useful for optimizing the performance of the FILTER in control loop. VSI: VOLTAGE SOURCE INVERTER B. Analysis of the Control Loop Fig. 3. Four wire VSI with split DC bus. The dynamics of the capacitor voltages are usually much slower than the dynamics of the VSI currents. Under this assumption, the VSI can be represented as a static mapping VDC from the reference currents to the actual currents. As shown in + + ¥¤£ Fig. 5 the VSI references are the desired ﬁlter currents iF α , VDC ¡ p* iF β and i∗ , which the inverter is going to follow with an - + oF internal current control method that is of no interest in this + derivation. Without loss of generality, the p-q transformation VDC ¢ io* can be lumped into the VSI and therefore it can be assumed - that the VSI references are actually pF , qF and i∗ . On oF the other hand, the actual currents on the VSI will affect Fig. 4. VDC and balance control strategy. the capacitor voltages. The outputs of interest for feedback VDC1 −VDC2 purposes are VDC1 +VDC2 and VDC1 +VDC2 as shown in Fig. 4. In spite of its complexity, the ﬁltering mechanisms in Fig. 5 II. C ONTROL OF THE DC VOLTAGES are actually of no relevance to the DC voltage control loop. In A. Control Strategy fact, they are located in the feedforward path so the reference signals they generate can be considered external perturbations The four-wire VSI used is shown in Fig. 3. In order to with no effect on the performance and stability of the feedback control the total voltage VDC = VDC1 + VDC2 and to loop. To clarify this concept, the control loop is redrawn as in balance voltages VDC1 and VDC2 , a new decoupled strategy Fig. 6. was proposed in [5]. The controller is shown in Fig. 4. The For the purpose of analyzing the feedback loop it is neces- compensation signals p∗ and io ∗ are utilized as shown in sary to derive the mappings from the commanded active power Fig. 5. and the commanded homopolar current to the VSI currents on This control strategy is based on physical concepts. In order the DC side. Then, those currents are applied to the capacitors to control VDC , active power (in fact instantaneous active to derive the output voltages as illustrated in Fig. 7. The total power p) is subtracted or added to the busbar. This is achieved active power at the VSI DC-side can be computed as by injecting the p∗ control signal in the p channel of the last p∗ = iC1 vC1 + iC2 vC2 . F (4) iL p* iC The neutral current is SYS. LOAD PLL pF* - -1 1 p +1 in = iC1 − iC2 (5) i* 3 F α iFα + α iα 3 √ / β iFβ 1 β iβ -1 n2 n1 / where in = 3io (Clarke transformation). 3 3 qF* q From (4) and (5), the capacitor currents are iF -1 +1 ioF* CLARKE p∗ + in vC2 F + iC1 = vC1 + vC2 io* - Multiple bandpass filter p∗ − in vC1 F iC2 = . (6) vC1 + vC2 Fig. 5. Complete four-wire selective ﬁltering control strategy including control of the DC voltages. This implies that the dynamics of the capacitor voltages are 4637
- 3. pF qF ioF the load homopolar current is measured, then the transformer + VDCref + K1 p∗ ratio must be considered. − − VDC1 + VDC2 The outputs are deﬁned as y1 = x1 and y2 = x2 . The x1 small-signal relationship is then VSI y1 1 0 x1 = 0 1 . (10) VDC1 −VDC2 VDC1 +VDC2 y2 VDCref x2 + + i∗ ∆VDC = 0 K2 o From (9) and (10) the two-input two-output transfer function − − is 2 1 2 VDCref C s+ RC 0 H(s) = √ . (11) 3 1 0 1 VDCref C s+ RC Fig. 6. DC voltages control loop. It is then conﬁrmed that this control strategy actually decou- iC1 ples the two loops and the controller design reduces to two standard single-input single-output (SISO) loops with a ﬁrst- + order plant on each. vC1 C R in III. S IMULATIONS AND E XPERIMENTAL R ESULTS − + In this section simulated results made with Simulink and an experimental validation of the implementation of the control vC2 C R in the DSP TM320F2812 (kit F2812 eZdsp) are shown. The − VSI current control is hysteretic at a regular sampling period. Data: VDCref = 340V , C = 4400µF , grid voltage iC2 U = 380V , grid frequency f = 50Hz, L = 10mH. The Fig. 7. Simpliﬁed model of the VSI DC-side. transformer indicated in Fig. 3 has a ratio of 220 : 55 = 4. The sample and control frequency was fm = 20kHz (400 samples for each grid cycle) so Tm = 50µs. The time delay given by introduced by the DSP depends on the number of harmonic sequences being ﬁltered, and is equal to 16.2µs plus 2.8µs dvC1 vC1 per homopolar sequence and 3.2µs per positive or negative C = iC1 − dt R sequence. p∗ + in vC2 F vC1 = − Having in mind the commutation losses, this sampling and vC1 + vC2 R control frequency is equivalent to a fm = 20kHz/2 = 10kHz dvC2 vC2 averaging P W M current control. C = iC2 − dt R Figure 8 shows the selective ﬁlter operation for a dim- p∗ − in vC1 F vC2 merized resistive load. The line current is shown before and = − . (7) vC1 + vC2 R after applying the ﬁlter. Three different conﬁgurations of the Let x1 = vC1 + vC2 and x2 = vC1 − vC2 , then selective ﬁlter are shown: ﬁltering all harmonics (up to the dx1 2p∗ − in x2 x1 17th), ﬁltering only 5th and 7th harmonics, and ﬁltering only F C= − the homopolar multiples-of-3 harmonics. No passive ﬁlters dt x1 R were used in this experiment. dx2 x2 C = in − (8) The small-signal model (11) is validated with a simulation dt R of the DC voltage response to a step in the reference voltage. The equations are nonlinear, so a small-signal model will The PI controllers were tuned to achieve a bandwidth of 10Hz be derived by linearization. The operation point (noted with and a phase margin of 45◦ , using standard techniques based on ∗ capital letters) is given by X1 = VDCref , X2 = 0, PF = the small-signal model. The bandwidth was selected such that 2 VDCref 2R , and In = 0. Then the small-signal model is the voltage regulation loops do not interfere with the proper 2 functioning of the ﬁlter; a justiﬁcation for this is included in d x1 − RC 0 x1 = 1 + the appendix. dt x2 0 − RC x2 The output of the small-signal model is compared to that of 2 VDCref C 0 p∗ F a full switched model and experimental results in Fig. 9. The (9) √ 0 3 i∗ o correlation between the models and the experimental results C √ is very good. where the relationship in = 3i∗ was used. Here, i∗ is the o o Figure 10 shows the responses of both the total voltage homopolar current at the inverter side of the transformer. If VDC1 + VDC2 and the difference VDC1 − VDC2 to a step in 4638
- 4. current (a) voltage (b) (c) (d) Fig. 8. Load current and selective ﬁltering. Left: voltage and current waveforms; right: line current spectrum. (a) Load current without ﬁltering. (b) Filtering all harmonics up to the 17th. (c) Filtering 5th and 7th harmonics. (d) Filtering homopolar multiple-of-3 harmonics. Response to a step in V Response to a step in ∆ V DCref ref 360 360 356 VDC1+VDC2 (V) 354 350 350 352 340 340 350 VDC1+VDC2 (V) 348 330 330 −0.5 0 0.5 1 −0.5 0 0.5 1 346 20 20 344 (V) 342 10 10 DC2 experiment −V switched simulation 340 DC1 averaged simulation 0 0 V 338 0 0.05 0.1 0.15 0.2 0.25 0.3 −10 −10 t (s) −0.5 0 0.5 1 −0.5 0 0.5 1 t(s) Fig. 9. Step response of the total voltage VDC1 + VDC2 to a change in the Fig. 10. Step response of the two voltage loops. This experiment shows the reference value. The small-signal model is compared with a switching model decoupling as predicted by the model. and experimental results. 4639
- 5. the reference for each loop. The decoupling between the two becomes very clear, in agreement with the model (11). ∞ In Figs. 9 and 10, the experimental voltage shown was p(t) ¯ = 3V+n I+n cos(φ+n − δ+n ) + acquired with the DSP that introduces noise due to the signal n=1 ∞ conditioning circuits. 3V−n I−n cos(φ−n − δ−n ) (17) IV. C ONCLUSIONS n=1 This paper presents a controller for the DC voltages on the split capacitor topology for a four-wire selective active p(t) = ˜ (18) ∞ ∞ ﬁlter. The main contribution of the paper is the derivation of a small-signal model for the dynamics of the DC voltages in 3V+m I+n cos[(wm − wn )t + φ+m − δ+n ] m=1 n=1 the two capacitors. This model enables the deﬁnition of the m=n controller parameters using standard techniques for LTI SISO ∞ ∞ systems. The beneﬁts of this approach are illustrated with + 3V−m I−n cos[(wm − wn )t + φ−m − δ−n ] simulations and experimental results. Further, the appendix m=1 m=n n=1 presents a theoretical justiﬁcation for selecting the bandwidth ∞ ∞ of the voltage control loops, also illustrated with experimental − 3V+m I−n cos[(wm + wn )t + φ+m + δ−n ] results. m=1 n=1 ∞ ∞ A PPENDIX − 3V−m I+n cos[(wm + wn )t + φ−m + δ+n ] This appendix shows that, under normal operation, the m=1 n=1 voltage at the capacitors have a ripple which has a frequency where wk = kw is the k-th harmonic frequency, V+k , that depends on the current harmonic sequences being ﬁltered. V−k and V0k are the amplitudes of the positive, negative The results included in this appendix are useful to deﬁne the and homopolar k-th harmonic sequences respectively (same bandwidth of the voltage control loops such that they do not notation for currents), and φ∗ and δ∗ are the angles for the interfere with the normal ﬁlter operation. corresponding harmonic sequence component for voltages and First, harmonic expressions for power and homopolar cur- currents respectively. rent are derived. Next, the effect of the oscillatory part of these Finally, the homopolar current is expressed in terms of the expressions on the capacitor voltages is derived. corresponding homopolar sequences: The three-phase power in a four-wire system is ∞ p3 = p0 + p (12) √ i0 (t) = 6I0n sin(wn t + δ0n ) (19) n=1 where p is the instantaneous power as deﬁned in the p − q transformation, and p0 is the instantaneous homopolar power. A. Homopolar sequence In steady-state, the instantaneous values p0 and p have In case of using the inverter to ﬁlter a unique homopolar average values of p0 and p respectively. Then, the oscillatory ¯ ¯ sequence of index n, from (19) the current can be expressed values p0 and p are deﬁned such that ˜ ˜ as √ i0 (t) = 6I0n sin(wn t + δ0n ) (20) p0 = p0 + p0 ¯ ˜ (13) p = p+p ¯ ˜ (14) Since there are no positive nor negative current harmonic sequences, from (17) and (18) p is zero which implies p3 = p0 . Expressions for p0 , p0 , p and p as a function of the harmonic ¯ ˜ ¯ ˜ Then, from (15) and (16) p3 is sequences (positive, negative and homopolar) of voltage and current in the three-phase system were presented in [4], [9] p3(t) = 3V0n I0n cos(φ0n − δ0n ) and reproduced here: − 3V0n I0n cos[(wn + wn )t + φ0n + δ0n ] (21) ∞ Assuming the inverter has only an inductive load (decou- p0 (t) = ¯ +3V0n I0n cos(φ0n − δ0n ) (15) pling impedance between the inverter and an ideal electric n=1 network) and setting arbitrarily δ0n = 0, then φ0n = π/2. The ﬁnal expressions for the homopolar current and the power are p0 (t) = ˜ (16) √ ∞ ∞ i0 (t) = 6I0n sin(wn t) (22) 3V0m I0n cos[(wm − wn )t + φ0m − δ0n ] p3(t) = −3V0n I0n cos[(2wn t) + π/2] (23) m=1 n=1 m=n ∞ ∞ For example, if n = 3 (ﬁltering the third harmonic of the − 3V0m I0n cos[(wm + wn )t + φ0m + δ0n ] homopolar) then i0 has a 3rd harmonic and p3 a 6th harmonic. m=1 n=1 When these inputs excite the system described by (8), the 4640
- 6. 20 0.5 In Vdc1+Vdc2 Ic1 0.4 10 Ic2 0.3 (A) 0 0.2 −10 0.1 −20 (V) 0 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02 0 time (s) −0.1 2 Vdc1+Vdc2 −0.2 Vdc1 1 Vdc2 −0.3 (V) 0 −0.4 −1 −0.5 0 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02 time (s) −2 0 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02 time (s) Fig. 12. Voltage ripple generated by ﬁltering the positive 3rd harmonic Fig. 11. Voltage ripple generated by ﬁltering the homopolar 3rd harmonic sequence on VDC1 + VDC2 . sequence. TABLE I C APACITOR VOLTAGE R IPPLE F REQUENCY resulting voltages vC1 and vC2 have a dominant ripple with 0n +n −n a 3rd harmonic with opposite phases, and the 6th harmonic vC1 + vC2 2n n−1 n+1 appears in the total voltage vC1 + vC2 due to the cancellation vC1 , vC2 n n−1 n+1 of the 3rd harmonic between vC1 and vC2 . This is illustrated vC1 − vC2 n – – by the experimental results shown in Fig. 11. B. Positive/negative sequence This result implies that the ripple at the capacitor voltages In this case the homopolar current is null, so i0 (t) = 0. has the same frequency as that of p3, namely w1 ∓ wn . In As in the previous section, the impedance seen by the Fig. 12 experimental results are shown when ﬁltering the +3 harmonic sequences is a pure inductance, for a given I±n harmonic sequence; as expected, a ripple at 100Hz appears at there will be a corresponding V±n . Then, the DC bus voltage. p(t) = +3V±n I±n cos(φ±n − δ±n ) ¯ (24) C. Combination of Sequences Setting arbitrarily δ±n = 0, then φ±n = π/2 which results in Although the system is non-linear, it was shown that p(t) = 0. ¯ to a ﬁrst-order approximation the dynamics are decoupled. Since the three-phase system is ideal, there is only V+1 , so Therefore, superposition can be applied to a certain extent. from (18) It is concluded that the harmonic components present in the p(t) = p3(t) = ±3V+1 I±n cos[(w1 ∓wn )t+φ+1 ∓δ±n ] (25) ˜ capacitor voltage ripples will be given by the results of the previous analysis, summarized in Table I. For example, if the harmonic sequence −3 is ﬁltered, then These results are illustrated with the experimental wave- p3 will have a frequency component at w1 + w3 = w4 which forms shown in Fig. 13, in which both the homopolar 3rd implies an oscillation at 4 × 50Hz = 200Hz. Similarly, if the sequence +3 is ﬁltered, the oscillation at p3 will happen at 100Hz. 0.5 Vdc1+Vdc2 Since i0 = 0, the solution to (8) is simpler than in the (V) 0 previous case and can be computed analytically. Clearly the difference between the voltage on the capacitors is zero so −0.5 0 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02 (t) vC 1(t) = vC 2(t) = vc2 . Let pM be the amplitude of p3 as 0.5 Vdc1 given in (25), and let arbitrarily choose φ+1 ∓ δ±n = 0. Then (V) 0 the result is −0.5 pM = ±3V+1 I±n (26) 0 0.002 0.004 0.006 0.008 0.01 0.012 0.014 0.016 0.018 0.02 0.5 1C Vdc2 e(0) = vc (0)2 (27) 22 (V) 0 4 pM −0.5 vc (t) = sin(w1 ∓ wn )t + e(0) (28) 0 0.002 0.004 0.006 0.008 0.01 time (s) 0.012 0.014 0.016 0.018 0.02 C w1 where vC (0) is the initial value for the total voltage on the Fig. 13. Voltage ripple generated by ﬁltering the homopolar 3rd and the −5 DC bus. harmonic sequences simultaneously. 4641
- 7. and the −5 harmonic sequences are being ﬁltered. As a [3] H. Akagi, “Control strategy and site selection of a shunt active ﬁlter for consequence, a 6th harmonic appears at the total voltage, and damping of harmonic propagation in power distribution systems,” IEEE Transactions on Power Delivery, vol. 12, no. 1, pp. 354–362, 1997. a superposition of a 3rd and a 6th harmonic appears at the [4] M. Aredes and E. H. Watanabe, “New control algorithms for series and individual capacitor voltages. shunt three-phase four-wire active power ﬁlters,” IEEE Trans. on Power Concluding, for a given selective harmonic ﬁlter, the min- Delivery, vol. Vol. 10(3), pp. 1649–1656, 1995. [5] G. Casaravilla, G. Barbat, J. Inda, and F. Chiaramello, “Optimum selective imum frequency of the voltage ripple can be computed. This active ﬁltering for four-wire loads: Dimming of high pressure na HID provides an upper bound for the bandwidth of the voltage lamps,” in COBEP - Congresso Brasileiro de Eletronica de Potencia, control loops. 2007. [6] G. Casaravilla, A. Salvia, C. Briozzo, and E. H. Watanabe, “Control strategies of selective harmonic current shunt active ﬁlter,” COBEP - 6th Brazilian Congress of Power Electronics, vol. Vol. 2, pp. 432–437, 2001. R EFERENCES [7] ——, “Control strategies of selective harmonic current shunt active ﬁlter,” IEE Proceedings on Generation, Transmission and Distribution, vol. 149, [1] G. Casaravilla, A. Salvia, C. Briozzo, and E. H. Watanabe, “Selective no. 6, pp. 689 –694, Nov. 2002. active ﬁlter applied to an arc furnace adjusted to harmonic emission [8] A. Valdez, G. Escobar, and E. Torres-Olgu´n, “A novel model-based ı limitations,” in IEEE / PES TyD Latin America, 2002. controller for a three-phase four-wire shunt active ﬁlter,” in Proc. of the [2] ——, “Series and parallel calculations methods for the reference current Power Electronics Specialists Conference, 2006. values in a selective shunt active ﬁlter.” in International Symposium on [9] H. Akagi, E. H. Watanabe, and M. Aredes, Instantaneous power theory Industrial Electronics of the IEEE, 2003, iEEE catalog Number 03th8692. and applications to power conditioning. IEEE Press - Wiley, 2007. 4642