The document discusses AF3, an open source tool framework for seamless model-based development. It provides specification languages, analyses like simulation and verification, and code generators. Several topics are covered, including model-based requirements analysis, automatic testcase generation using constraint logic programming, integrating model checking using temporal logic patterns, pervasive deployment and code synthesis from models, and multi-criteria synthesis for optimizing deployment to meet timing, energy efficiency and memory constraints. FPGA code generation from models is also mentioned.

1. AF3: Seamless Model BasedDevelopment
-FromTheory to Practice -
FB1

2. Seamlesswhat?
Seamless MBD isthepervasiveuse of
modelsthroughoutall developmentphases
HigherProductivity
HigherAnalyzability
HigherQuality
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3. AF3 at a Glance
 Tool framework for seamless model-based development
» http://af3.fortiss.org/
 Open Source, Apache 2.0 License
 Specification languages
 Basic: components architecture, state machines, technical platform, deployment, ...
 Analyses
 Basic: simulation, on-the-fly verification of constraints
 Generators
 Basic: code generation – e.g. embedded C, Java, ...

4. AF3 at a Glance
 Tool framework for seamless model-based development
» http://af3.fortiss.org/
 Open Source, Apache 2.0 License
 Specification languages
 Basic: components architecture, state machines, technical platform, deployment, ...
 Advanced:modes, temporal logics, ...
 Analyses
 Basic: simulation, on-the-fly verification of constraints
 Advanced:
» test cases generation (random, state/transition coverage)
» model checking using verification patterns
 Generators
 Basic: code generation – e.g. embedded C, Java, ...
 Advanced:scheduling synthesis, FPGA code generation, ...

5. Modular Framework Architecture
Adequate
Application Hardware System
Editors Requirements BehaviorSpeci
Design Environment Deployment
fications
Metamodel
GenericToolingframework
Generators
EMF, GEF, …
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6. Todays AF3 Topics
 Model-basedIntegratedRequirements Analysis
 Automatic Testcase Generation
 Model CheckingfortheMasses
 PervasiveDeployment, Code Synthesis and Rollout
 OptimizedRealtime Schedule Generation
 FPGA Code Generation and Deployment
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7. Model-basedIntegratedRequirements Analysis
DongyueMou, Sabine Teufl

8. Model-based RE?
 Extend AF3 to support Requirements Engineering
 Capture informal requirements
 Refine requirements into formal system specifications
Front-loading
EarlyAnalyses
CompleteTraceability
https://projects.fortiss.org/redmine/public/projects/re-for-af3
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9. Features
 Template for general requirements and use cases
 Generation of requirement documents
 Verification of completeness, correctness and
consistency
 Visual presentation of requirement hierarchy
 Integration of requirements and logical architecture
 Support of Message Sequence Chart
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10. Future Works
 Introduction of functional architecture
 Integration of testing
 Automatic verification of refinement
 Support more requirement types
 Non-Functional Requirements
 Timing Constraints
 …
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11. Automatic Testcase Generation
Christian Pfaller, DongyueMou, Bernhard Schätz

12. Focus
 Methods and toolsupportfortheautomaticgeneration of
testcasesfrom (partially) executablemodels
Automatic Qualilty Assurance
 BMBF Project IMES (BMW, Itemis, …)
 Technology Transfer in industrialApplications
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13. Ecosystem
 Competencies: Constraint-LogicProgramming
 Cross-references: RACE
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14. Model CheckingfortheMasseswith AF3
Daniel Ratiu

15. ... fortheMasses?
ContinuousQuality Assurance
Process Support
 Usabilitychallenges of doingmodelchecking
» Model thesystem
» Write temporal logicsspecifications
» Interpret thecounterexample
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16. Goals
 Transfer modelchecking technology to practitioners
» Bring formal verificationcloser to commondevelopers
 Makethem „gettheidea“ in lessthan 10 minutes
 Wrapthetheory such thatitis „ready to use“
» Research on pragmaticaspects of formal verification (modelchecking)
 Integrate formal verification in a more agile process
» Continuouslywrite, save and check properties
 Defining a verification condition shouldtakelessthanoneminute
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17. DeeplyintegrateCadence SMV in AF3
 Specification of verificationconditionswiththehelp of TL patterns
 Basic, ready to usepatterns
 Advancedpatterns
 Simulatecounterexamples in the IDE
 ... orpresentthem as MSCs
 Support forblack-boxtemporal-logicsbasedspecifications
 Canbecheckedagainsttheimplementationcontinuously in theprocess
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18. AF3 Model Checking at a Glance
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19. A Pervasive Approach to
Deployment, Code Synthesis and Rollout
Florian Hölzl, Andreas Wandinger, Christoph Döbber

20. PervasiveDeployment?
 Decouple Application Logic from Execution Platform
 Parallelization of Application and Platform Development
 Automatic Code Synthesis and System Integration
Separation of Concerns
Independent Reuse of Application and Platform
Automatized System Rollout
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21. Deployment and Rollout
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22. Code Synthesis
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23. Future Work
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24. Multi – Criteria Synthesis for Efficient Deployment
Sebastian Voss

25. Multi-Criteria Synthesis?
 Integrate Application Logic on Execution Platform
 Semi-automatic Design Space Exploration Methods
 Multi-Criteria Trade-off Analysis (Timing, Energy-Efficiency,
Memory Consumption, …)
EfficientDeployment
OptimizedPartitioning and Mapping
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26. Multi – Criteria Synthesis for Efficient Deployment
Logical
Architecture
Efficient
Synthesis mechanisms Deployment
Technical
Architecture
 Based on AF3 component and platform architecture
 Design Space Exploration based on SMT-Solving
 Goals:
 Providing an efficient deployment (with respect to timing, energy-
efficiency, memory consumption, …) for multi-criteria problems
 Calculate an (optimized) partitioning and/or mapping of systems
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27. Multi – Criteria Synthesis for Efficient Deployment
Logical
Architecture
SMT – Solver
(e.g. Z3, YICES, …)
Scheduling
Model Synthesis
Mechanisms
Deployment
Optimization criteria
Extended DAG (e.g. E2E – latency,…)
Technical
Architecture
 Based on AF3 Component and Platform Architecture Schedule
 Extraction of the Component Precedence Relation
 Task and Message Schedule Generation for:
 Distributed Event-based Systems (e.g. based on CAN)
 Time-triggered Platform Architecture
 Multi-core Platform Architectures
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28. FPGA Code Generation
Chun Li

29. Focus
 Mode switchdiagrams – basedreconfigurable FPGA Code-
Generation
 System design andcodegeneration
» Editor and simulationsupport，VHDL code generation
 Deployment on FPGA Hardware(Run-Time Reconfigurable)
» Tool supportfor design on run-time reconfigurable FPGAs (XilinxVirtex II Pro )
ReconfigurableComputing
 Partner: TUM Lehrstuhl für Integrierte Systeme
 Exampleproject: AutoVision
 (http://www.lis.ei.tum.de/index.php?id=62)
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30. Workflow
Modes Automaton
Synthesizable VHDL Codes
Standalone self-reconfiguration with embedded
microprocessor
Competencies:
Model-based Systems Engineering
SW and HW Co-Design
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