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Agenda:
Friday, August 22, 2014 80386
Salient Features of 80386
Functional Block Diagram of 80836
Pin Description of 8086
Register Set of 80386
Flags
1
Friday, August 22, 2014 80386 2
Branch Instruction
Indirect Addressing Diagram
Address AOpcode
Instruction
Memory
Operand
Pointer to operand
Register Addressing Diagram
Register Address ROpcode
Instruction
Registers
Operand
Register Indirect Addressing Diagram
Register Address ROpcode
Instruction
Memory
OperandPointer to Operand
Registers
Friday, August 22, 2014 80386 8
°MIPS: “Three-address architecture”
• Arithmetic-logic specify all 3 operands
add $s0,$s1,$s2 # s0=s1+s2
• Benefit: fewer instructions  performance
°x86: “Two-address architecture”
• Only 2 operands,
so the destination is also one of the sources
add $s1,$s0 # s0=s0+s1
• Often true in C statements: c += b;
• Benefit: smaller instructions  smaller code
Direct Addressing Diagram
Address AOpcode
Instruction
Memory
Operand
Displacement Addressing Diagram
Register ROpcode
Instruction
Memory
OperandDisplacement
Registers
Address A
+
Friday, August 22, 2014 80386 11
• In 80386 & above, extended 32-bit register
names are: EAX, EBX, ECX, EDX, ESP,
EBP, EDI, and ESI.
• 64-bit mode register names are: RAX, RBX,
RCX, RDX, RSP, RBP, RDI, RSI, and R8
through R15.
• Important for instructions to use registers that
are the same size.
– never mix an 8-bit with a 16-bit register, an 8- or
a 16-bit register with a 32-bit register
– this is not allowed by the microprocessor and
results in an error when assembled

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Additional good diagrams

  • 1. Agenda: Friday, August 22, 2014 80386 Salient Features of 80386 Functional Block Diagram of 80836 Pin Description of 8086 Register Set of 80386 Flags 1
  • 2. Friday, August 22, 2014 80386 2
  • 3.
  • 5. Indirect Addressing Diagram Address AOpcode Instruction Memory Operand Pointer to operand
  • 6. Register Addressing Diagram Register Address ROpcode Instruction Registers Operand
  • 7. Register Indirect Addressing Diagram Register Address ROpcode Instruction Memory OperandPointer to Operand Registers
  • 8. Friday, August 22, 2014 80386 8 °MIPS: “Three-address architecture” • Arithmetic-logic specify all 3 operands add $s0,$s1,$s2 # s0=s1+s2 • Benefit: fewer instructions  performance °x86: “Two-address architecture” • Only 2 operands, so the destination is also one of the sources add $s1,$s0 # s0=s0+s1 • Often true in C statements: c += b; • Benefit: smaller instructions  smaller code
  • 9. Direct Addressing Diagram Address AOpcode Instruction Memory Operand
  • 10. Displacement Addressing Diagram Register ROpcode Instruction Memory OperandDisplacement Registers Address A +
  • 11. Friday, August 22, 2014 80386 11 • In 80386 & above, extended 32-bit register names are: EAX, EBX, ECX, EDX, ESP, EBP, EDI, and ESI. • 64-bit mode register names are: RAX, RBX, RCX, RDX, RSP, RBP, RDI, RSI, and R8 through R15. • Important for instructions to use registers that are the same size. – never mix an 8-bit with a 16-bit register, an 8- or a 16-bit register with a 32-bit register – this is not allowed by the microprocessor and results in an error when assembled

Editor's Notes

  1. 9
  2. 12
  3. 14
  4. 6
  5. 16