This paper describes an RF front-end receiver for DVB-SH implemented in a 90nm CMOS process. The receiver includes a low noise amplifier (LNA) based on current conveyors, a single to differential converter, and a mixer also based on current conveyors. Simulation results show the receiver has a conversion gain of 22.7dB, noise figure of 14.1dB, input return loss of -11.2dB, and IP3 of 11.5dBm while drawing 22.4mW from a ±1.2V supply.

1. AN RF RECEIVER BASED ON CURRENT CONVEYORS FOR DVB-SH
H. García-Vázquez, V. Pérez, R. Díaz, Sunil L. Khemchandani, J. del Pino
ABSTRACT
This paper describes a RF front-end based on current conveyors for DVB-SH (2.17-2.2 GHz) implemented in an UMC CMOS
90 nm process. This receiver includes a Low Noise Amplifier (LNA), a Single to Differential Converter and a Mixer. The LNA is
based on current conveyors topology. The Single to Differential Converter generates a pair of differential output signals from a
single input, which have balanced amplitude and phase. This converter is followed by a mixer based on current conveyors.
Post-layout simulations show a conversion gain of 22.7 dB, a 14.1 dB noise figure, an input return loss (S11) of -11.2 dB and
an output third-order intercept point (IP3) of 11.5 dBm. This combination draws 22.4 mW from a ±1.2 V supply.
CIRCUITS ANALYSIS RF FRONTEND SPECIFICATIONS FOR A DVB-SH
Receiver Architecture Zero-IF
LNA SINGLE TO DIFFERENTIAL
CONVERTER Sensitivity -112.55 dBm
VDD
VDD
Noise Figure 3dB
Io1
Io 2 RL
OUT RL Maximum Gain 92.55 dB
C Dynamic Range 86.05 dB
M 1 M 2 M 3 Maximum Input Level -25 dBm
M 2 M 3 VB1 Max. Required CNR 11.2 dB
IN
R
IN
OUT
Max. Channel Bandwidth 8 MHz
Io1 Io 2 VB1 VB2 M 1
IIP3 -0.17 dBm
VSS
ACS 60 dB
LNA SINGLE-TO-DIFFERENTIAL CONVERTER
•The LNA based on current conveyors. •It generates a pair of differential output signals RESULTS
•This architecture consists of a common gate gain from a single input. 0 30
S11
stage M1, followed by a source follower stage M2. •The bypass capacitor C reduces the error -2
CG
•Io1 and Io2 are used to bias the transistors with between the phases. -4
25
CMOS current mirrors. •The gain of the circuit can be modified with the -6
20
control voltages in order to use as automatic -8
S11(dB)
CG(dB)
control gain -10 15
VDD -12
MIXER 10
-14
M 1 M 3
V
M 2 M 5
-16
R F+ 5
.
M 4 -18
I IF + -20 0
V LO + M 1 X 1 2 3 4 5 6 7 8 9 10 1,8 1,9 2,0 2,1 2,2 2,3 2,4 2,5
Frequency (GHz) Frequency (GHz)
Z M 6 M 7
M 2 Y 20
NF 20
Y X 18
V R F-
Z
16
0
-20
R L
IDC
14
-40
M 8 M 9 12
V
POUT(dBm)
M 3
NF(dB)
LO - -60
10
M 4 X 8
-80
I IF - Z M 14 -100
Y M 10 M 11 M 12 M 13
6
Fundamen.
-120
M 15
4 IM3
V R F+ 2
-140
-160
0
1,8 1,9 2,0 2,1 2,2 2,3 2,4 2,5 -120 -100 -80 -60 -40 -20 0 20
VSS
Frequency (GHz) PIN(dBm)
MIXER
• A potentiometric MOSFET mixer with current conveyors connected as a transimpedance amplifier. RF Frequency 2.17-2.2 GHz
• The RF and LO signal frequencies can range from 2.17-2.2 GHz.
• The current conveyors transform the output switching quad current into a voltage.
Architecture Cero-IF
• To improve the linearity a class AB output stage (M4, M14, M5 and M15) has been employed. Channel Bandwidth 8 MHz
• The core of the current conveyor is composed of M6-M9, while the transistors M1-M3 and M10-M13 are
used as current sources. S11 -11.2 dB
Conversion Gain 22.7 dB
NF@4MHz 14.1 dB
Output IP3 11.5 dBm
Supply ±1.2 V
Power Comsumption 22.4 mW
Area (excluding pads) 0.26 mm x 0.13 mm
CONCLUSIONS
A RF receiver based on current conveyors for DVB-SH
was implemented in an UMC CMOS 90 nm process. This
RF receiver includes a LNA, a Single to Differential
Converter and a Mixer. The LNA is based on current
conveyors topology. The Single to Differential Converter
generates a pair of differential output signals from a
single input, which have balanced amplitude and phase.
ACKNOWLEDGEMENTS This converter is followed by a mixer based on current
This work is partially supported by the Spanish Ministry of Science and Innovation (TEC2008-
06881-C03-01 and TEC2011-28724-C03-02) ,the Spanish Ministry of Industry, Tourism and Trade conveyors. Post-layout simulations show a conversion
(TSI-020400-2010-55) and the “Programa de ayudas de Formación del Personal investigador, de gain of 22.7 dB, a 14.1 dB noise figure, an input return
la Agencia Canaria de Investigación, Innovación y Sociedad de la Información del Gobierno de
Canarias y la cofinanciación y tasa de cofinanciación del F.S.E.”.
loss (S11) of -11.2 dB and an output IP3 of 11.5 dBm.
This combination draws 22.4 mW from a ±1.2 V supply.
DCIS 2012
Avignon (France), 28-30 November