2. Cairo University
Faculty of Engineering
Computer Engineering Department
Introduction to Logic Design
Sunday/Thursday –2007/2008
Course Description:
Digital Logic Design, The nature of digital logic, numbering system, Boolean
algebra, karnaugh maps, decision –making elements, memory elements, latches,
flip-flops, design of combinational and sequential circuits, integrated circuits and
logic families, shift registers, counters and combinational circuits, adders,
substraters ,multiplication and division circuits, memory types. Exposure to logic
design automation software.
Credit: This course consists of 1 1 /2 lectures per week
Text book: M. Morris Mano, “ Digital Design” , third edition, Prentice Hall, 2002
References:
•M. Mano and C. R. Kime , “Logic and Computer Design Fundamentals”, Prentice
Hall, 2000.
•Daniel Gajski, “Principles of Digital Design”, Prentice Hall, 1997.
Dr. Ihab Talkhan
3. Instructor(s): Dr. Ihab E. Talkhan
This course is designed to introduce the student to the basic techniques
of design and analysis of digital circuits
Dr. Ihab Talkhan
4. Course contents:
# Title Assignments
1 Number Systems, 1‟s and 2‟s complements
2 Basic Gates #1
3 Boolean Algebra
4 Analysis of Combinational Circuits
5 Synthesis of Combinational Circuits using Karnaugh maps #2
6 NAND/NOR networks, don‟t care conditions, duality
7 Design Automation Software (PSPICE A/D)
8 Multiplexers, demultiplexers, decoders, encoders and parity circuits
9 Arithmetic circuits #3
10 Latches and Flip-Flops
11 Design of clocked sequential circuits using counters as examples
12 Shift registers and different types of counters
#4
13 Semiconductor memories
14 Design of circuits using ROMs and PLAs
15 Introduction to PLDs , CPLDs, & FPGAs and also VHDL (brief)
5. Grading: 60% (2 tests - no make-ups)
15% Attendance
25% Assignments (all assignments from the text
book, end of chapter selected problems)
Testing dates: to be announced later
Final test date: refer to First term Schedule
Assistant: to be announced later
Office hours: to be announced later
Dr. Ihab Talkhan
10. Course Ouline
Course Outline
Digital Circuits Digital Design Hardware Components
Analysis & Design Hardware & Micro-
program method
•Gates •Register Transfer Level •CPU (Central Processing
•Flip-Flops •Various components of a Unit)
•Combinational computer Hardware •I/O
•Sequential •Control Logic •Memory
Dr. Ihab Talkhan
11. Binary Logic
AND OR NOT (inverter)
-Represented by any of -Represented by any of -Represented by a bar
the following notations: the following notations: over the variable
• X .AND. Y • X .OR. Y • X
• X.Y • X+Y -Function definition:
• XY • XvY Z is what X is not
-Function definition: -Function definition: -It is also called
complement operation ,
Z = 1 only if X=Y=1 Z = 1 if X=1 or Y =1
as it changes 1’s to 0’s
or both X=Y=1
0 otherwise and 0’s to 1’s.
0 if X=Y=0
Dr. Ihab Talkhan
12. Binary Logic
AND OR NOT (inverter)
-Symbol: -Symbol -Symbol
-Truth Table -Truth Table -Truth Table
X Y Z X Y Z
X Z
0 0 0 0 0 0
0 1 0 0 1 1 0 1
1 0 0 1 0 1 1 0
1 1 1 1 1 1
Dr. Ihab Talkhan
13. Important Notes
Various binary systems suitable for representing information
in digital components [ decimal & Alphanumeric].
Digital system has a property of manipulating discrete
elements of information, discrete information is contained in
any set that is restricted to a finite number of elements, e.g. 10
decimal digits, the 26 letters of the alphabet, 25 playing cards,
and other discrete quantities.
Dr. Ihab Talkhan
14. Important Notes (cont.)
Early digital computers were used mostly for numeric
computations, in this case the discrete elements used were the
digits, from which the term digital computer has emerged.
Discrete elements of information are represented in a digital
system by physical quantities called signal [voltages &
currents] which have only two discrete values and are said to
be binary.
Dr. Ihab Talkhan
15. Electrical Signals [ voltages or currents ] that exist throughout a digital
system is in either of two recognizable values [ logic-1 or logic 0 ]
Voltage
5
Logic – 1 range
Intermediate
2
region, Transition , occurs
crossed only 0.8
between the two limits
during state Logic – 0 range
transition 0
time
Dr. Ihab Talkhan
16. Important Notes (cont.)
Digital computers use the binary number system that has two digits “0” and
“1”, a binary digit is called a “bit”, thus information is represented in
digital computers in groups of bits.
By using various coding technique, groups of bits can be made to represent
not only binary numbers but also any other group of discrete symbols.
To simulate a process in a digital computer, the quantities must be
quantized, i.e. a process whose variables are presented by continuous real-
time signals needs its signals to be quantized using an analog-to-digital
(A/D) conversion device.
Dr. Ihab Talkhan
17. Memory or Storage Unit The memory unit: stores programs,
inputs, outputs and other
intermediate data.
The processor unit: performs
CPU arithmetic and other data-processing
Central Processing Unit operations as specified by the
program.
The control unit: supervises the flow
Control Processor of information between the various
Unit Unit units. It also retrieves the
instructions, one by one, from the
program stored in memory and
informs the processor to execute
them
Input devices Output devices
Block Diagram of a Digital Computer
Dr. Ihab Talkhan
18. Important Notes (cont.)
A CPU enclosed in a small integrated circuit package is called
a microprocessor.
The program and data prepared by the user are transferred into
the memory unit by means of an input devices such as a
keyboard.
An output device, such as a printer, receives the results of the
computations and the printed results are presented to the user.
Dr. Ihab Talkhan
19. Numbering Systems
A number is base “r” contains r digits 0,1,2,…..(r-1) and is expressed with a
power series in “r”.
An r n An 1r n 1 .... A1r1 Ao r o A 1r 1
A 2r 2
...
A number can also be expressed by a string of coefficients [positional
notation].
Least significant digit
Most significant digit
An An 1....A Ao . A 1 A 2 ...
1
Radix point
Dr. Ihab Talkhan
20. Numbering Systems (cont.)
The Ai coefficients contain “r” digits, and the subscript “ i ”
gives the position of the coefficient, hence the weight ri by
which the coefficient must be multiplied.
To distinguish between numbers of different bases, we enclose
the coefficients in parentheses and place a subscript after the
right parenthesis to indicate the base of the number.
Dr. Ihab Talkhan
21. Decimal Numbers
The decimal number system is of base or radix r = 10, because the
coefficients are multiplied by powers of 10 and the system uses ten distinct
digits [0,1,2,…9].
Decimal number is represented by a string of digits, each digit position has an
associated value of an integer raised to the power of 10.
Consider the number (724.5)10
2 1 0 1
724.5 7 10 2 10 4 10 5 10
Dr. Ihab Talkhan
22. Conversion from Any numbering System to
Decimal System
To convert any numbering system to decimal, you expand the number to
a power series with its base.
Example:
Convert (312.4)5 to its equivalent decimal, note that the number is in
base 5.
2 1 0 1 Conversion
312.4 5 3 5 1 5 2 5 4 5 from base 5
number to its
75 5 2 0.8 equivalent
Radix 5 decimal
82.8 10 number
Dr. Ihab Talkhan
23. Computer Numbering Systems
Binary Octal Hexadecimal
Base 2 Base 8 Base 16
- It is a base 2 system - It is a base 8 system - It is a base 16 system
with two digits “0” & with eight digits from with sixteen digits
“1” 0-7 from 0 – 9 plus
A,B,C,D,E,F letters
- The decimal - The decimal
from the alphabet.
equivalent can be equivalent can be
found by expanding found by expanding - The decimal
the binary number to the Octal number to a equivalent can be
a power series with a power series with a found by expanding
base of 2. base of 8. the Hexadecimal
number to a power
series with a base of
16.
Dr. Ihab Talkhan
24. Binary Numbers
Converting a Binary number to its equivalent Decimal:
(11010.11)2
1101011 2 1 24 1 23 0 22 1 21 0 20 1 2
. 1
1 2 2
16 8 2 0.5 0.25
26.7510
Note that, when a bit is equal to “0”, it does not contribute to the sum
during the conversion. Therefore, the conversion to decimal can be
obtained by adding the numbers with powers of two corresponding to
the bits that are equal to “1’.
Dr. Ihab Talkhan
25. Computer Units
210 = 1024 is referred to as Kilo “K”
220 = 1,048,567 is referred to as Mega “M”
230 is referred to as Giga “G”
Example: 16M = 224 = 16,777,216
Dr. Ihab Talkhan
26. Conversion from Decimal to Binary
(Integer numbers only)
The conversion of a decimal number to binary is achieved by a
method that successively subtracts powers of two from the
decimal number, i.e. it is required to find the greatest number
(power of two) that can be subtracted from the decimal
number and produce a positive difference and repeating the
same procedure on the obtained number till the difference is
zero.
Dr. Ihab Talkhan
28. General Method
If the number includes a radix point, it is necessary to separate it into an
integer part and a fraction part, since each part must be converted
differently.
The conversion of a decimal integer to a number in base “r“ is done by
dividing the number and all successive quotients by “ r “ and
accumulating the remainders.
The conversion of a decimal fraction to base “ r “ is accomplished by a
method similar to that used for integer, except that multiplication by “ r
“ is used instead of division, and integers are accumulated instead of
remainders.
Dr. Ihab Talkhan
29. Example
Find the binary equivalent of (41.6875)10
Separate the number into an integer part & a fraction part.
Integer Part: Fraction Part:
remainder LSB Integer MSB
2 41
2 20 + ½ =1 0.6875 x 2 = 1.3750 1
2 10 =0 0.3750 x 2 = 0.7500 0
2 5 =0 0.7500 x 2 = 1.5000 1 LSB
2 2+½ =1 0.5000 x 2 = 1.0000 1
2 1 =0 MSB
0+½ =1 ( .6875)10 = ( .1011)2
Thus: (41.6875)10 L (101001.1011)2
(41)10 = (101001)2
Dr. Ihab Talkhan
30. Important Note
The process of multiplying fractions by “ r “ does not
necessarily end with zero, so we must stop at a certain
accuracy , i.e. number of fraction digits, otherwise this process
might go forever.
Dr. Ihab Talkhan
31. Octal Numbers
Octal number system is a base 8 system with eight digits [
0,1,2,3,4,5,6,7 ].
To find the equivalent decimal value, we expand the number in
a power series with a base of “ 8 ”.
Example:
(127.4)8 = 1 x 82 + 2 x 81 + 7 x 80 + 4 x 8-1
= (87.5)10
Dr. Ihab Talkhan
32. Hexadecimal Numbers
The Hexadecimal number system is a base 16 system with the
first ten digits borrowed from the decimal system and the
letters A,B,C,D,E,F are used for digits 10,11,12,13,14 and 15
respectively.
To find the equivalent decimal value, we expand the number in
a power series with a base of “ 16 ”.
Example:
(B65F)16 = 11 x 163 + 6 x 162 + 5 x 161 + 15 x 160
= (46687)10
Dr. Ihab Talkhan
33. Note
It is customary to borrow the needed “ r “ digits for the
coefficients from the decimal system, when the base of the
numbering system is less than 10.
The letters of the alphabet are used to supplement the digits
when the base of the number is greater than 10.
Dr. Ihab Talkhan
35. Important Property
The Octal & Hexadecimal systems are useful for representing
binary quantities indirectly because they posses the property
that their bases are powers of “2”.
Octal base = 8 = 23 & Hexadecimal base = 16 = 24, from
which we conclude:
Each Octal digit correspond to three binary digits
Each Hexadecimal digit correspond to four binary digits.
Dr. Ihab Talkhan
36. Conversion from Binary to
Octal/Hexadecimal
The conversion from Binary to either Octal or Hexadecimal is
accomplished by partitioning the Binary number into groups of
three or four digits each respectively, starting from the binary
point and proceeding to the left and to the right. Then, the
corresponding Octal or Hexadecimal is assigned to each
group.
Note that, 0‟s can be freely added to the left or right to the
Binary number to make the total number of bits a multiple of
three or four.
Dr. Ihab Talkhan
37. Example
Find the Octal equivalent of the Binary number:
( 10110001101011.11110000011)2
Added “0’s”
010 110 001 101 011 . 111 100 000 110
2 6 1 5 3 7 4 0 6
(010110001101011.111100000110)2 L(26153.7406)8
Dr. Ihab Talkhan
38. Example
Find the Hexadecimal equivalent of the Binary number:
( 10110001101011.11110000011)2
Added “0’s”
0010 1100 0110 1011 . 1111 0000 0110
2 C 6 B F 0 6
(10110001101011.11110000011)2 L(2C6B.F06)16
Dr. Ihab Talkhan
39. Conversion from Octal/Hexadecimal
to Binary
Conversion from Octal or Hexadecimal to Binary is done by a
procedure reverse to the previous one.
Each Octal digit is converted to a three-digit binary equivalent.
Each Hexadecimal digit is converted to its four-digit binary
equivalent.
Dr. Ihab Talkhan
40. Example
Find the Binary equivalent of (673.12)8
6 7 3 . 1 2
110 111 011 001 010
(673.12)8 = (110111011.001010)2
Dr. Ihab Talkhan
41. Example
Find the Binary equivalent of (3A6.C)16
3 A 6 . C
0011 1010 0110 1100
(3A6.C)16 = (110111011.001010)2
Dr. Ihab Talkhan
42. Important Note
The Octal or Hexadecimal equivalent representation
is more convenient because the number can be
expressed more compactly with a third or fourth of
the number of digits.
Dr. Ihab Talkhan
43. Carry
Two digits
Arithmetic 1 + 1 = 10
Binary 1+1=1
Dr. Ihab Talkhan
44. Arithmetic Operations
Arithmetic operations with numbers in base “ r “ follow the same rules
as for decimal numbers
Addition Subtraction
1 1 2 2
Augend 1 0 1 1 0 Minuend 1 0 1 1 0
Addend 1 0 0 1 1 Subtrahend - 1 0 0 1 1
Sum 1 0 1 0 0 1 Result 0 0 0 1 1
Dr. Ihab Talkhan
46. Notes
The rules for subtraction are the same as in decimal, except
that a borrow from a given column adds “2” to the minuend
digit.
In division, we have only two choices for the greatest multiple
of the divisor Zero and the divisor itself.
Dr. Ihab Talkhan
47. Arithmetic Operations with
Base “r” Systems
Arithmetic operations with Octal , Hexadecimal or any other
base “r” system is done by using the following methods:
Formulation of tables from which one obtains sums and
products of two digits in base “r”.
Converting each pair of digits in a column to decimal , add
the digits in decimal, and then convert the result to the
corresponding sum and carry in base “r” system.
Dr. Ihab Talkhan
48. Example
Add : (59F)16 + (E46)16
Hexadecimal Equivalent Decimal
5 9 F 1
E 4 6 5 9 15
1 3 E 5 14 4 6 Carry 1
19 14 21
=16+5
=16+3
Dr. Ihab Talkhan
49. Note
The idea is to add F+6 in hexadecimal, by adding the
equivalent decimals 15+6 = 21, then converting (21)10 back to
hexadecimal knowing that;
21 = 16+5 gives a sum digit of 5 and a
carry “1” to the next higher
order column digit
Dr. Ihab Talkhan
50. Multiplication
The multiplication of two base “r” numbers is done by
performing all arithmetic operations in decimal and converting
intermediate results one at a time.
Dr. Ihab Talkhan
51. Example
Multiply (762)8 x (45)8 carry
Octal Octal Decimal Octal
762 5x2 10=8+2 12
45 5 x 6 +1 31=24+7 37
4672 5 x 7 + 3 38=32+6 46
3710 4x2 8=8+0 10
43772 4 x 6 +1 25=24+1 31
4 x 7 + 3 31=24+7 37
Dr. Ihab Talkhan
52. Complements
Complements are used to simplify the subtraction operation and for logical
manipulation.
Types
Radix Complement Diminished radix Complement
r‟s complement (r-1)‟s complement
Given n-digit number N in base r, Given n-digit number N in base r,
its r’s complement is; its r’s complement is;
rn N N 0 (r n 1) N
0 N 0
Dr. Ihab Talkhan
53. Important Notes
The r‟s complement is obtained by adding “1” to the (r-1)‟s
complement.
r‟s complement of N can be formed by leaving all least
significant 0‟s unchanged, then subtracting the first nonzero
least significant digit from “r”, and subtracting all higher
significant digits from (r-1).
(r-1)‟s complement of N can be formed by subtracting each
digit from (r-1).
Dr. Ihab Talkhan
54. Examples
106-246700
10‟s complement of : 246700 753300
9‟s complement of : 246700 753299
(106-1)-246700
Dr. Ihab Talkhan
55. Binary 1‟s & 2‟s Complements
Note that ; 2n = a binary number which consists of a “1”
followed by n 0‟s.
2n – 1= a binary number represented by n 1‟s.
2‟s complement is formed by leaving all least significant 0‟s
and the first “1” unchanged, then replacing 1‟s with 0‟s and
0‟s by 1‟s in all other higher significant bits.
1‟s complement is obtained by changing 1‟s to 0‟s and 0‟s to
1‟s.
Dr. Ihab Talkhan
56. Note
The (r-1)‟s complement of Octal or Hexadecimal numbers is
obtained by subtracting each digit from 7 or f (15)
respectively.
If the number contains a radix point, then the point should be
removed temporarily in order to form the r‟s or (r-1)‟s
complement. The radix point is then restored to the
complemented number in the same relative position.
The complement of the complement restores the number to its
original value.
Dr. Ihab Talkhan
57. Subtraction with Complements
The subtraction method that is based or uses the borrow concept is less efficient
than the method that uses complements, when subtraction is implemented with
digital hardware.
The subtraction of two n-digit unsigned numbers, M-N in base “r” is done as
follows:
1. Add the minuend M to the r‟s complement of the subtrahend N;
M + (rn – N) = M- N + rn
2. If M≥N, the sum will produce an end carry rn, which is discarded, what is
left is the result “ M-N “.
3. If M < N, the sum does not produce an end carry and is equal to
rn – (N-M)
which is the r‟s complement of (N-M). to obtain the answer in a familiar
form, take the r‟s complement of the sum and place a negative sign in front.
Dr. Ihab Talkhan
58. Example (using 10‟s complement)
Consider the two numbers 72532 & 3250, it is required to apply the rules
for subtraction with complements with these two numbers, thus we have
two cases:
Case # 1:
M = 72532 & N = 3250, required M-N.
In this case M > N
Note that M has 5-digits and N has only 4-digits, rule number 1: both
numbers must have the same number of digits.
Note also,, the occurrence of the end carry signifies that M > N and the
result is positive.
Dr. Ihab Talkhan
59. M – N = 72532 – 03250
72532 72532
-03250 + 96750 10‟s Complement
1 69282 sum
Discard the
end carry
69282 is the required answer
Dr. Ihab Talkhan
60. Example (using 10‟s complement)
Case # 2:
M = 3250 & N = 72532, required M-N.
In this case M < N
Note that M has 5-digits and N has only 4-digits, rule
number 1: both numbers must have the same number of
digits.
Note also,, the absence of the end carry signifies that M <
N and the result is negative.
Dr. Ihab Talkhan
61. M – N = 03250 - 72532
03250 03250
-72532 + 27468 10‟s Complement
30718 sum
no carry
The required answer = - ( 10‟s complement of 30718)
= - 69282
Dr. Ihab Talkhan
62. Notes
When subtracting with complements, the negative answer is
recognized by the absence of the end carry and the
complemented result.
Dr. Ihab Talkhan
63. Subtracting with (r-1)‟s Complements
The (r-1)‟s complement can be used when subtracting two
unsigned numbers as the (r-1)‟s complement is one less than
the r‟s complement. Thus the result of adding the minuend to
the complement of the subtrahend produces a sum which is
one less than the correct difference when an end carry occurs.
Removing the end-carry and adding one to the sum is referred
to as an end-around carry.
Dr. Ihab Talkhan
64. 1‟s Complement
Example:
X – Y = 1010100 – 1000011
1010100 1010100
-1000011 + 0111100 1‟s Complement
1 0010000 sum
1 End-around carry
0010001 answer (X-Y)
Dr. Ihab Talkhan
65. 1‟s Complement (cont.)
Example (cont.):
Y – X = 1000011 – 1010100
1000011 1000011
-1010100 + 0101011 1‟s Complement
1101110 sum
Note that, there is no carry in this case
Answer = Y – X = - ( 1‟s complement of 1101110)
= - 0010001
Dr. Ihab Talkhan
66. Signed Binary Number
Positive integers including zero can be represented as unsigned
numbers.
Because of hardware limitations, computers must represent
everything with 1‟s & 0‟s, including the sign of a number.
The sign is represented with a bit, placed in the left-most
position of the number, where: 0 = positive sign &
1 = negative sign
Dr. Ihab Talkhan
67. Binary number
Binary Number
Signed number Unsigned number
The left most bit represents the The left most bit is the most
sign and the rest of the bits significant bit of the number
represent the number
X = 0 +ve The left
X = 1 -ve most bit X1010101011
Dr. Ihab Talkhan
68. Signed & Unsigned numbers
Unsigned 9
01001
Signed +9
Signed-
Unsigned 25 magnitude
System
11001
Signed -9
Dr. Ihab Talkhan
69. In computers, a signed-complement system is used to
represent a negative number, i.e. negative number is
represented by its complement.
8-bit representation
+9 0 0001001
Signed-magnitude representation 10001001
-9 Signed-1‟s complement representation 11110110
Signed-2‟s complement representation 11110111
Dr. Ihab Talkhan
70. The addition of two signed numbers, with negative numbers
represented in signed 2‟s complement form, is obtained from
the addition of the two numbers including their sign bits. A
carry out of the sign bit position is discarded.
Note that the negative numbers must be initially in 2‟s
complement and the sum obtained after the addition, if
negative, is in 2‟s complement form.
Dr. Ihab Talkhan
71. + 6 0000 0110 + 6 0000 0110
+ 13 0000 1101 - 13 1111 0011
2’s complement
+ 19 00010011 - 7 1111 1001
We must ensure that the result has sufficient number of bits to
accommodate the sum, if we start with two n-bit numbers and
the sum occupies n+1 bits, we say that an overflow occurs.
Dr. Ihab Talkhan
72. Note that binary numbers in the signed-complemented system are added
and subtracted by the same basic addition and subtraction rules as unsigned
numbers, therefore, computers need only one common hardware circuit to
handle both types of arithmetic.
The user / programmer must interpret the results to distinguish between
signed and unsigned numbers
Dr. Ihab Talkhan
73. Decimal Codes
n
The binary code is a group (string) of n bits that assume up to 2 distinct
combinations of 1‟s and 0‟s, with each combination representing one
element of the set that is being coded, the bit combination of an n-bit
code is determined from the count in binary from 0 to 2 n -1.
Each element must be assigned a unique binary combination and no two
elements can have the same value
Dr. Ihab Talkhan
75. Note , a number with “n” decimal digit will require “4n” bits
in BCD.
Note also, a decimal number in BCD is the same as its
equivalent binary number, only when the number is between 0
– 9. A BCD number > 10 looks different from its equivalent
binary number.
The binary combinations 1010 – 1111 are not used and have
no meaning in the BCD.
Dr. Ihab Talkhan
76. 185 10 000110000101 BCD 101110012
12 bit 8 bit
It is important to realize that BCD numbers are decimal numbers and not
binary numbers.
Dr. Ihab Talkhan
77. BCD Addition
Each digit in a BCD does not exceed 9, the sum can not be
greater than 9+9+1 = 19, where the “1” being a carry.
The binary sum will produce a result in the range from 0 to 19,
in binary it correspond to 0000 – 10011, but in BCD
0000 – 1 1001, thus when the binary sum is equal to or less
1001 (without a carry) the corresponding BCD is correct.
Dr. Ihab Talkhan
78. BCD Addition (cont.)
When the binary sum is 1010 , the result is an invalid
BCD digit.
To correct this problem, add binary 6 (0110) to the sum, which
converts the sum to a correct BCD digit and produces a carry
as required.
The value 6 corresponds to the 6 invalid combinations in the
BCD code (1010 – 1111).
Dr. Ihab Talkhan
79. Examples
4 0100 8 1000
4 0100
+ 8 1000 + 9 1001
+ 5 0101
12 1100 17 1 0001
9 1001
0110 0110 Add 6
1 0010 1 0111
Sum greater than 9 Sum greater than 16
carry
Dr. Ihab Talkhan
80. Example (2)
1 1 BCD carry
184 0001 1000 0100
+ 576 0101 0111 0110
0111 0000 1010 Binary sum
0110 0110 add 6
760 0111 0110 0000 BCD sum
Dr. Ihab Talkhan
82. For signed decimal numbers, the sign is represented with
“Four” bits to conform with the 4-bit code of the decimal
digits, where:
-ve sign = 1001 (9)
+ve sign = 0000 (0)
Many computers have special hardware to perform arithmetic
calculations directly with decimal numbers in BCD.
Dr. Ihab Talkhan
83. Other Decimal Codes
Binary codes for decimal digits require a minimum 4-bits per digit.
BCD 8421
Repeated code 2421
Excess-3 code 23 2 2 21 2 0
Negative code 8 4 -2 -1 Weighted
codes
Always add 3 (0011) to the
original binary number, e.g
Note, some
0000 0011 digits can be
coded in two
0001 0100 and so on
possible ways
Dr. Ihab Talkhan
84. Other Decimal Codes (cont.)
The 2421 & Excess-3 codes are self-complementing codes, i.e.
the 9‟s complement of a decimal number is obtained directly
by changing 1‟s to 0‟s and 0‟s to 1‟s.
BCD is not a self-complementing code
The 84-2-1 accepts positive & negative weights.
Dr. Ihab Talkhan
85. Notes
You should distinguish between conversion of a decimal
number to binary and the binary coding of a decimal number.
It is important to realize that a string of bits in a computer
sometimes represents a binary number and at other times it
represents information as specified by a given binary code.
Dr. Ihab Talkhan
86. Alphanumeric Codes
ASCII = American Standard Code for
Information Interchange
ASCII consists of 7-bits to code 128 characters
26 upper-case letters [ A,B,C,…]
26 lower-case letters [a,b,c,….]
128 10 decimal numbers [ 0- 9]
characters
32 special printable characters [ #,$,%,&,*,…..]
34 control characters (non-printing C/Cs)
Dr. Ihab Talkhan
87. Note that, binary codes merely change the symbols not the
meaning of the element of information.
The 34 control characters are used for routing data and
arranging the printed text into the prescribed format
Dr. Ihab Talkhan
88. The 34 control Characters
Control Characters
Communication
Format effectors Information separators
Control characters
Transmission of text
Separate data into
Layout of printing between remote
paragraphs & pages
terminals
Dr. Ihab Talkhan
89. Parity bit
ASCII code was modified to 8-bits instead of 7-bits. (ASCII is
1 byte in length)
1 byte = 8 bits
The extra bit, whose position is in the most significant bit [
default is “0”] , is used for:
Providing additional symbols such as the Greek Alphabet
or italic type format……etc
Indicating the parity of the character when used for data
communication.
Dr. Ihab Talkhan
90. Parity bit (cont.)
The parity bit is an extra bit included to make the total number of 1‟s in a row
either even or odd.
The bit is helpful in detecting errors during the transmission of information
from one location to another.
0 0011101
1 0011010
Even parity
1 0101001
1 0011001
Dr. Ihab Talkhan
91. Other Alphanumeric Codes
EBCDIC = Extended BCD Interchange Code, used in IBM. It
is 8-bits for each character and a 9th bit for parity.
Dr. Ihab Talkhan
92. Binary Logic
Digital circuits are hardware components that manipulate
binary information.
Gates are circuits that are constructed with electronics
components [ transistors, diodes, and resistors]
Boolean algebra is a binary logic system which is a
mathematical notation that specifies the operation of a gate [
Boolean => the English mathematician “George Boole” 1854 ]
Dr. Ihab Talkhan
93. Electrical Signals [ voltages or currents ] that exist throughout a digital
system is in either of two recognizable values [ logic-1 or logic 0 ]
Voltage
5
Logic – 1 range
Intermediate
2
region, Transition , occurs
crossed only 0.8
between the two limits
during state Logic – 0 range
transition 0
time
Dr. Ihab Talkhan
94. You should distinguish between binary logic and binary
arithmetic. Arithmetic variables are numbers that consist of
many digits. A logic variable is always either 1 or 0.
A Truth Table is a table of combinations of the binary
variables showing the relationship between the values that the
variables take and the result of the operation.
n
The number of rows in the Truth Table is 2 , n = number of
variables in the function.
The binary combinations are obtained from the binary
n
number by counting from 0 to 2 1
Dr. Ihab Talkhan
95. Carry
Two digits
Arithmetic 1 + 1 = 10
Binary 1+1=1
Dr. Ihab Talkhan
96. Binary Logic
AND OR NOT (inverter)
-Represented by any of -Represented by any of -Represented by a bar
the following notations: the following notations: over the variable
• X .AND. Y • X .OR. Y • X
• X.Y • X+Y -Function definition:
• XY • XvY Z is what X is not
-Function definition: -Function definition: -It is also called
complement operation ,
Z = 1 only if X=Y=1 Z = 1 if X=1 or Y =1
as it changes 1’s to 0’s
or both X=Y=1
0 otherwise and 0’s to 1’s.
0 if X=Y=0
Dr. Ihab Talkhan
97. Binary Logic
AND OR NOT (inverter)
-Symbol: -Symbol -Symbol
-Truth Table -Truth Table -Truth Table
X Y Z X Y Z
X Z
0 0 0 0 0 0
0 1 0 0 1 1 0 1
1 0 0 1 0 1 1 0
1 1 1 1 1 1
Dr. Ihab Talkhan
98. AND and OR gates may have more than two inputs.
Timing diagrams illustrate the response of any gate to all
possible input signal combinations.
The horizontal axis of the timing diagram represents time and
th vertical axis represents the signal as it changes between the
two possible voltage levels
Dr. Ihab Talkhan
99. Timing Diagram
input 1 X 0 0 1 1
input 2 Y 0 1 0 1
AND X.Y 0 0 0 1
OR X+Y 0 1 1 1
NOT X 1 1 0 0
Dr. Ihab Talkhan
100. Logic Function Definition
Language description
Function description
Boolean Equation
Graphic Symbols
Truth Table
Timing Diagram
Coding (HDL)
Dr. Ihab Talkhan
101. Other Gates
NAND = AND-Invert NOR – Invert-OR XOR ( odd ) XNOR (even )
-Symbol: -Symbol -Symbol -Symbol
-Truth Table -Truth Table -Truth Table -Truth Table
X Y Z X Y Z X Y Z X Y Z
0 0 1 0 0 1 0 0 0 0 0 1
0 1 1 0 1 0 0 1 1 0 1 0
1 0 1 1 0 0 1 0 1 1 0 0
1 1 0 1 1 0 1 1 0 1 1 1
Z=X.Y Z=X+Y Z X Y Z X Y
Dr. Ihab Talkhan
102. Building the Basic Functions
from Other gates
Using NAND Gates Basic Function Using NOR Gates
A A A A
NOT (inverter)
A
A AND AB
AB
B
B
A
A
A+B OR A+B
B
B
Dr. Ihab Talkhan
103. Boolean Algebra
It is an algebra that deals with binary variables and logic
operations:
A Boolean function consists of:
An algebraic expression formed with binary variables.
The constants “0” and “1”
The logic operation symbol ( . , +, NOT)
Parentheses and an equal sign
Dr. Ihab Talkhan
104. Example
Given a logic function “F”, defined as follows:
F= 1 if X = 1 or if both Y & Z are equal to 1
0 otherwise
The logic equation that represents the above function is given
by:
F X YZ
Dr. Ihab Talkhan
105. X Y Z F
The truth table for the given function is 0 0 0 0
as shown.
0 0 1 1
The Boolean function can be transformed
0 1 0 0
from an algebraic expression into a
circuit diagram composed of logic gates. 0 1 1 0
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1
Dr. Ihab Talkhan
106. Logic Circuit Diagram
OR
AND
F X YZ
output
Complement = need an inverter
X
F X YZ
Y
Z
Note : the number of inputs equal the number of variables
Dr. Ihab Talkhan
107. Notes
There is only one way to represent a Boolean function in a
Truth Table, where there are a variety of ways to represent the
function when it is in algebraic form.
By manipulating a Boolean expression according to Boolean
Algebra rules, it is sometimes possible to obtain a simpler
expression for the same function, thus reducing the number of
gates in the circuit.
Dr. Ihab Talkhan
108. Basic Identities of Boolean Algebra
description
Duality
X + 0 =X X.1=X
X+1=1 X.0=0
X+X=X X.X=X
X+X=1 X.X=0
X = X
Commutative X + Y = Y +X XY = YX
Associative X+(Y+Z) = (X+Y)+Z X(YZ) = (XY)Z
Distributive X(Y+Z) = XY + XZ X+YZ=(X+Y)(X+Z)
DeMorgan
X Y X.Y X.Y X Y
Dr. Ihab Talkhan
109. Duality
The dual of an algebraic expression is obtained by
interchanging OR and AND operations and replacing
1‟s by 0‟s and 0‟s by 1‟s.
Notice that when evaluating an expression, the
complement over a single variable is evaluated first ,
then the AND operation and the OR operation
( ) NOT AND OR
Dr. Ihab Talkhan
110. Extension of DeMorgan‟s Theorem
X1 X2 X 3 ... X n X1 .X 2 .X 3 ..X n
X1 .X 2 .X 3 .....X n X1 X2 X 3 .. X n
Dr. Ihab Talkhan
111. Algebraic Manipulation
F XYZ XY Z XZ
XY Z Z XZ using X(Y Z) XY XZ
XY.1 XZ using X X 1
XY XZ using X.1 X
Dr. Ihab Talkhan
112. F XYZ XYZ XZ
X Y Z F
0 0 0 0
0 0 1 0
0 1 0 1
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 0
1 1 1 1
F XY XZ
Dr. Ihab Talkhan
113. The Consensus Theorem
XY XZ YZ XY XZ
Which Shows that the term YZ is redundant and can be eliminated
Proof:
XY XZ YZ XY XZ YZ ( X X)
XY XZ XYZ XYZ
XY XYZ XZ XYZ
XY(1 Z) XZ(1 Y)
XY XZ
Dr. Ihab Talkhan
114. The Dual of Consensus Theorem
X Y X Z Y Z X Y X Z
Notice that, two terms are associated with one variable and its
complement and the redundant term is the one which not contain the
same variable.
Dr. Ihab Talkhan
115. Complement of a Function “F”
The complement of a function “F” is obtained by
interchanging 1‟s to 0‟s and 0‟s to 1‟s in the values of “F” in
the Truth Table.
OR, it can be derived algebraically by applying DeMorgan‟s
Theorem.
The complement of an expression is obtained by interchanging
AND and OR operations and complementing each variable.
Dr. Ihab Talkhan
116. Example
F XY Z X YZ
F XY Z X YZ
XY Z . X YZ
X Y Z.X Y Z
Or by taking the dual of the expression:
The original function F XY Z X YZ
The dual of F Fdual X Y Z.X Y Z
Complement each literal F X Y Z X Y Z
The complement of a function is done by taking the dual of the function
and complement each literal.
Dr. Ihab Talkhan
117. Standard Forms
Standard Forms
Product terms Sum Terms
AND operation among several variables OR operation among several variables
0 = complemented variable 1 = complemented variable
1 = uncomplemented variable 0 = uncomplemented variable
A product term in which all the variables appear exactly once either
complemented or uncomplemented is called a “minterm”, note that there are
2 n distinct “minterm” for n-variables.
Dr. Ihab Talkhan
118. An algebraic expression representing the function is derived from the
Truth Table by finding the logical sun of all product terms for which the
function assumes the binary value of “1”.
A symbol for each minterm m j , where “j” denotes the decimal
equivalent of the binary number of the minterm.
A sum term that contain all the variables in complemented or
uncomplemented form is called “maxterm”, symbol M j
Note that
Mj mj
Dr. Ihab Talkhan
119. Example
Product SUM
X Y Z F
term symbol sum symbol
0 0 0 X Y Z m0 X Y Z M0 1
0 0 1 X YZ m1 X Y Z M1 0
0 1 0 XY Z m 2 X Y Z M2 1
0 1 1 X YZ m3 X Y Z M3 0
1 0 0 XY Z m4 X Y Z M4 0
1 0 1 XYZ m5 X Y Z M5 1
1 1 0 XYZ m6 X Y Z M6 0
1 1 1 XYZ m7 X Y Z M7 1
Dr. Ihab Talkhan
120. Example
Sum of Product SOP F XY Z XY Z X YZ XYZ
m0 m2 m5 m7
m 0,2,5,7
F m 1,3,4,6
Product of Sum POS
F M1 M 3 M 4 M 6
m1 m 3 m 4 m 6
m1 m3 m4 m6
X Y Z X Y Z X Y Z X Y Z
M 1,3,4,6
Note that the decimal numbers included in the product of maxterms
will always be the same as the minterm list of the complement
function
Dr. Ihab Talkhan
121. Properties of minterm
n
1. There are 2 minterm for n-Boolean variables which can be evaluated
n
from the binary numbers 0 to 2 1
2. Any Boolean function can be expressed as a logical sum of minterms.
3. The complement of a function contains those minterms not included in the
original function
n
4. A function that includes all 2 minterms is equal to logic-1.
Dr. Ihab Talkhan
122. AND gates followed by OR gate forms a circuit configuration
that is referred to as a Two-Level implementation (SOP).
Two-Level implementation is preferred as it produces the least
amount of delay time through the system.
Delay is defined as the time that a signal spends to propagate
from input to output.
Also, Product of Sum (POS) is a two-level implementation, as
it consists of a group of OR gates followed by an AND gate.
Dr. Ihab Talkhan
124. Karnaugh map (k-map)
Each square corresponds to a row of the Truth-Table and to one minterm of
the algebraic equation.
Only one digit changing value between two adjacent rows and columns.
One square represent one minterm, giving a term of four variables (in case
of 4-varaiable map).
Two adjacent squares represent a term of three literals
Four adjacent squares represent a term of two literals.
Eight adjacent squares represent a term of one literal.
Sixteen adjacent squares represent F=1.
When a variable appears within a group in both inverted and non-inverted
state, then the variable can be eliminated.
Dr. Ihab Talkhan
125. K-map Procedure
Fill the map from the Truth-Table.
Look at 1‟s (where F=1).
Make the biggest group possible:
•Squares in a group = 2 n , n=0,1,2,…
•Adjacent cells
•Cover all 1‟s
Any square can appear in more than one group.
Get expression for each group.
OR all expressions.
Dr. Ihab Talkhan
126. One digit change value at a time
CD
AB 00 01 11 10 Cell
00 0 1 3 2
01 4 5 7 6
11 12 13 15 14
10 A BCD 8 9 11 10 POS
SOP A B C D
Dr. Ihab Talkhan
127. Note that there are cases where two squares in the map are considered to
be adjacent,, even though they do not touch each other.
YZ
X 00 01 11 10
0 0 1 3 2
1 4 5 7 6
Dr. Ihab Talkhan
128. Example
F A, B, C, D m 0,1,2,4,5,6,8,9,12,13,14
AB CD 00 01 11 10
00 1 0 1 1 3 1 2
01 1 4 1 5 7 1 6
11 1 12 1 13 15 1 14
10 1 8 1 9 11 10
F C A D BD
Dr. Ihab Talkhan
129. Example 2
F A, B, C, D ABC BCD ABCD ABC
AB CD 00 01 11 10
00 1 0 1 1 3 1 2
01 4 5 7 1 6
11 12 13 15 14
10 1 8 1 9 11 1 10
F BD BC ACD
Dr. Ihab Talkhan
130. Prime Implicant
A prime implicant is a product term obtained by combining the
maximum possible number of adjacent squares in the map.
If a minterm in a square is covered by only one prime
implicant , that prime implicant is said to be essential.
Dr. Ihab Talkhan
131. YZ
X 00 01 11 10
0 0 1 1 1 3 2
1 1 4 1 5 7 1 6
F XZ XZ XY
XZ XZ YZ
XZ & X Z essential prime implicants
X Y & YZ non - essential prime implicants
Dr. Ihab Talkhan
132. Example 1
CD
AB 00 01 11 10
00 0 1 1 1 3 2
01 1 4 1 5 1 7 1 6
11 1 12 13 15 1 14
10 8 9 11 10
F AD BD AB
Non-essential prime
essential prime implicant
implicants
Dr. Ihab Talkhan
133. Note that, once the essential prime implicants are taken, the third term is not
needed (redundant), as all the minterms are already covered by the essential
prime implicants, thus:
F AD BD
Dr. Ihab Talkhan
134. Example 2
AB CD 00 01 11 10
00 1 0 1 3 2
01 4 1 5 7 6
11 1 12 1 13 1 15 14
10 8 9 1 11 1 10
Non-essential
F ABCD BCD ABC ABC ACD
or
ABD
Dr. Ihab Talkhan
135. Complement of a Function
The complement of a function is represented in the K-map by
the squares (cells) not marked by 1‟s.
Dr. Ihab Talkhan
136. Product of Sums (POS)
To represent any function as a product of sums (POS), we take the dual of
and complementing each literal, i.e. we get: F
F F
Dr. Ihab Talkhan
137. Example
F A, B, C, D 0,1,2,5,8,9,10
CD
F AB CD BD
AB 00 01 11 10
dual F A B C D B D 00 1
0 1
1 3 1
2
complementing each literal 01 4 1
5 7 6
F A B C D B D 11 12 13 15 14
10 1
8 1
9 11 1
10
Dr. Ihab Talkhan
138. Don‟t Care Terms
There are applications where the function is not specified for
certain combinations of variables, e.g. the four-bit binary code
(BCD code) where there are six combinations from 10 – 15
which are not used and consequently are considered as
unspecified.
These unspecified minterms are called “don‟t care” terms and
can be used on a map to provide further simplification of the
function by considering it as 1‟s or 0‟s (depending on the
situation).
Don‟t care terms are represented by a cross “X” in the map.
Dr. Ihab Talkhan
139. Example
AB CD 00 01 11 10
00 X 0 1 1 1 3 X 2
01 4 X 5 1 7 6
11 12 13 1 15 14
10 8 9 1 11 10
F1 CD AB F2 CD AD
Algebraically these two functions are not equal , as both covers
different don’t care minterms, but the original function is satisfied as
don’t care terms will not affect the original function
Dr. Ihab Talkhan
140. K-map with more than 4-variables
Five-variable map needs 32-cell
Six-variable map needs 64-cell & so on.
In general, maps with six or more variables needs too many
cells and they are impractical to be analyzed manually, there
special program (simulation programs) that can handle such
situation.
Dr. Ihab Talkhan
141. 5-variables Map
We use two four-variables maps, the first one has a the variable A=0 as a
common factor, and the second has a common factor A=1.
Each cell in the A=0 map is adjacent to the corresponding cell in the A=1
map, e.g.
k
a
Any adjacent cells , k=0,1,2,3,4, in the 5-variable map represents a product
term of 5-k literals.
m4 m20 & m15 m31
Dr. Ihab Talkhan
143. Example
F ( A, B, C, D, E) m(0,2,4,6,9,13,21,23,25,29,31)
DE DE
BC 00 01 11 10 BC 00 01 11 10
00 1 0 1 3 1 2 00 16 17 19 18
01 1 4 5 7 1 6 01 20 1 21 1 23 22
11 12 1 13 15 14 11 28 1 29 1 31 30
10 8 1 9 11 10 10 24 1 25 27 26
common A=1
A=0
F A BE BDE ACE
Dr. Ihab Talkhan
144. Other Gates
NAND = AND-Invert NOR – Invert-OR Buffer
-Symbol: -Symbol -Symbol
-Truth Table -Truth Table -Truth Table
X Y Z X Y Z
X Z
0 0 1 0 0 1
0 1 1 0 1 0 0 0
1 0 1 1 0 0 1 1
1 1 0 1 1 0
Z=X.Y Z=X+Y Z X
Dr. Ihab Talkhan
145. NAND and NOR gates are more popular than AND and OR gates, as they are
easily constructed with electronic circuits and Boolean functions can be
easily implemented with them.
X X
Y XY Y X Y XY
AND-invert Invert-OR
Two Graphic Symbols for a NAND gate
Dr. Ihab Talkhan
146. X X
Y X Y Y XY X Y
OR-invert invert-AND
Two Graphic Symbols for a NOR gate
Dr. Ihab Talkhan
147. The implementation of Boolean functions with NAND gates requires that the
function be in the SOP form.
F AB CD Double inversion
AND & OR gates
Mixed notation, both NAND gates
AND-invert & invert-
OR are present
Dr. Ihab Talkhan
148. Example
X F(X, Y, Z) m 1,2,3,4,5,7
Y
00 01 11 10
X F
Y 0 0 1 1 1 3 1 2
1 1 4 1 5 1 7 6
Z
Note that Z must have a one-input NAND F X Y XY Z
gate to compensate for the small circle in
X
the second level gate
Y
X F
Y
Z
Dr. Ihab Talkhan
149. Steps to Configure SOP with NAND gates
1. Simplify the function (SOP)
2. Draw a NAND gate for each product term and the inputs to
each NAND gate are the literals of the product term. (group
of the first-level gates)
3. Draw a single gate using AND-invert or invert-OR graphic
symbol in the second level.
4. A term with a single literal requires an inverter in the first
level.
Dr. Ihab Talkhan
150. Another Rule for converting
AND/OR into NAND
1. Convert all AND/OR using AND-invert/invert-OR.
2. Check all the small circles in the diagram. For every small
circle that is not counteracted by anther small circle along
the same line, insert an inverter (one-input NAND gate) or
complement the input variable.
Dr. Ihab Talkhan
151. Example
F AB AB C D
A A
B B
A A
B B
F F
C C
D D
Dr. Ihab Talkhan
152. Exclusive-OR Gate / Equivalence gate
XOR ( odd ) XNOR (even )
-Symbol -Symbol
XOR is equal to “1” XNOR is equal to “1”
if only one variable if both X & Y are equal
is equal to “1” but to “1” or both are
not both equal to “0”
-Truth Table -Truth Table
X Y Z X Y Z
0 0 0 0 0 1
0 1 1 0 1 0
1 0 1 1 0 0
1 1 0 1 1 1
Z X Y Z X Y
X Y XY XY X Y
Dr. Ihab Talkhan
153. XOR/XNOR identities
X 0 X
X 1 X
X X 0
X X 1
X Y X Y
X Y X Y
Commutative : X Y Y X
Associativ e : (X Y) Z X (Y Z) X Y Z
X Y Z XY XY Z (XY X Y) Z
XY Z XY Z XYZ XYZ
Dr. Ihab Talkhan
154. Parity Generation & Checking
It used for error detection.
The circuit that generates the parity bit in the transmitter is
called a parity generator.
The circuit that checks the parity in the receiver is called a
parity checker.
Dr. Ihab Talkhan
155. Even parity generator/checker
X Y Z P C
0 0 0 0 0
0
0
0
1
1
0
1
1
0
0
P X Y Z
0 1 1 0 0
1 0 0 1 0
C X Y Z P
1 0 1 0 0
1 1 0 0 0
1 1 1 1 0
Parity generator Parity Checker
Dr. Ihab Talkhan
156. Transmission Gates
This gate is available with CMOS type electronic circuits.
C
X TG Y
C
C 1 X & Y are inputs C 0
C 0 C & C are control inputs C 1
Pass signal Open Switch
Dr. Ihab Talkhan
157. Using Transmission gates to construct An
Exclusive-OR gate (XOR)
Z X Y
X Y XY
TG1
TG2
X Y TG1 TG2 Z
0 0 Close Open 0
0 1 Close Open 1
1 0 Open Close 1
1 1 Open Close 0
Dr. Ihab Talkhan
158. Integrated Circuits
It is a small silicon semiconductor crystal, called a chip,
containing the electronic components for the digital gates.
Number of pins may range from 14 in a small OC package to
64 or more in a large package.
Dr. Ihab Talkhan
159. Levels of Integration
Small Scale Medium Scale Large Scale Very Large Scale Ultra Large Scale
Integration Integration Integration Integration Integration
SSI MSI LSI VLSI ULSI
•100 – few •Thousands for
•No. of gates < 10 •10 -100 gates
thousands gates gates
•Inputs & outputs •Decoder
•Processors •Large memory
are connected
•Adders arrays
directly to the pins •Memory chips
•Registers •Complex
•Programmable
microprocessors
modules
Dr. Ihab Talkhan
160. Logic Circuits Technology
Basic circuits in each technology is a NAND, NOR or an inverter.
Digital Logic Families
DTL TTL ECL MOS CMOS
Diode-Transistor Transistor- Emitter-Coupled Metal-Oxide Complementary
Logic Transistor Logic Logic Semiconductor Metal-Oxide
Semiconductor
•Diodes/transistors •High speed •High component
•Low power
operation density
•Power supply 5 V consumption
•Super computers •Simple processing
•Two logic levels technique during
[0V - 3.5V] •Signal processors
fabrication
•Standard
Dr. Ihab Talkhan
161. Notes
There are many type of the TTL family
High-speed TTL
Low-power TTL
Schottky TTL
Low-power Schottky TTL
Advanced Low-power Shcottky TTL
ECL gates operates in a nano-saturated state, a condition that
allows the achievement of propagation delays of 1-2
nanoseconds.
Dr. Ihab Talkhan
162. Important Parameters that are evaluated and
compared
Fan-out
Power-dissipation
Propagation delay
Noise margin
Dr. Ihab Talkhan
163. Fan-out
It specifies the number of standard loads that the output of a
typical gate can drive without impairing its normal operation.
A standard load is usually defined as the amount of current
needed by an input of another similar gate of the same family.
Dr. Ihab Talkhan
164. Power Dissipation
It is the power consumed by the gate which must be available
from the power supply.
Dr. Ihab Talkhan
165. Propagation Delay
It is the average transition delay time for the signal to
propagate from input to output when the binary changes in
value. The operating speed is inversely proportional to the
propagation delay.
Dr. Ihab Talkhan
166. Noise Margin
It is the maximum external noise voltage that causes an
undesirable change in the circuit output.
Dr. Ihab Talkhan
167. Positive & Negative Logic
Choosing the high-level “H” to represent logic “1” defines a positive logic
system.
Choosing the low-level “L” to represent logic “1” defines a negative logic
system.
Logic value Signal value Logic value Signal value
Positive logic Negative logic
Dr. Ihab Talkhan
168. Notes
The signal values “H” & “L” are usually used in the
components data sheets
The actual truth table is defined according to the definition of
“H” and “L” in the data sheet.
Dr. Ihab Talkhan
169. X Y Z X
L L L TTL Z
Data L H L
Y Gate
Sheet H
H
L
H
L
H
Depending on the definition of H &
L in the data sheet
X Y Z X Y Z
0 0 0
X X 0 0 1
0 1 0 Z 0 1 1
1 0 0
Y Y Z 1 0 1
1 1 1 1 1 0
These small triangle in the
inputs & output designate a
polarity indicator
Dr. Ihab Talkhan
170. Logic Circuits
Logic Circuits
Combinational Sequential
Consists of logic gates whose It involves storage elements (Flip-
outputs at any time are determined Flops).
directly from the values of the Outputs are a function of inputs
present inputs. and the state of the storage
No feedback or storage elements elements, where the state of the
are involved. storage elements is a function of
the previous inputs.
Circuit behavior must be specified
by a time sequence of inputs and
internal states.
Dr. Ihab Talkhan
171. Logic Circuits
Logic Circuits
Combinational Sequential
Inputs Outputs
n Combinational m Combinational
inputs Circuit Circuit
outputs Next
state
2 n possible input One possible Storage
combination output for each
binary elements
combination of
input variables Present state
Dr. Ihab Talkhan
172. A sequential circuit is specified by a time sequence of inputs, outputs and internal
states. It contain memory and thus can remember the changes of input signals that
occurred in the past.
Inputs for the sequential circuit are functions of external inputs and the present state
of the storage elements.
Both external inputs and the present states determine the binary value of the outputs
and the condition for changing the state of the storage state.
Outputs = f( external inputs , present states)
Next state = f( external inputs , present states)
Dr. Ihab Talkhan
173. Analysis Procedure
To obtain the output Boolean functions from a logic diagram:
1. Label all gate outputs that are a function of input variables with
arbitrary symbols. Determine the Boolean functions for each gate.
2. Label the gates that are a function of input variables and previous
labeled gates with different arbitrary symbols. Find the Boolean
functions for these gates.
3. Repeat step 2 until the outputs of the circuit are obtained in terms
of the input variables.
Dr. Ihab Talkhan
175. T1 BC , T2 AB
T3 A T1 A BC
T4 T2 D (AB) D ABD AD BD
T5 T2 D AB D
Thus the Boolean functions of F1 and F2 are:
F1 T3 T4 A BC ABD AD BD
A BC BD BD
F2 T5 AB D
Dr. Ihab Talkhan
176. Another Way using the Truth Table
1. Determine the number of input variables in the circuit for n-
inputs, list the binary number from 0 to 2n-1 in a table.
2. Label the outputs of the selected gates with arbitrary symbols.
3. Obtain the Truth Table for the outputs of those gates that are a
function of the input variables only.
4. Proceed to obtain the Truth Table for the outputs of those
gates that are a function of previously defined values until the
columns for all outputs are determined.
Dr. Ihab Talkhan
178. Design Procedure
1. Form the specifications of the circuit, determine the required
number of inputs and outputs and assign a letter (symbol) to
each.
2. Derive the Truth Table that defines the required relationship
between inputs and outputs.
3. Obtain the simplified Boolean functions for each output as a
function of the input variables.
4. Draw the logic diagram.
Dr. Ihab Talkhan
179. Need to Accomplish
1. Minimum number of gates
2. Minimum number of inputs to a gate
3. Minimum propagation delay of the signal through the gates
4. Minimum number of interconnections
Dr. Ihab Talkhan
180. Example
Design a combinational circuit with three X Y Z F
inputs and one output. The output must
equal “1” when the inputs are less than
three and “0” otherwise. [use only NAND 0 0 0 0 1
gates] 1 0 0 1 1
2 0 1 0 1
3 0 1 1 0
4 1 0 0 0
5 1 0 1 0
6 1 1 0 0
7 1 1 1 0
Dr. Ihab Talkhan
181. YZ
X 00 01 11 10
0 1 0 1 1 3 1 2
1 4 5 7 6
F XY XZ
X
Y
F XY XZ
Z
Mixed-symbol notation
Dr. Ihab Talkhan
182. Note
When a combinational circuit has two or more outputs, each output must
be expressed separately as a function of all the input variables.
Dr. Ihab Talkhan
184. CD 00 01 11 10 CD 00 01 11 10
AB AB
00 00 1 1 1
01 1 1 1 01 1
11 X X X X 11 X X X X
10 1 1 X X 10 1 X X
W A BC BD
A B(C D) X BC BD BCD
B(C D) BCD
Dr. Ihab Talkhan
185. CD 00 01 11 10 CD 00 01 11 10
AB AB
00 1 1 00 1 1
01 1 1 01 1 1
11 X X X X 11 X X X X
10 1 X X 10 1 X X
Y CD CD
Z D
C D
Dr. Ihab Talkhan
186. Logic Diagram of BCD to Excess-3
code Converter
Dr. Ihab Talkhan
187. BCD to Seven-Segment Decoder
Digital read-out found in electronic caculators and digital watches use
display devices such as light emitting diodes LED or liquid crystal display
LCD, each digit of the display is formed from seven segments.
Each consists of one LED or one crystal which can be illuminated by
digital signals.
Dr. Ihab Talkhan
