1. 1
A CAD FRAMEWORK
FOR FPGA-BASED SYSTEMS
luca.stornaiuolo@mail.polimi.it
Microsoft
06/07/2017
Alberto Scolari, Anna Maria Nestorov, Emanuele Del Sozzo, Enrico Reggiani,
Gianluca Durelli, Giuseppe Natale, Lorenzo Di Tucci, Luca Stornaiuolo,
Marco Rabozzi, Marco D. Santambrogio
NGCVIII
2017@SF
13. 13
Demo Application
Convolution filters for retinal
vessels segmentation
• The goals are:
– to speed up the “hot” portion of Vessel
– to show how CAOS can really help and ease
porting
14. 14
Vessels Segmentation
• Retinal vessels segmentation recognizes blood vessels
from retinal images.
• Vessel segmentation is essentially a convolution that
slides a 2D matrix onto the matrix representing the image
to process.
Nowadays, High performance processing systems are considering FPGA-based accelerators as a promising solution for several application fields, due to the high relative performance with respect to a low power consumption, however, the employment of such devices poses challenges due to the high level of complexity required to program them.
Nowadays, High performance processing systems are considering FPGA-based accelerators as a promising solution for several application fields, due to the high relative performance with respect to a low power consumption, however, the employment of such devices poses challenges due to the high level of complexity required to program them.
Nowadays, High performance processing systems are considering FPGA-based accelerators as a promising solution for several application fields, due to the high relative performance with respect to a low power consumption, however, the employment of such devices poses challenges due to the high level of complexity required to program them.
Pendenza …
The framework has been designed in order to ensure usability, so that users with low-expertise on FPGA are able to use it, interactivity during the design phases to guide the user through the optimization process, modularity, so that users can upload their custom modules.
The framework has been designed in order to ensure usability, so that users with low-expertise on FPGA are able to use it, interactivity during the design phases to guide the user through the optimization process, modularity, so that users can upload their custom modules.
The framework has been designed in order to ensure usability, so that users with low-expertise on FPGA are able to use it, interactivity during the design phases to guide the user through the optimization process, modularity, so that users can upload their custom modules.
The framework has been designed in order to ensure usability, so that users with low-expertise on FPGA are able to use it, interactivity during the design phases to guide the user through the optimization process, modularity, so that users can upload their custom modules.
The framework has been designed in order to ensure usability, so that users with low-expertise on FPGA are able to use it, interactivity during the design phases to guide the user through the optimization process, modularity, so that users can upload their custom modules.
The framework has been designed in order to ensure usability, so that users with low-expertise on FPGA are able to use it, interactivity during the design phases to guide the user through the optimization process, modularity, so that users can upload their custom modules.