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1. Logic Mind Technologies
Vijayangar (Near Maruthi Medicals), Bangalore-40
Ph: 8123668124 // 8123668066
An Optimized Modified Booth Recoder for
Efficient Design of the Add-Multiply Operator
Abstract—Complex arithmetic operations are widely used in Digital Signal
Processing (DSP) applications. In this work, we focus on optimizing the design of
the fused Add-Multiply (FAM) operator for increasing performance. We
investigate techniques to implement the direct recoding of the sum of two numbers
in its Modified Booth (MB) form. We introduce a structured and efficient recoding
technique and explore three different schemes by incorporating them in FAM
designs. Comparing them with the FAM designs which use existing recoding
schemes, the proposed technique yields considerable reductions in terms of critical
delay, hardware complexity and power consumption of the FAM unit.

2. SOFTWARE REQUIREMENT:
 ModelSim6.4c.
 Xilinx 9.1/13.2.
HARDWARE REQUIREMENT:
 FPGA Spartan 3.
PROJECT FLOW:
First Review:
Literature Survey
Paper Explanation
Design of Project
Project Enhancement explanation
Second Review:
Implementing 40% of Base Paper
Third Review
Implementing Remaining 60% of Base Paper with Future Enhancement (Modification)
For More Details please contact
Logic Mind Technologies
Vijayangar (NearMaruthi Medicals), Bangalore-40
Ph: 8123668124 // 8123668066
Mail: logicmindtech@gmail.com