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ECE 287 – Lecture 13
Memory 2
Announcements
Next Quiz on Wednesday after Exam
Exam II – Nov 15th
Last Day to Demo Labs – Nov 14th
Project Oral Proposal - Nov 1st
Register
Build a 3 bit storage
Register
Build a 3 bit register that only stores when
enabled

Choices…
Shift Register
Build a 3 bit shift register that moves values 1
step right.
0,1,1 -> a1, 0, 1
Linear Shift Back Feed Register
What does the following do…

What is it good for?
Other Registers
•Counters
•ALU register
ROM
Build a 2 bit rom that stores:
Address: 0 1 2 3 4 5 6 7
Data:
00, 11, 10, 11, 01, 00, 10, 00
RAM
What does is mean?

Static vs. Dynamic?
RAM
Build a 2 bit RAM:
Problem Set
1. Build a 2 bit RAM…
1.
2.

How many transistors in the circuit?
Show what happens for the following inputs every clock cycle {w0, w1, add0,
add1, r/w}
•
•
•
•
•
•
•
•

{1’b0, 1’b0, 1’b0, 1’b0, 1’b0}
{1’b0, 1’b1, 1’b1, 1’b0, 1’b0}
{1’b1, 1’b0, 1’b0, 1’b1, 1’b0}
{1’b1, 1’b0, 1’b1, 1’b1, 1’b0}
{1’b1, 1’b0, 1’b1, 1’b1, 1’b1}
{1’b0, 1’b0, 1’b0, 1’b0, 1’b1}
{1’b0, 1’b1, 1’b1, 1’b1, 1’b0}
{1’b1, 1’b0, 1’b1, 1’b1, 1’b1}

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Lecture13 memory ii_c

  • 1. ECE 287 – Lecture 13 Memory 2
  • 2. Announcements Next Quiz on Wednesday after Exam Exam II – Nov 15th Last Day to Demo Labs – Nov 14th Project Oral Proposal - Nov 1st
  • 3.
  • 4.
  • 5.
  • 6.
  • 7. Register Build a 3 bit storage
  • 8. Register Build a 3 bit register that only stores when enabled Choices…
  • 9. Shift Register Build a 3 bit shift register that moves values 1 step right. 0,1,1 -> a1, 0, 1
  • 10. Linear Shift Back Feed Register What does the following do… What is it good for?
  • 12. ROM Build a 2 bit rom that stores: Address: 0 1 2 3 4 5 6 7 Data: 00, 11, 10, 11, 01, 00, 10, 00
  • 13. RAM What does is mean? Static vs. Dynamic?
  • 14. RAM Build a 2 bit RAM:
  • 15. Problem Set 1. Build a 2 bit RAM… 1. 2. How many transistors in the circuit? Show what happens for the following inputs every clock cycle {w0, w1, add0, add1, r/w} • • • • • • • • {1’b0, 1’b0, 1’b0, 1’b0, 1’b0} {1’b0, 1’b1, 1’b1, 1’b0, 1’b0} {1’b1, 1’b0, 1’b0, 1’b1, 1’b0} {1’b1, 1’b0, 1’b1, 1’b1, 1’b0} {1’b1, 1’b0, 1’b1, 1’b1, 1’b1} {1’b0, 1’b0, 1’b0, 1’b0, 1’b1} {1’b0, 1’b1, 1’b1, 1’b1, 1’b0} {1’b1, 1’b0, 1’b1, 1’b1, 1’b1}