SlideShare a Scribd company logo
1 of 13
Download to read offline
Doctoral Candidate in Integrated Circuit IC Design
Posted on Oct 22, 2019
Aalto University Department of
Electronics and Nanoengineering
Helsinki, Finland
Job description
Doctoral candidate positions in the integrated circuit (IC) design
The Electronic Circuit Design unit at the Aalto University invites
applications for doctoral candidate positions in the integrated circuit (IC)
design. We have several positions open on industrial-driven research
projects focusing on future communication and miniature radar
technologies.
Job description
In this position, you will do research and doctoral studies on integrated electronic circuit design. Your work
will be related to our research projects focusing on wireless IC design, particularly for emerging 5G
communication. You will learn to design integrated circuits applying the latest nanometer-scale CMOS
technology. Depending on your interest and background we can offer you a research topic ranging from
MMIC design to mixed-mode and digital designs. You will join an active research group, which research is
closely linked to our industrial and academic partners. Our target is that you will acquire the doctoral degree
in four years.
Requirements
You have a Master’s degree in Electrical Engineering. High average grade as well as excellent grades on
courses on electronics are appreciated. You may be a fresh M.Sc, or gained already some design experience
in industry. Your background and interests can be in any field of integrated circuit design. We expect you to
be open-minded for new research, eager to learn more, and fit to teamwork. You need to have some
hands-on experience or courses taken on integrated circuit design and tools, please document these
activities in your application. In particular, we expect that you have gained some experience on using
Cadence tools.
In this position you will apply the study right for doctoral studies in Aalto University. Thus, please check the
student information and application criteria in https://into.aalto.fi/display/endoctoralelec/How+to+apply. In
particular, please pay attention to mandatory skill level in English.
Research group
The Electronic Circuit Design (ECD) unit of the Department of Electronics and Nanoengineering at the School
of Electrical Engineering at Aalto University is recognized as one of the best in Europe (www page:
https://www.aalto.fi/en/department-of-electronics-and-nanoengineering/jussi-ryynanen-group). We have
researched RF, analog, and digital integrated circuits already close to thirty years with outstanding outcomes
and we have a strong network of collaborators and funding. The Electronic Circuit Design group has two
professors (Jussi Ryynänen and Kari Halonen), three senior researchers and about 20 doctoral candidates
and research assistants working with world class research facilities. Researchers of the unit have received
several awards in highly recognized international conferences, and we publish 10-20 papers annually. More
information about ECD unit's research can be found on the website.
Salary and contract terms
The expected starting salary for a doctoral candidate is approximately 2500 €/month and salary will increase
with responsibilities and performance over time. The contract includes occupational health benefits and
Finland has a comprehensive social security system. Preferable starting time in the autumn of 2019 or early
2020. More information If you wish to hear more about the position, please contact Professor Jussi
Ryynanen, firstname.lastname@aalto.fi.
Ready to apply Please submit your application through our recruiting system and include the following
documents in English: Application letter, Course transcripts of Master’s studies with grades and Certificate
of Master’s degree, Curriculum Vitae (including list of publications if any), Brief description of your research
interests, and References. Application period closes on December 9, 2019 but we will start reviewing
candidates immediately. Applications will be considered until the position is filled.
About the employer
Aalto University is a community of bold thinkers where science and art meet technology and business. We
are committed to identifying and solving grand societal challenges and building an innovative future. Aalto
has six schools with nearly 11,000 students and a staff of more than 4000, of which 400 are professors. Our
campuses are located in Espoo and Helsinki, Finland.
The School of Electrical Engineering is one of the six schools of Aalto University. Our portfolio covers fields
from natural sciences to engineering and information sciences. In parallel with basic research, we develop
ideas and technologies further into innovations and services. We are experts in systems science; we develop
integrated solutions from care of the elderly to space robotics. The School is an international unit with close
to 60 professors and 2,000 full-time students, including over 200 doctoral students.
The School of Electrical Engineering is located at the Aalto University Otaniemi campus in the Helsinki
metropolitan area, Finland. As a living and work environment, Finland consistently ranks high in quality-
of-life. For more information about living in Finland please visit our information pages for international
staff: https://www.aalto.fi/en/careers-at-aalto/for-international-staff.
Areas of Research
Electronic Engineering
Electrical Engineering
Analog Design Engineer for Ultra Low Power Biomedical Applications
Imec is the world-leading research and innovation hub in nanoelectronics and digital technologies. The
combination of our widely acclaimed leadership in microchip technology and profound software and ICT
expertise is what makes us unique. By leveraging our world-class infrastructure and local and global
ecosystem of partners across a multitude of industries, we create ground breaking innovation in application
domains such as healthcare, smart cities and mobility, logistics and manufacturing, and energy.
As a trusted partner for companies, start-ups and universities we bring together 4,000 brilliant minds from
over 90 nationalities. Imec is headquartered in Leuven, Belgium and also has distributed R&D groups at a
number of Flemish universities, in the Netherlands, Taiwan, USA, China, and offices in India and Japan. All of
these particular traits make imec to be a top-class employer. To strengthen this position as a leading player in
our field, we are looking for those passionate talents that make the difference.
Analog Design Engineer for Ultra Low Power Biomedical Applications Imec Leuven,
Flanders, Belgium
3 weeks ago
Be among the first 25 applicants
What you will do
imec’s Connected Health Solutions R&D design group has a strong experience and background in integrated
circuits for future healthcare and life science applications, specializing in IC design for wearable and
implantable devices. Our ICs target a broad range of sensing modalities such as ECG, EEG, EMG, PPG, blood
pressure, neural activity and bio-impedance, covering the full receive chain including analog signal
amplification, filtering, analog-to-digital conversion and digital post-processing and interfacing. Our group
has a strong collaboration with other application and algorithm teams within imec who build useful systems
around our ICs. As such, imec has a unique position in the world by being able to offer leading edge IC design
research with a high affinity to the application domain. We have a strong focus on quality, enabling a short
road to (low-) volume production and market introduction.
To strengthen our design team, we are looking for an experienced analog design engineer. The applications
within our usual focus are extremely challenging with regards to signal integrity and power consumption. We
are hence looking for a designer with a strong background and affinity in low-power and low-noise analog
design for biomedical/neural sensing applications. As an analog design engineer researcher, you will become
part of a team to develop novel circuits and ICs.
Your main tasks will include:
 Actively participate in defining concepts and architectures for next generation ICs for biomedical
applications.
 Collaborate in an inter-disciplinary team. Understand (internal or external) customer requirements and
challenges, and translate them into specifications and solutions to be incorporated in the designs.
 Design high-performance analog and mixed-signal circuits for ultra-low-power sensor interfaces, data
converters, bandgap references, etc.
 Find solutions to problems no-one has solved yet. Design circuits that improve current state-of-the-art.
 Validate your own designs experimentally in a lab environment.
 Become an expert in this field by expanding your knowledge of the state-of-the-art by reading journals,
attending conferences and submitting your research work for peer-reviewed publications.
 Constructively participate in larger design teams to ensure first-time right silicon.
 Employ industry-wide best practices in your designs to ensure quality.
 Contribute to high-quality reports and documentation.
 Support (internal or external) customers in absorbing your research work so they can implement it in
their applications.
What we do for you
We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at its
headquarters in Leuven, Belgium. With your talent, passion and expertise, you’ll become part of a team that
makes the impossible possible. Together, we shape the technology that will determine the society of
tomorrow. We are proud of our open, multicultural, and informal working environment with ample
possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this
process; not only with words but also with tangible actions. Through imec.academy, 'our corporate
university', we actively invest in your development to further your technical and personal growth.
We are aware that your valuable contribution makes imec a top player in its field. Your energy and
commitment are therefore appreciated by means of a competitive salary with many fringe benefits.
 Seniority level
Associate
 Employment type
Full-time
 Job function
Research
 Industries
Research Semiconductors Nanotechnology
https://www.imec-int.com/en/work-at-imec/job-opportunities/analog-design-engineer-for-ultra-low-power-
biomedical-applications_2
Who you are
 PhD degree on analog circuit design with silicon-proven designs (or equivalent through relevant
experience). Research and/or industrial experience in biomedical applications such as: neural interfacing,
bio-sensing or electro-chemical sensing is an asset.
 A proven publication track record in top conferences (e.g. ISSCC, VLSI) and/or journals is a plus.
 Strong knowledge of general analog design concepts (opamps, filters, ADCs, switched-cap circuits, etc.)
and, more specifically, of ultra-low-power and ultra-low-noise analog circuit design.
 Excellent working knowledge of Analog and/or Mixed Signal IC design and verification flows and tools:
Cadence Virtuoso including ADE (G)XL, layout and design verification (DRC, LVS, ERC) and best practices
to ensure high-quality designs.
 Good knowledge of measurement and validation of high-performance, low-noise and low-power analog
ICs, and basic knowledge of computational software such as Matlab and Labview to support the design
and/or measurements.
 Research mindset and problem-solving attitude, with a strong desire to stay up-to-date with recent
advancements in the state-of-the-art and a broad interest across disciplines.
 Team player and self-motivated.
 Be able to work independently and eager to take initiative and responsibility.
 Be able to communicate openly and constructively, and to present your own work clearly and concisely.
 Very fluent in English (oral and written).
Analog Design Engineer
Posted on Nov 26, 2019
Sony Depthsensing Solutions
Brussels, Belgium
Overview
JOB DESCRIPTION:
Sony Depth sensing Solutions is seeking an Analog Design Engineer to work on next generation Time of Flight
(TOF) sensor designs and architectures in their Brussels location.
This position is part of an advanced technology team which is enabling the next generation of Time of Flight
imaging. The successful candidate will bring their deep knowledge and proven experience in analog design
of complex analog blocks and full chips to yield the highest quality of first silicon success. Your main focus
will be on advanced analog and mixed-signal integrated circuits for TOF sensors.
RESPONSIBILITIES:

You will work on R&D on TOF sensors, circuits, and pixels: This will include full-cycle follow-up from
conception to design to validation in silicon to volume production.

You will work with other members of the design team on the analysis, design, verification and evaluation
of TOF sensors.

You will do verification of sensor functionality and performance: You will work with characterization
teams to help provide understanding of the characterization analysis and to tune simulation models.
QUALIFICATIONS
 You have a strong command of English.
 You have a masters degree in electrical engineering or similar by experience
 You will require an analytical mind with a strong commitment to quality within high team spirit and social skills as you
will be working with design teams, hardware and software engineers to successfully complete challenging IC and
sensor system design projects.
 You ideally have 3-5 years of experience with the design of complex analog blocks such as ADC, DAC, PLL, bias
generator, gain amplifiers, and comparators. Knowledge of image sensor functions a plus.
 You are an expert in design from scratch of analog blocks including architectural analysis, noise, power, and area
analysis, schematic entry and critical simulation analysis
 You have experience with the full design flow including Cadence layout from early schematics, area estimation, full
layout, parasitic extraction, ECO implementation
 You are skilled with SPICE simulator types with deep knowledge of tradeoffs such as power modeling, SPICE and fast
SPICE, noise, transient, and monte carlo simulations
 You have knowledge of simulation analysis of analog blocks including a deep understanding of basic (R/L/C/Tr) element
fabrication process, simulation models and model accuracy
 You have experience with LVS / DRC at block and full chip level using tools like Assura and Calibre
 You are familiar with full physical verification flow and tools
 You are familiar with parasitic extraction using tools like Cadence QRC, Synopsys StarRC
 You have experience with power analysis, IR drop measurement, power planning, top level layout of full chips
 You are goal oriented and innovative approach to problem solving.
 You are willing to travel internationally if needed
About the employer
Sony Depth sensing Solutions is a leader in 3D vision and gesture recognition technologies. The company,
located in Belgium, delivers state-of-the-art solutions in the field of 3D sensing and processing, in particular
for “natural interfaces”. These include CMOS 3D Sensors, 3D camera reference designs, SDKs, algorithms and
applications for gesture recognition, object scanning, automotive control and AR/VR.
For more than 10 years, Depth Sense ® solutions have been successfully used in the fields of automotive,
interactive digital entertainment, consumer electronics, health care and other professional markets (such as
digital signage and medical systems).
Areas of Research

Semiconductors & Nanoelectronics
System-on-Chip (SoC) Design ResearcherPosted on Mar 27, 2020
imec
Centre for Microsystems Technology (CMST)
Leuven, Belgium
Job description
What you will do
As we scale towards advanced logic nodes, device scaling become more and more challenging. The benefits
and challenges of the different device, backend and patterning options for future technology generations
have to be evaluated not only on circuit level, but also from the SoC design side. Especially with the
complexity of new patterning options, circuit level assessment is not sufficient to qualify the performance,
power, area required and there is also a need to perform a full SoC loop with place and route.
 You will conduct hands-on performance and power studies and/or thermal to define the impact of
device, backend and patterning choices on SoC design, in order to guide future technology
development.
 You will evaluate at circuit level various SoC sub-circuits like critical paths, clock trees etc. at the outset
of different device and back end options. Your work will involve power performance and area evaluation
of various technology options at SoC level to find the right solutions, satisfying the requirements at
advanced nodes.
 You will set targets for different parts of the SoC for various application domains.
 You will interact closely with circuit designers, device experts and process integration engineers. We
expect that you will creatively overcome obstacles to obtain the answers to architectural questions;
 You will generate relevant parts of a digital PDK as the focus is on new technology nodes.
 The innovative ideas that you generate will end up in dissemination to our industry partners and
patents. Part of the relevant learning will be published in conference and journal, according with the
business needs.
What we do for you
 We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at
its headquarters in Leuven, Belgium. With your talent, passion and expertise, you’ll become part of a
team that makes the impossible possible. Together, we shape the technology that will determine the
society of tomorrow.
 We are proud of our open, multicultural, and informal working environment with ample possibilities to
take initiative and show responsibility. We commit to supporting and guiding you in this process; not
only with words but also with tangible actions. Through imec. academy, 'our corporate university', we
actively invest in your development to further your technical and personal growth.
 We are aware that your valuable contribution makes imec a top player in its field. Your energy and
commitment are therefore appreciated by means of a competitive salary with many fringe benefits.
About the employer
Imec is the world-leading research and innovation hub in nanoelectronics and digital technologies. The
combination of our widely acclaimed leadership in microchip technology and profound software and ICT
expertise is what makes us unique. By leveraging our world-class infrastructure and local and global
ecosystem of partners across a multitude of industries, we create ground breaking innovation in application
domains such as healthcare, smart cities and mobility, logistics and manufacturing, and energy.
As a trusted partner for companies, start-ups and universities we bring together 4,000 brilliant minds from
over 90 nationalities. Imec is headquartered in Leuven, Belgium and also has distributed R&D groups at a
number of Flemish universities, in the Netherlands, Taiwan, USA, China, and offices in India and Japan. All of
these particular traits make imec to be a top-class employer. To strengthen this position as a leading player
in our field, we are looking for those passionate talents that make the difference.
Desired skills and experience
Who you are
 You have obtained a Master degree in Electronics Engineering, Relevant industrial experience or PhD in
digital circuit design is a plus
 Ideal candidate has a background of digital implementation and SoC architecture for one or more
application domains (Mobile, Server, …) and can make specification for different parts of SoC in different
market spaces.
 You have good knowledge of synthesis and place and route tools to allow the evaluation of PPAC post
synthesis and post place and route.
 You have knowledge of tools like Synopsys DC compiler, IC Compiler, Cadence RC compiler and SoC
Encounter are required, as well as basic understanding of circuit design.
 You worked with SPICE tools and are knowledgeable in synthesis and place and route tools.
 Custom design background in Virtuoso is a plus.
 You are a communicative team player, but still you are able to work independently.
 You like taking initiatives; you are persuasive and assertive, while keeping a constructive attitude.
 You show the flexibility to change between different projects according to changing priorities.
 Given the international character of imec, a fluent knowledge of English is necessary.
Areas of Research
 Architecture
 Electronic Engineering
 General Engineering

More Related Content

Similar to Candidates

Boletín eures graduados septiembre 2011
Boletín eures graduados   septiembre 2011Boletín eures graduados   septiembre 2011
Boletín eures graduados septiembre 2011Sodepal
 
Bild 1
Bild 1Bild 1
Bild 1butest
 
Where is Technical Debt?
Where is Technical Debt?Where is Technical Debt?
Where is Technical Debt?Metosin Oy
 
R&dカタログ(英)0612
R&dカタログ(英)0612 R&dカタログ(英)0612
R&dカタログ(英)0612 Makoto KATAYAMA
 
R&dカタログ(英)0612
R&dカタログ(英)0612 R&dカタログ(英)0612
R&dカタログ(英)0612 Makoto KATAYAMA
 
IEEE MULTIPHYSICS SIMULATION in COMSOL
IEEE MULTIPHYSICS SIMULATION in COMSOLIEEE MULTIPHYSICS SIMULATION in COMSOL
IEEE MULTIPHYSICS SIMULATION in COMSOLkhalil fathi
 
Vilmos Beskid: University and business: a win-win game
Vilmos Beskid:  University and business: a win-win gameVilmos Beskid:  University and business: a win-win game
Vilmos Beskid: University and business: a win-win gameCUBCCE Conference
 
Research Opportunities with IEEE/ Research Pattern/ Paper guidelines/ How to ...
Research Opportunities with IEEE/ Research Pattern/ Paper guidelines/ How to ...Research Opportunities with IEEE/ Research Pattern/ Paper guidelines/ How to ...
Research Opportunities with IEEE/ Research Pattern/ Paper guidelines/ How to ...Mehak Azeem
 
Electrical & electronics engineering
Electrical & electronics engineeringElectrical & electronics engineering
Electrical & electronics engineeringVivek Kumar Sinha
 
Semi Conductors in Normandy
Semi Conductors in NormandySemi Conductors in Normandy
Semi Conductors in NormandyNormandyDev
 
IEEE Expert in Chennai
IEEE Expert in ChennaiIEEE Expert in Chennai
IEEE Expert in Chennaiabtechnology
 
New Programmes in Electronics and Computer Engineering
 New Programmes in Electronics and Computer Engineering New Programmes in Electronics and Computer Engineering
New Programmes in Electronics and Computer EngineeringREVA University
 
A novel programmable attenuator based low Gm-OTA for biomedical applications
A novel programmable attenuator based low Gm-OTA for biomedical applicationsA novel programmable attenuator based low Gm-OTA for biomedical applications
A novel programmable attenuator based low Gm-OTA for biomedical applicationsHoopeer Hoopeer
 

Similar to Candidates (20)

Boudewijn de Jong resume LI
Boudewijn de Jong resume LIBoudewijn de Jong resume LI
Boudewijn de Jong resume LI
 
Boletín eures graduados septiembre 2011
Boletín eures graduados   septiembre 2011Boletín eures graduados   septiembre 2011
Boletín eures graduados septiembre 2011
 
Bild 1
Bild 1Bild 1
Bild 1
 
Link & Match Program
Link & Match ProgramLink & Match Program
Link & Match Program
 
Where is Technical Debt?
Where is Technical Debt?Where is Technical Debt?
Where is Technical Debt?
 
mits brochure
mits brochuremits brochure
mits brochure
 
R&dカタログ(英)0612
R&dカタログ(英)0612 R&dカタログ(英)0612
R&dカタログ(英)0612
 
R&dカタログ(英)0612
R&dカタログ(英)0612 R&dカタログ(英)0612
R&dカタログ(英)0612
 
IEEE MULTIPHYSICS SIMULATION in COMSOL
IEEE MULTIPHYSICS SIMULATION in COMSOLIEEE MULTIPHYSICS SIMULATION in COMSOL
IEEE MULTIPHYSICS SIMULATION in COMSOL
 
Vilmos Beskid: University and business: a win-win game
Vilmos Beskid:  University and business: a win-win gameVilmos Beskid:  University and business: a win-win game
Vilmos Beskid: University and business: a win-win game
 
Research Opportunities with IEEE/ Research Pattern/ Paper guidelines/ How to ...
Research Opportunities with IEEE/ Research Pattern/ Paper guidelines/ How to ...Research Opportunities with IEEE/ Research Pattern/ Paper guidelines/ How to ...
Research Opportunities with IEEE/ Research Pattern/ Paper guidelines/ How to ...
 
IET BANGALORE Presents Technology Leadership Talk by Dr.Pradeep Desai - 23rd ...
IET BANGALORE Presents Technology Leadership Talk by Dr.Pradeep Desai - 23rd ...IET BANGALORE Presents Technology Leadership Talk by Dr.Pradeep Desai - 23rd ...
IET BANGALORE Presents Technology Leadership Talk by Dr.Pradeep Desai - 23rd ...
 
Electrical & electronics engineering
Electrical & electronics engineeringElectrical & electronics engineering
Electrical & electronics engineering
 
Semi Conductors in Normandy
Semi Conductors in NormandySemi Conductors in Normandy
Semi Conductors in Normandy
 
IEEE Expert in Chennai
IEEE Expert in ChennaiIEEE Expert in Chennai
IEEE Expert in Chennai
 
New Programmes in Electronics and Computer Engineering
 New Programmes in Electronics and Computer Engineering New Programmes in Electronics and Computer Engineering
New Programmes in Electronics and Computer Engineering
 
A novel programmable attenuator based low Gm-OTA for biomedical applications
A novel programmable attenuator based low Gm-OTA for biomedical applicationsA novel programmable attenuator based low Gm-OTA for biomedical applications
A novel programmable attenuator based low Gm-OTA for biomedical applications
 
E magzine et&t
E magzine et&tE magzine et&t
E magzine et&t
 
UB Brochure
UB BrochureUB Brochure
UB Brochure
 
Launch
LaunchLaunch
Launch
 

More from Hoopeer Hoopeer

Tektronix mdo3104 mixed domain oscilloscope
Tektronix mdo3104 mixed domain oscilloscopeTektronix mdo3104 mixed domain oscilloscope
Tektronix mdo3104 mixed domain oscilloscopeHoopeer Hoopeer
 
Low power sar ad cs presented by pieter harpe
Low power sar ad cs presented by pieter harpeLow power sar ad cs presented by pieter harpe
Low power sar ad cs presented by pieter harpeHoopeer Hoopeer
 
Cadence tutorial lab_2_f16
Cadence tutorial lab_2_f16Cadence tutorial lab_2_f16
Cadence tutorial lab_2_f16Hoopeer Hoopeer
 
Step by step process of uploading presentation videos
Step by step process of uploading presentation videos Step by step process of uploading presentation videos
Step by step process of uploading presentation videos Hoopeer Hoopeer
 
233466440 rg-major-project-final-complete upload
233466440 rg-major-project-final-complete upload233466440 rg-major-project-final-complete upload
233466440 rg-major-project-final-complete uploadHoopeer Hoopeer
 
435601093 s-parameter LTtspice
435601093 s-parameter LTtspice435601093 s-parameter LTtspice
435601093 s-parameter LTtspiceHoopeer Hoopeer
 
Influential and powerful professional electrical and electronics engineering ...
Influential and powerful professional electrical and electronics engineering ...Influential and powerful professional electrical and electronics engineering ...
Influential and powerful professional electrical and electronics engineering ...Hoopeer Hoopeer
 
Ki0232 3 stage fm transmitter
Ki0232 3 stage fm transmitterKi0232 3 stage fm transmitter
Ki0232 3 stage fm transmitterHoopeer Hoopeer
 
Teager energy operator (teo)
Teager energy operator (teo)Teager energy operator (teo)
Teager energy operator (teo)Hoopeer Hoopeer
 
Teager energy operator (teo)
Teager energy operator (teo)Teager energy operator (teo)
Teager energy operator (teo)Hoopeer Hoopeer
 
Cadence tutorial lab_2_f16
Cadence tutorial lab_2_f16Cadence tutorial lab_2_f16
Cadence tutorial lab_2_f16Hoopeer Hoopeer
 
Performance of the classification algorithm
Performance of the classification algorithmPerformance of the classification algorithm
Performance of the classification algorithmHoopeer Hoopeer
 
Bardeen brattain and shockley
Bardeen brattain and shockleyBardeen brattain and shockley
Bardeen brattain and shockleyHoopeer Hoopeer
 

More from Hoopeer Hoopeer (20)

Symica
SymicaSymica
Symica
 
Gene's law
Gene's lawGene's law
Gene's law
 
Tektronix mdo3104 mixed domain oscilloscope
Tektronix mdo3104 mixed domain oscilloscopeTektronix mdo3104 mixed domain oscilloscope
Tektronix mdo3104 mixed domain oscilloscope
 
Low power sar ad cs presented by pieter harpe
Low power sar ad cs presented by pieter harpeLow power sar ad cs presented by pieter harpe
Low power sar ad cs presented by pieter harpe
 
Cadence tutorial lab_2_f16
Cadence tutorial lab_2_f16Cadence tutorial lab_2_f16
Cadence tutorial lab_2_f16
 
Step by step process of uploading presentation videos
Step by step process of uploading presentation videos Step by step process of uploading presentation videos
Step by step process of uploading presentation videos
 
233466440 rg-major-project-final-complete upload
233466440 rg-major-project-final-complete upload233466440 rg-major-project-final-complete upload
233466440 rg-major-project-final-complete upload
 
435601093 s-parameter LTtspice
435601093 s-parameter LTtspice435601093 s-parameter LTtspice
435601093 s-parameter LTtspice
 
Influential and powerful professional electrical and electronics engineering ...
Influential and powerful professional electrical and electronics engineering ...Influential and powerful professional electrical and electronics engineering ...
Influential and powerful professional electrical and electronics engineering ...
 
Ki0232 3 stage fm transmitter
Ki0232 3 stage fm transmitterKi0232 3 stage fm transmitter
Ki0232 3 stage fm transmitter
 
Teager energy operator (teo)
Teager energy operator (teo)Teager energy operator (teo)
Teager energy operator (teo)
 
Teager energy operator (teo)
Teager energy operator (teo)Teager energy operator (teo)
Teager energy operator (teo)
 
En physics
En physicsEn physics
En physics
 
Beautiful lectures
Beautiful lecturesBeautiful lectures
Beautiful lectures
 
Cadence tutorial lab_2_f16
Cadence tutorial lab_2_f16Cadence tutorial lab_2_f16
Cadence tutorial lab_2_f16
 
Performance of the classification algorithm
Performance of the classification algorithmPerformance of the classification algorithm
Performance of the classification algorithm
 
Electronics i ii razavi
Electronics i ii razaviElectronics i ii razavi
Electronics i ii razavi
 
Bardeen brattain and shockley
Bardeen brattain and shockleyBardeen brattain and shockley
Bardeen brattain and shockley
 
978 1-4615-6311-2 fm
978 1-4615-6311-2 fm978 1-4615-6311-2 fm
978 1-4615-6311-2 fm
 
William gilbert strange
William gilbert strangeWilliam gilbert strange
William gilbert strange
 

Recently uploaded

VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...
VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...
VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...VICTOR MAESTRE RAMIREZ
 
Sachpazis Costas: Geotechnical Engineering: A student's Perspective Introduction
Sachpazis Costas: Geotechnical Engineering: A student's Perspective IntroductionSachpazis Costas: Geotechnical Engineering: A student's Perspective Introduction
Sachpazis Costas: Geotechnical Engineering: A student's Perspective IntroductionDr.Costas Sachpazis
 
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdf
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdfCCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdf
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdfAsst.prof M.Gokilavani
 
complete construction, environmental and economics information of biomass com...
complete construction, environmental and economics information of biomass com...complete construction, environmental and economics information of biomass com...
complete construction, environmental and economics information of biomass com...asadnawaz62
 
HARMONY IN THE HUMAN BEING - Unit-II UHV-2
HARMONY IN THE HUMAN BEING - Unit-II UHV-2HARMONY IN THE HUMAN BEING - Unit-II UHV-2
HARMONY IN THE HUMAN BEING - Unit-II UHV-2RajaP95
 
Churning of Butter, Factors affecting .
Churning of Butter, Factors affecting  .Churning of Butter, Factors affecting  .
Churning of Butter, Factors affecting .Satyam Kumar
 
Architect Hassan Khalil Portfolio for 2024
Architect Hassan Khalil Portfolio for 2024Architect Hassan Khalil Portfolio for 2024
Architect Hassan Khalil Portfolio for 2024hassan khalil
 
HARMONY IN THE NATURE AND EXISTENCE - Unit-IV
HARMONY IN THE NATURE AND EXISTENCE - Unit-IVHARMONY IN THE NATURE AND EXISTENCE - Unit-IV
HARMONY IN THE NATURE AND EXISTENCE - Unit-IVRajaP95
 
Introduction-To-Agricultural-Surveillance-Rover.pptx
Introduction-To-Agricultural-Surveillance-Rover.pptxIntroduction-To-Agricultural-Surveillance-Rover.pptx
Introduction-To-Agricultural-Surveillance-Rover.pptxk795866
 
Past, Present and Future of Generative AI
Past, Present and Future of Generative AIPast, Present and Future of Generative AI
Past, Present and Future of Generative AIabhishek36461
 
SPICE PARK APR2024 ( 6,793 SPICE Models )
SPICE PARK APR2024 ( 6,793 SPICE Models )SPICE PARK APR2024 ( 6,793 SPICE Models )
SPICE PARK APR2024 ( 6,793 SPICE Models )Tsuyoshi Horigome
 
power system scada applications and uses
power system scada applications and usespower system scada applications and uses
power system scada applications and usesDevarapalliHaritha
 
OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...
OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...
OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...Soham Mondal
 
Software and Systems Engineering Standards: Verification and Validation of Sy...
Software and Systems Engineering Standards: Verification and Validation of Sy...Software and Systems Engineering Standards: Verification and Validation of Sy...
Software and Systems Engineering Standards: Verification and Validation of Sy...VICTOR MAESTRE RAMIREZ
 
Decoding Kotlin - Your guide to solving the mysterious in Kotlin.pptx
Decoding Kotlin - Your guide to solving the mysterious in Kotlin.pptxDecoding Kotlin - Your guide to solving the mysterious in Kotlin.pptx
Decoding Kotlin - Your guide to solving the mysterious in Kotlin.pptxJoão Esperancinha
 

Recently uploaded (20)

VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...
VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...
VICTOR MAESTRE RAMIREZ - Planetary Defender on NASA's Double Asteroid Redirec...
 
Sachpazis Costas: Geotechnical Engineering: A student's Perspective Introduction
Sachpazis Costas: Geotechnical Engineering: A student's Perspective IntroductionSachpazis Costas: Geotechnical Engineering: A student's Perspective Introduction
Sachpazis Costas: Geotechnical Engineering: A student's Perspective Introduction
 
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdf
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdfCCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdf
CCS355 Neural Network & Deep Learning Unit II Notes with Question bank .pdf
 
complete construction, environmental and economics information of biomass com...
complete construction, environmental and economics information of biomass com...complete construction, environmental and economics information of biomass com...
complete construction, environmental and economics information of biomass com...
 
HARMONY IN THE HUMAN BEING - Unit-II UHV-2
HARMONY IN THE HUMAN BEING - Unit-II UHV-2HARMONY IN THE HUMAN BEING - Unit-II UHV-2
HARMONY IN THE HUMAN BEING - Unit-II UHV-2
 
Churning of Butter, Factors affecting .
Churning of Butter, Factors affecting  .Churning of Butter, Factors affecting  .
Churning of Butter, Factors affecting .
 
Architect Hassan Khalil Portfolio for 2024
Architect Hassan Khalil Portfolio for 2024Architect Hassan Khalil Portfolio for 2024
Architect Hassan Khalil Portfolio for 2024
 
HARMONY IN THE NATURE AND EXISTENCE - Unit-IV
HARMONY IN THE NATURE AND EXISTENCE - Unit-IVHARMONY IN THE NATURE AND EXISTENCE - Unit-IV
HARMONY IN THE NATURE AND EXISTENCE - Unit-IV
 
★ CALL US 9953330565 ( HOT Young Call Girls In Badarpur delhi NCR
★ CALL US 9953330565 ( HOT Young Call Girls In Badarpur delhi NCR★ CALL US 9953330565 ( HOT Young Call Girls In Badarpur delhi NCR
★ CALL US 9953330565 ( HOT Young Call Girls In Badarpur delhi NCR
 
Introduction-To-Agricultural-Surveillance-Rover.pptx
Introduction-To-Agricultural-Surveillance-Rover.pptxIntroduction-To-Agricultural-Surveillance-Rover.pptx
Introduction-To-Agricultural-Surveillance-Rover.pptx
 
Past, Present and Future of Generative AI
Past, Present and Future of Generative AIPast, Present and Future of Generative AI
Past, Present and Future of Generative AI
 
9953056974 Call Girls In South Ex, Escorts (Delhi) NCR.pdf
9953056974 Call Girls In South Ex, Escorts (Delhi) NCR.pdf9953056974 Call Girls In South Ex, Escorts (Delhi) NCR.pdf
9953056974 Call Girls In South Ex, Escorts (Delhi) NCR.pdf
 
SPICE PARK APR2024 ( 6,793 SPICE Models )
SPICE PARK APR2024 ( 6,793 SPICE Models )SPICE PARK APR2024 ( 6,793 SPICE Models )
SPICE PARK APR2024 ( 6,793 SPICE Models )
 
power system scada applications and uses
power system scada applications and usespower system scada applications and uses
power system scada applications and uses
 
Exploring_Network_Security_with_JA3_by_Rakesh Seal.pptx
Exploring_Network_Security_with_JA3_by_Rakesh Seal.pptxExploring_Network_Security_with_JA3_by_Rakesh Seal.pptx
Exploring_Network_Security_with_JA3_by_Rakesh Seal.pptx
 
OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...
OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...
OSVC_Meta-Data based Simulation Automation to overcome Verification Challenge...
 
Call Us -/9953056974- Call Girls In Vikaspuri-/- Delhi NCR
Call Us -/9953056974- Call Girls In Vikaspuri-/- Delhi NCRCall Us -/9953056974- Call Girls In Vikaspuri-/- Delhi NCR
Call Us -/9953056974- Call Girls In Vikaspuri-/- Delhi NCR
 
Design and analysis of solar grass cutter.pdf
Design and analysis of solar grass cutter.pdfDesign and analysis of solar grass cutter.pdf
Design and analysis of solar grass cutter.pdf
 
Software and Systems Engineering Standards: Verification and Validation of Sy...
Software and Systems Engineering Standards: Verification and Validation of Sy...Software and Systems Engineering Standards: Verification and Validation of Sy...
Software and Systems Engineering Standards: Verification and Validation of Sy...
 
Decoding Kotlin - Your guide to solving the mysterious in Kotlin.pptx
Decoding Kotlin - Your guide to solving the mysterious in Kotlin.pptxDecoding Kotlin - Your guide to solving the mysterious in Kotlin.pptx
Decoding Kotlin - Your guide to solving the mysterious in Kotlin.pptx
 

Candidates

  • 1. Doctoral Candidate in Integrated Circuit IC Design Posted on Oct 22, 2019 Aalto University Department of Electronics and Nanoengineering Helsinki, Finland Job description Doctoral candidate positions in the integrated circuit (IC) design The Electronic Circuit Design unit at the Aalto University invites applications for doctoral candidate positions in the integrated circuit (IC) design. We have several positions open on industrial-driven research projects focusing on future communication and miniature radar technologies. Job description In this position, you will do research and doctoral studies on integrated electronic circuit design. Your work will be related to our research projects focusing on wireless IC design, particularly for emerging 5G communication. You will learn to design integrated circuits applying the latest nanometer-scale CMOS technology. Depending on your interest and background we can offer you a research topic ranging from MMIC design to mixed-mode and digital designs. You will join an active research group, which research is closely linked to our industrial and academic partners. Our target is that you will acquire the doctoral degree in four years. Requirements You have a Master’s degree in Electrical Engineering. High average grade as well as excellent grades on courses on electronics are appreciated. You may be a fresh M.Sc, or gained already some design experience in industry. Your background and interests can be in any field of integrated circuit design. We expect you to be open-minded for new research, eager to learn more, and fit to teamwork. You need to have some hands-on experience or courses taken on integrated circuit design and tools, please document these activities in your application. In particular, we expect that you have gained some experience on using Cadence tools.
  • 2. In this position you will apply the study right for doctoral studies in Aalto University. Thus, please check the student information and application criteria in https://into.aalto.fi/display/endoctoralelec/How+to+apply. In particular, please pay attention to mandatory skill level in English. Research group The Electronic Circuit Design (ECD) unit of the Department of Electronics and Nanoengineering at the School of Electrical Engineering at Aalto University is recognized as one of the best in Europe (www page: https://www.aalto.fi/en/department-of-electronics-and-nanoengineering/jussi-ryynanen-group). We have researched RF, analog, and digital integrated circuits already close to thirty years with outstanding outcomes and we have a strong network of collaborators and funding. The Electronic Circuit Design group has two professors (Jussi Ryynänen and Kari Halonen), three senior researchers and about 20 doctoral candidates and research assistants working with world class research facilities. Researchers of the unit have received several awards in highly recognized international conferences, and we publish 10-20 papers annually. More information about ECD unit's research can be found on the website. Salary and contract terms The expected starting salary for a doctoral candidate is approximately 2500 €/month and salary will increase with responsibilities and performance over time. The contract includes occupational health benefits and Finland has a comprehensive social security system. Preferable starting time in the autumn of 2019 or early 2020. More information If you wish to hear more about the position, please contact Professor Jussi Ryynanen, firstname.lastname@aalto.fi. Ready to apply Please submit your application through our recruiting system and include the following documents in English: Application letter, Course transcripts of Master’s studies with grades and Certificate of Master’s degree, Curriculum Vitae (including list of publications if any), Brief description of your research interests, and References. Application period closes on December 9, 2019 but we will start reviewing candidates immediately. Applications will be considered until the position is filled.
  • 3. About the employer Aalto University is a community of bold thinkers where science and art meet technology and business. We are committed to identifying and solving grand societal challenges and building an innovative future. Aalto has six schools with nearly 11,000 students and a staff of more than 4000, of which 400 are professors. Our campuses are located in Espoo and Helsinki, Finland. The School of Electrical Engineering is one of the six schools of Aalto University. Our portfolio covers fields from natural sciences to engineering and information sciences. In parallel with basic research, we develop ideas and technologies further into innovations and services. We are experts in systems science; we develop integrated solutions from care of the elderly to space robotics. The School is an international unit with close to 60 professors and 2,000 full-time students, including over 200 doctoral students. The School of Electrical Engineering is located at the Aalto University Otaniemi campus in the Helsinki metropolitan area, Finland. As a living and work environment, Finland consistently ranks high in quality- of-life. For more information about living in Finland please visit our information pages for international staff: https://www.aalto.fi/en/careers-at-aalto/for-international-staff. Areas of Research Electronic Engineering Electrical Engineering
  • 4. Analog Design Engineer for Ultra Low Power Biomedical Applications Imec is the world-leading research and innovation hub in nanoelectronics and digital technologies. The combination of our widely acclaimed leadership in microchip technology and profound software and ICT expertise is what makes us unique. By leveraging our world-class infrastructure and local and global ecosystem of partners across a multitude of industries, we create ground breaking innovation in application domains such as healthcare, smart cities and mobility, logistics and manufacturing, and energy. As a trusted partner for companies, start-ups and universities we bring together 4,000 brilliant minds from over 90 nationalities. Imec is headquartered in Leuven, Belgium and also has distributed R&D groups at a number of Flemish universities, in the Netherlands, Taiwan, USA, China, and offices in India and Japan. All of these particular traits make imec to be a top-class employer. To strengthen this position as a leading player in our field, we are looking for those passionate talents that make the difference. Analog Design Engineer for Ultra Low Power Biomedical Applications Imec Leuven, Flanders, Belgium 3 weeks ago Be among the first 25 applicants What you will do imec’s Connected Health Solutions R&D design group has a strong experience and background in integrated circuits for future healthcare and life science applications, specializing in IC design for wearable and implantable devices. Our ICs target a broad range of sensing modalities such as ECG, EEG, EMG, PPG, blood pressure, neural activity and bio-impedance, covering the full receive chain including analog signal amplification, filtering, analog-to-digital conversion and digital post-processing and interfacing. Our group has a strong collaboration with other application and algorithm teams within imec who build useful systems around our ICs. As such, imec has a unique position in the world by being able to offer leading edge IC design research with a high affinity to the application domain. We have a strong focus on quality, enabling a short road to (low-) volume production and market introduction.
  • 5. To strengthen our design team, we are looking for an experienced analog design engineer. The applications within our usual focus are extremely challenging with regards to signal integrity and power consumption. We are hence looking for a designer with a strong background and affinity in low-power and low-noise analog design for biomedical/neural sensing applications. As an analog design engineer researcher, you will become part of a team to develop novel circuits and ICs. Your main tasks will include:  Actively participate in defining concepts and architectures for next generation ICs for biomedical applications.  Collaborate in an inter-disciplinary team. Understand (internal or external) customer requirements and challenges, and translate them into specifications and solutions to be incorporated in the designs.  Design high-performance analog and mixed-signal circuits for ultra-low-power sensor interfaces, data converters, bandgap references, etc.  Find solutions to problems no-one has solved yet. Design circuits that improve current state-of-the-art.  Validate your own designs experimentally in a lab environment.  Become an expert in this field by expanding your knowledge of the state-of-the-art by reading journals, attending conferences and submitting your research work for peer-reviewed publications.  Constructively participate in larger design teams to ensure first-time right silicon.  Employ industry-wide best practices in your designs to ensure quality.  Contribute to high-quality reports and documentation.  Support (internal or external) customers in absorbing your research work so they can implement it in their applications.
  • 6. What we do for you We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at its headquarters in Leuven, Belgium. With your talent, passion and expertise, you’ll become part of a team that makes the impossible possible. Together, we shape the technology that will determine the society of tomorrow. We are proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through imec.academy, 'our corporate university', we actively invest in your development to further your technical and personal growth. We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a competitive salary with many fringe benefits.  Seniority level Associate  Employment type Full-time  Job function Research  Industries Research Semiconductors Nanotechnology https://www.imec-int.com/en/work-at-imec/job-opportunities/analog-design-engineer-for-ultra-low-power- biomedical-applications_2
  • 7. Who you are  PhD degree on analog circuit design with silicon-proven designs (or equivalent through relevant experience). Research and/or industrial experience in biomedical applications such as: neural interfacing, bio-sensing or electro-chemical sensing is an asset.  A proven publication track record in top conferences (e.g. ISSCC, VLSI) and/or journals is a plus.  Strong knowledge of general analog design concepts (opamps, filters, ADCs, switched-cap circuits, etc.) and, more specifically, of ultra-low-power and ultra-low-noise analog circuit design.  Excellent working knowledge of Analog and/or Mixed Signal IC design and verification flows and tools: Cadence Virtuoso including ADE (G)XL, layout and design verification (DRC, LVS, ERC) and best practices to ensure high-quality designs.  Good knowledge of measurement and validation of high-performance, low-noise and low-power analog ICs, and basic knowledge of computational software such as Matlab and Labview to support the design and/or measurements.  Research mindset and problem-solving attitude, with a strong desire to stay up-to-date with recent advancements in the state-of-the-art and a broad interest across disciplines.  Team player and self-motivated.  Be able to work independently and eager to take initiative and responsibility.  Be able to communicate openly and constructively, and to present your own work clearly and concisely.  Very fluent in English (oral and written).
  • 8. Analog Design Engineer Posted on Nov 26, 2019 Sony Depthsensing Solutions Brussels, Belgium Overview JOB DESCRIPTION: Sony Depth sensing Solutions is seeking an Analog Design Engineer to work on next generation Time of Flight (TOF) sensor designs and architectures in their Brussels location. This position is part of an advanced technology team which is enabling the next generation of Time of Flight imaging. The successful candidate will bring their deep knowledge and proven experience in analog design of complex analog blocks and full chips to yield the highest quality of first silicon success. Your main focus will be on advanced analog and mixed-signal integrated circuits for TOF sensors. RESPONSIBILITIES:  You will work on R&D on TOF sensors, circuits, and pixels: This will include full-cycle follow-up from conception to design to validation in silicon to volume production.  You will work with other members of the design team on the analysis, design, verification and evaluation of TOF sensors.  You will do verification of sensor functionality and performance: You will work with characterization teams to help provide understanding of the characterization analysis and to tune simulation models.
  • 9. QUALIFICATIONS  You have a strong command of English.  You have a masters degree in electrical engineering or similar by experience  You will require an analytical mind with a strong commitment to quality within high team spirit and social skills as you will be working with design teams, hardware and software engineers to successfully complete challenging IC and sensor system design projects.  You ideally have 3-5 years of experience with the design of complex analog blocks such as ADC, DAC, PLL, bias generator, gain amplifiers, and comparators. Knowledge of image sensor functions a plus.  You are an expert in design from scratch of analog blocks including architectural analysis, noise, power, and area analysis, schematic entry and critical simulation analysis  You have experience with the full design flow including Cadence layout from early schematics, area estimation, full layout, parasitic extraction, ECO implementation  You are skilled with SPICE simulator types with deep knowledge of tradeoffs such as power modeling, SPICE and fast SPICE, noise, transient, and monte carlo simulations  You have knowledge of simulation analysis of analog blocks including a deep understanding of basic (R/L/C/Tr) element fabrication process, simulation models and model accuracy  You have experience with LVS / DRC at block and full chip level using tools like Assura and Calibre  You are familiar with full physical verification flow and tools  You are familiar with parasitic extraction using tools like Cadence QRC, Synopsys StarRC  You have experience with power analysis, IR drop measurement, power planning, top level layout of full chips  You are goal oriented and innovative approach to problem solving.  You are willing to travel internationally if needed
  • 10. About the employer Sony Depth sensing Solutions is a leader in 3D vision and gesture recognition technologies. The company, located in Belgium, delivers state-of-the-art solutions in the field of 3D sensing and processing, in particular for “natural interfaces”. These include CMOS 3D Sensors, 3D camera reference designs, SDKs, algorithms and applications for gesture recognition, object scanning, automotive control and AR/VR. For more than 10 years, Depth Sense ® solutions have been successfully used in the fields of automotive, interactive digital entertainment, consumer electronics, health care and other professional markets (such as digital signage and medical systems). Areas of Research  Semiconductors & Nanoelectronics
  • 11. System-on-Chip (SoC) Design ResearcherPosted on Mar 27, 2020 imec Centre for Microsystems Technology (CMST) Leuven, Belgium Job description What you will do As we scale towards advanced logic nodes, device scaling become more and more challenging. The benefits and challenges of the different device, backend and patterning options for future technology generations have to be evaluated not only on circuit level, but also from the SoC design side. Especially with the complexity of new patterning options, circuit level assessment is not sufficient to qualify the performance, power, area required and there is also a need to perform a full SoC loop with place and route.  You will conduct hands-on performance and power studies and/or thermal to define the impact of device, backend and patterning choices on SoC design, in order to guide future technology development.  You will evaluate at circuit level various SoC sub-circuits like critical paths, clock trees etc. at the outset of different device and back end options. Your work will involve power performance and area evaluation of various technology options at SoC level to find the right solutions, satisfying the requirements at advanced nodes.  You will set targets for different parts of the SoC for various application domains.  You will interact closely with circuit designers, device experts and process integration engineers. We expect that you will creatively overcome obstacles to obtain the answers to architectural questions;  You will generate relevant parts of a digital PDK as the focus is on new technology nodes.  The innovative ideas that you generate will end up in dissemination to our industry partners and patents. Part of the relevant learning will be published in conference and journal, according with the business needs.
  • 12. What we do for you  We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at its headquarters in Leuven, Belgium. With your talent, passion and expertise, you’ll become part of a team that makes the impossible possible. Together, we shape the technology that will determine the society of tomorrow.  We are proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through imec. academy, 'our corporate university', we actively invest in your development to further your technical and personal growth.  We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a competitive salary with many fringe benefits. About the employer Imec is the world-leading research and innovation hub in nanoelectronics and digital technologies. The combination of our widely acclaimed leadership in microchip technology and profound software and ICT expertise is what makes us unique. By leveraging our world-class infrastructure and local and global ecosystem of partners across a multitude of industries, we create ground breaking innovation in application domains such as healthcare, smart cities and mobility, logistics and manufacturing, and energy. As a trusted partner for companies, start-ups and universities we bring together 4,000 brilliant minds from over 90 nationalities. Imec is headquartered in Leuven, Belgium and also has distributed R&D groups at a number of Flemish universities, in the Netherlands, Taiwan, USA, China, and offices in India and Japan. All of these particular traits make imec to be a top-class employer. To strengthen this position as a leading player in our field, we are looking for those passionate talents that make the difference.
  • 13. Desired skills and experience Who you are  You have obtained a Master degree in Electronics Engineering, Relevant industrial experience or PhD in digital circuit design is a plus  Ideal candidate has a background of digital implementation and SoC architecture for one or more application domains (Mobile, Server, …) and can make specification for different parts of SoC in different market spaces.  You have good knowledge of synthesis and place and route tools to allow the evaluation of PPAC post synthesis and post place and route.  You have knowledge of tools like Synopsys DC compiler, IC Compiler, Cadence RC compiler and SoC Encounter are required, as well as basic understanding of circuit design.  You worked with SPICE tools and are knowledgeable in synthesis and place and route tools.  Custom design background in Virtuoso is a plus.  You are a communicative team player, but still you are able to work independently.  You like taking initiatives; you are persuasive and assertive, while keeping a constructive attitude.  You show the flexibility to change between different projects according to changing priorities.  Given the international character of imec, a fluent knowledge of English is necessary. Areas of Research  Architecture  Electronic Engineering  General Engineering