embedded systems

1. Chapter 6
Working with Time: Interrupts, Counters and Timers
The aims of this chapter are to introduce:
• Why we need interrupts and counter/timers;
• The underlying interrupt hardware structure;
• The 16F84A interrupt structure;
• How to write simple programs with interrupts;
• The underlying microcontroller counter/timer hardware structure;
• The 16F84A Timer 0 structure;
• Simple applications of the counter/timer;
• The Sleep mode.
Designing Embedded Systems
with PIC Microcontrollers:
Principles and Applications
2nd Edition. Tim Wilmshurst
1

2. An Interrupt Review.
An Interrupt is an external input to the CPU. The interrupt facility
allows the processor to respond rapidly to external changes.
When an Interrupt is detected by the CPU, it:
 completes the current instruction,
 stores the address of the next instruction, and possibly other
key variables (e.g. contents of Accumulator and Condition
Code Register), onto the stack,
 jumps to an interrupt service routine (ISR), whose address is
determined by an "interrupt vector".
2

3. •Many interrupts can be masked, i.e. disabled, by setting a bit in a
control register. some are not maskable.
•If an Interrupt is masked, then there is a possibility that it will not
be detected.
•Therefore there are also Interrupt Flags, bits in SFRs, which are
set whenever an associated interrupt occurs.
An Interrupt Review
3

4. •These record the fact that an interrupt has occurred, even if the
CPU is unable to respond to it.
•An Interrupt that has occurred, but has not received CPU
response, is called a Pending Interrupt.
•In the case of several interrupts, one ISR is completed before the
next interrupt is responded to.
An Interrupt Review … Cont.
4

5. Control SFR(s)
Peripheral
Data Transfer SFR(s)
Microcontroller
Core
"Outside
World"
Interrupt(s)
Microcontroller Interaction with
Peripherals, via SFR and Interrupt
Recalling Interrupt-Related
Points that have already Come up
Interrupt Routine
always starts here
The Reset Vector
5

6. S Q
Int errupt
Flag*
Inte rrupt X
Int errupt X Enable*
Ot her
G
lobal Int errupt
Non-maskabl e
Inte rrupt
Int erru
input s t
CPU
R
(reset by CPU
or program)
* bit s in a S
pecial Funct ion Regist er
int errupt s
maskable
replicated f
or all other m askable interrupts
A Generic Interrupt Structure
6

7. SR Flipflop
7

8. The PIC 16F84A Interrupt Structure
Global Interrupt Enable
External Interrupt
EEPROM
Write Complete
Port B Change
Timer Overflow
Interrupt Flag
Note that the interrupt flags are set by the interrupt action, but
must be cleared (set to “0”) in the program, during the ISR.
What does happen if this isn’t done?
8

9. 9
The PIC 16F84A INTCON Register

10. The PIC 16F84A INTCON Register
10

11. The PIC 16F84A Interrupt Structure
RA2
RA3
RA4/T0CKI
MCLR
V
RB0/INT
RB1
RB2
RB3 RB4
RB5
RB6
RB7
RA1
RA0
O S C1/CLKIN
O S C2/CLKO UT
V
DD
SS Sup p ly voltage
Oscillator co
Port A, Bit 0
Port A, Bit 1
Port A, Bit 2
Port A, Bit 3
*Port A, Bit 4
Ground
**Port B, Bit 0
Port B, Bit 1
Port B, Bit 2
Port B, Bit 3
Port B, Bit 7
Port B, Bit 6
Port B, Bit 5
Port B, Bit 4
*also Counter/T imer clock inp ut
**also external Interrup t inp ut
Reset
1
9 10
18
External
Interrupt
input
11

12. Interrupt Detected
Complete Current Instruction
Save Program Counter on Stack
Reload PC with 0004H
Continue Program Execution
Instruction
is RETFIE?
No
Set GIE to 1
Load PC from Stack
Continue Program Execution
Yes
Clear GIE
ISR execution starts
main program is running
main program continues
The PIC 16 Series Interrupt Response
• Note that this diagram shows what the
PIC microcontroller itself does as an
interrupt occurs.
• The programmer need not worry about
any of these actions, but needs to
know that they’re happening.
Interrupt Detected
Complete Current Instruction
Save Program Counter on Stack
Reload PC with 0004H
Continue Program Execution
Instruction
is RETFIE?
No
Set GIE to 1
Load PC from Stack
Continue Program Execution
Yes
Clear GIE
ISR execution starts
main program is running
main program continues
12

13. Programming with Single Interrupts
It is easy to write simple programs with just one interrupt. For
success, the essential points to watch are:
• Start the ISR at the Interrupt Vector, location 0004;
• Enable the interrupt that is to be used, by setting enable bits in
the INTCON and/or PIE (Peripheral Interrupt Enable) registers;
• Set the Global Enable bit, GIE;
• Once in the ISR, clear the interrupt flag;
• End the ISR with a retfie instruction;
• Ensure that the interrupt source, for example Port B or Timer 0, is
actually set up to generate interrupts!
13

14. org 00
goto start
org 04 ;here if interrupt occurs
goto Int_Routine
start
org 0010
;bcf option_reg,intedg
bcf STATUS,RP0 ;select bank 0
bsf INTCON,INTE ;enable external interrupt
bsf INTCON,GIE ;enable global int
wait movlw 0A ;set up initial port output values
movwf porta
nop
movlw 15
movwf porta
goto wait
org 0080
Int_Routine
movlw 00
movwf porta
bcf INTCON,INTF ;clear the interrupt flag
RETFIE
end
A Simple Interrupt
Application
14

15. The INTCON Register of a PIC 16F84A is set as shown in below:
a) Determine which interrupts are enabled.
b) An interrupt occurs, and the INTCON register is found to have
changed to b).
Which interrupt source has called?
c) Which bit must the user change before end of ISR?
IN
TCON IN
TCON
1
0
1
0
1
0
0
0 1
0
1 1
0 0
0
1
Interrupt Example 1
a) b)
15

16. Moving to Multiple Interrupts – Identifying the Source
As we have seen, the 16F84A has four interrupt sources, but only
one interrupt vector.
Therefore, if more than one interrupt is enabled, it is not obvious at
the beginning of an ISR which interrupt has occurred. In this case
the programmer must write the ISR so that at its beginning it tests
the flags of all possible interrupts and determines from this which
one has been called, This is shown in the example ISR below.
16

17. Interrupt
btfsc intcon,0 ;test RBIF
goto portb_int
btfsc intcon,1 ;test external interrupt flag
goto ext_int
btfsc intcon,2 ;test timer overflow flag
goto timer_int
retfie
portb_int
place portb change ISR here ...
bcf intcon,0 ;and clear the interrupt flag
retfie
ext_int
place external interrupt ISR here ...
bcf intcon,1 ;and clear the interrupt flag
retfie
timer_int
place timer overflow ISR goes here ...
bcf intcon,2 ;and clear the interrupt flag
retfie
Moving to Multiple
Interrupts –
Identifying the Source
17

18. Critical Regions and Masking
In certain program parts we will not want to accept the intrusion of an interrupt
under any circumstances, with or without context saving. We call these critical
regions. We can disable, or mask, the interrupts for their duration, by
manipulating the enable bits in the INTCON register.
Critical regions may include:
1. times when the microcontroller is simply not ready to act on the interrupt
(for example during initialization – hence only enable interrupts after
initialization is complete);
2. time-sensitive activity, including timing loops and multi-instruction setting
of outputs;
3. any calculation made up of a series of instructions where the ISR makes
use of the result. 18

19. The purpose of the interrupt is to attract the attention of the CPU
quickly, but actually how quickly does this happen? The time
between the interrupt occurring and the CPU responding to it is
called the latency.
This depends on certain aspects of hardware and on the
characteristics of the program running. This timing diagram shows
how the mid-range PIC family responds to an enabled external
interrupt.
Taking Things Further: Interrupt Latency
19

20. The Digital Counter Reviewed
• It is easy to make a digital counter using flip-flops.
• Counters can be made which count up, count down, which can
be cleared back to zero, pre-loaded to a certain value, and which
by the provision of an overflow output can be cascaded with
other counters. A simple example is shown:
21

21. The Digital Counter Reviewed
22

22. The Digital Counter Reviewed
23

23. The Digital Counter Reviewed
24
Input
Q0
Q1

24. The Digital Counter Reviewed
25

25. The Counter as Timer
• If the incoming clock pulses are regular in frequency, the
counter can also measure time.
• In this example time is being measured between two pulses.
Clock
Pulse Input
T
1 2 3 4 5 n
Tc
26

26. Clock
Pulse Input
T
1 2 3 4 5 n
Tc
The Counter as Timer
If TC is clock period, and n cycles are counted, then the period during which
counting has taken place is nTC .
Example: clock frequency is 1 MHz, clock period is therefore 1us, before
overflow counter can count:
8-bit 255us
16-bit 65535us = 65.5ms
24-bit 16.78 secs
32-bit 4,295 secs = 1hr, 11minutes 27

27. Timer Prescalar
28
A prescaler is an electronic counting circuit used to reduce a
high frequency electrical signal to a lower frequency by integer
division.

28. Timer Prescalar
29

29. Timer Prescalar
30

30. Timer Prescalar
31

31. 8-bit Counter
Multiplexer
selecting
counting source
Multiplexer
selecting
prescaler
Input edge
select
The 16F84A TIMER0 Module
32

33. The 16F84A OPTION Register
34

34. The 16F84A OPTION Register
35

35. End of Chapter 6
36

36. 37