1. D VIGNESH
Email:Vignesh.devadhason@gmail.com NO.5177,FirstFloor,
Mobile:09535890902 Double High TensionRoad,
VijayanagerWatertank,
Mysore-570018
Objective
To obtain a challenging job and to work in a positive environment that provides
opportunitiestogrowalongwiththe Concern.
Summary
BE with 7 Years of experience in PCB design and development of Multilayer boards. Worked
on Allegro16.3 , Pads2005,Altium14.0
Professional Experience
 Currently working as a Senior System Engineer in L & T Technology Services, Mysore from
May 2010 to till date.
 Worked as Design Engineer in GDA Technology Limited ( L&T Infotech), Chennai from March
2007 to Jan 2010.
WorkHandled
 InvolvedinMulti-layerboarddesign(Upto16 Layers)
 Multi chip package FootprintcreationincludingshortpitchedBGAs.
 Assigning different types of ideal layer stack up for both Rigid and flex PCBs and to match
impedance,dielectricmaterialandThermal Plates.
 Workedon SchematicDraftingandNetlistimportandNetlistcomparison.
 InvolvedinPlanningthe LayoutcompatiblewithEMI/ EMC.
 Placementof components,Splitplanedesigning,Designrule check(DRC)
 RoutingHighSpeedSignals
 Impedance andRelative PropagationDelayMatching.
 Experience inBlindandBuriedviatechnology.
 Experience insettingthe designconstraintsinConstraintManager.

2.  TestPoint(TP) placement 100%
 Gerbergeneration&Assemblypackage creation.
 Pre Gerbercheckingand editingthe Gerbersilkscreen,soldermasketc.
 InvolvedinQualityAssurance checkingforPCBas perDFM and DFT Standards.
 GerbercheckinginCAM.
 Hands onExperience indoingReverse EngineeringfromGerbertoSchematic.
 PCB ConversionfromdifferentCADtoolstoAltium.
Academic Profile
 IC- Physical DesignTrainingatGDA TechnologiesbetweenMar2009 and Jan 2010.
 B.E. (Bachelor’s in Electronics and communication Engineering) from Mepco Schlenk
Engineeringcollege,Sivakasi,Tamilnadu,IndiawithFirstclass(2003- 2006)
 Diploma in Electronics and Communication Engineering, from VSVN polytechnic college,
Tamilnadu,IndiawithDistinction(2000– 2003)
Skills
Domain Medical Devices
Tools Cadence Allegro –Ver15.7 & 16.3,ORCAD (Schematiccapture)
AltiumWinter09 &Altium13.1.2, and 14.0
Pads2005, Cam350.,
Schematictool : OrCAD9.1 and Capture CIS,Allegro16.3,

3. Salient Projects
ProjectName Reverse Engineering
Duration
Apr 2014
to March
2015
Team Size 3
Description
Reverse engineering from Gerber files to PCB file using cam software.
Schematic entry for the same PCB. Compared between redrawn
Schematic Net lists with Customer input file (Gerber files). Gerber
generation andreview.
Role &
Contribution
Role:PCBdesigner
Responsibilities:
 PCB Librarycreation.
 Develop the Schematic files in Altium tool (ver14.0) from the pdf
versionof the Schematics.
 Update the SchematicfilesfromPCAD,PADStoAltium.
 Carryoutthe PCBImport & update inAltiumtool.
 Part creation, attributes update, mapping of symbol and footprint
for all the parts in Altium and extracting BOM from the
schematic.Gerbergenerationandvalidation.
 BOM verification
 PCB ConversionfromdifferentCADtoolstoAltium.
Tools AltiumDesigner14.0

4. Project 2:
ProjectName AtlanticDevelopmentboard
Duration
June
2013 to
March
2014
Team Size 5
Description
 The ADM PCB assembly is an early design for the expansion
mezzanine PCBs used in the Atlantic control system controllers. It
is common to all expansion mezzanine PCBs used within the Beam
Generation, Beam Shaping, and Real Time Controllers. It is the
intention that this board be available to test space requirements
and alsoas a general prototypingboard.
 The PCB assembly is a custom board because as there are specific
functional requirements which for the application which cannot
be met withanoff-the shelf solution
Role&
Contribution
Role:PCBdesigner
Responsibilities:
 Responsible forthe designaspectsof the project.
 Responsible forassistingthe leadonenforcingqualityguidelines
 Creationof schematicsymbolsandfootprintsforthe design.
 SchematicsdraftingandimporttoPCB
 Involved in Complete Board Design from component creation to
gerbergeneration,
 10 Layer board
 GerberverificationinCAMtool.
 Prototypingandboardbring-upactivities.
Technologies  Lengthmatchingdone forPCIe signals.

5. Tools Altium13.1.2
Project 3:
ProjectName Beamformer
Duration
Feb
2013
to
May
2013
Team Size 5
Description
The Beam Former is designed for Ultra sound scanning machines. Beam
former generates ultrasound signals; captures echo signals and performs
signal conditioning. This signal is then usedfor image processing to display
final output on screen. Project involved design and development of
Analog PCB (8-layer)for amplifying echo signals and Digital PCB (10-
layer)for USB 2.0 interface and Xilinx Virtex 5 FPGA to process and stream
the digital datato PC for image formation.
Role&
Contribution
Role:PCBdesigner
Responsibilities:
 Creationof schematicsymbolsandfootprintsforthe design.
 SchematicsdraftingandimporttoPCB
 Involved in Complete Board Design from component creation to
gerbergeneration,
 8 Layerboard
 Settingconstraintsinconstraintmanager
 Followingroutingtopologyandlengthmatching.
 GerberverificationinCAMtool.
Tools Cadence-Allegro16.3

6. Project 4:
ProjectName Ultrasoundscanner
Duration
Aug
2012
to Jan
2013
Team Size 4
Description
This scanner is a trolley based 2D ultrasound imaging system to be used in
vascular access. It is also useful in abdominal, interventional, intraoperative
and superficialdiagnostics.
The ultrasound scanner includes 2 main boards namely Power Board and
Display Board. Power Board will be responsible to provide the required
voltage and current to off the shelf mother board. It is also responsible for
charging/monitoringbattery.
Display board is responsible for providing the required voltage and current to
off the shelf display. It will also receive commands from Optical Encoder and
send it to Mother board through USB protocol. It is also responsible for
amplifyingthe audiosignalsfrommotherboard.
Role&
Contribution
Role:PCBdesigner
Responsibilities:
 Creationof schematicsymbolsand footprintsforthe design.
 SchematicsdraftingandimporttoPCB
 Involved in Complete Board Design from component creation to
gerbergeneration,
 FollowingroutingtopologyandlengthmatchingforUSB signals.
 Carriedout7 PCB for thisproduct,
 Followingroutingguidelinesof powersuppliesboard.
 GerberverificationinCAMtool.
Tools Cadence-Allegro16.0

7. Project 5:
ProjectName VideoConverterCard.
Duration
Jan
2012
to July
2012
Team Size 4
Description
Develop Video converter card which supports Composite video, S-Video
and DVI video input formats and stream the processed HQ video to PC
throughUSB inreal time.
Role&
Contribution
Role:PCBdesigner
Responsibilities:
 Creationof schematicsymbolsandfootprintsforthe design.
 SchematicsdraftingandimporttoPCB
 Involved in Complete Board Design from component creation to
gerbergeneration,
 Impedance matchingforUSB andhighspeedsignal.
 Signal integrity test and high speed signal simulation using
Hyperlynx DDR2SRAM, SDRAM and DVIVideosignals.
 Following routing topology and length matching for DDR2
SRAM,SDRAMand DVI signals
 10 Layer PCB
 GerberverificationinCAMtool.
Technologies BlindandBuriedviausedinthisdesign.
Tools Cadence-Allegro16.0

8. Project 6:
ProjectName
MPC 8548E Based Advanced Mezzanine
Card
Duration 4 Months
Team Size 3
Description
The board has two Gigabit Ethernet ports in the front panel and two
Gigabit Ethernet ports with 8x PCI Express lanes on the AMC edge
connector. The 8x PCI Express lanes can also be configured as 4x PCI
Express lanes and 4x Rapid IO lanes. The front panel also consists of a
RJ11 connector for debugging purpose. This card can be used in telecom
and networkingapplications.
Role &
Contribution
Role:PCBdesigner
Responsibilities:
 Creationof schematicsymbolsandfootprintsforthe design.
 SchematicsdraftingandimporttoPCB.
 Involved in Complete Board Design from component creation to
gerbergeneration,
 The board has 10 layerstack-upwith63 milsthickness.
 It has 929 components,4347pins& 4815 nets.
 PowerQUICIIIMPC8548E IntegratedHostProcessor@1333MHZ
 PCI-Express(32Gbps)
 I2C EEPROM forConfiguration
 GigabitEthernetInterfaces - 2 Ports
 x8 PCI-ExpressLanes
 Maximumnumberof pinsinsingle ICis783

9. Tools Cadence-Allegro15.7
Personal Details
FatherName : Devadhason.D
Date of Birth : 07/10/1982
Sex : Male
PassportNo : G1457016 Validupto: 26/12/2016
Nationality : Indian.