Capacitor Ladder Model using PSpice Optimizer

1. Optimizer Value of 100uF
R1 = 2 R1’ = 2.1748
Lower = “0” Upper = “10”
R2 = 2 R2’ = 4.96521
Lower = “0” Upper = “10”
R3 = 2 R3’ = 7.99156
Lower = “0” Upper = “10”
R4 = 2 R4’ = 9.04675
Lower = “0” Upper = “10”
C1 = 5nF C1’ = 34.1604nF
Lower = “1F” Upper = “1uF”
C2 = 5nF C2’ = 624.143nF
Lower = “1F” Upper = “1uF”
C3 = 5nF C3’ = 595.693nF
Lower = “1F” Upper = “1uF”
C4 = 5nF C4’ = 616.874nF
Lower = “0.1F” Upper = “1uF”

2. Fr equenc y
100Hz 10KHz 1. 0MHz 100MHz
V( N1) / I ( V1)
1. 0
10
100
L1 = 17.1220nH
Cs = 100uF
Rs = 1.903