memory technologies

1. COMPUTER ARCHITECTURE
MEMORY & I/O SYSTEMS
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2. Memory: Shared Memory
 Shared memory located at centralized location
 Consists of several interleaved modules – same distance(access time) from
any processor.
 Also called Uniformed Memory Access (UMA) Model
 UMA:
The time taken to access a word is uniform for all processors.
Programming challenges are easy.
UMA Machines can scale small sizes.
It has higher latency
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3. Memory: Distributed Memory
 Memory is distributed to each processor (Improves scalability)
 Non Uniformed Memory Access (NUMA) Model
 NUMA:
Memory access are much faster than others depending on which
processor ask for which word.
a) Message passing architectures:
No processor can directly access another processors memory
b) Distributed Shared Memory:
Memory is distributed, but the address space is shared
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5. Direct Memory Access
Modes of DMA Operation:
1. Block Transfer.
2. Cycle stealing.
3. Transparent DMA.
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6. Memory
 Pipeline : Single Instruction
 ILP : Multi number of Instruction
Need
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7. Memory Hierarchies
 The four primary technologies used in memory hierarchies are
1. Static Random Access Memory(SRAM)
2. Dynamic Random Access Memory(DRAM)
3. ROM and Flash Memory
4. Magnetic Disk.
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8.  Static RAM
Less memory cells per unit area.
It uses six to eight transistors per bit.
It is high cost per bit.
It need not to be refreshed.
The value can be kept indefinitely.
 Dynamic RAM:
It has more memory cells per unit area.
Single transistor is used to access the stored charge.
It is much denser and cheaper per bit.
It need periodic refresh.
The value cannot be kept indefinitely
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9.  A memory hierarchy consists of multiple levels of memory with different
speeds and sizes. The faster memories are more expensive per bit than the
slower memories and thus are smaller.
 The principle of locality states that programs access a relatively small
portion of their address space at any instant of time, There are two
different types of locality:
Principles of Locality
 ■ Temporal locality (locality in time): if an item is referenced, it will tend
to be referenced again soon. If you recently brought a book to your desk to
look at, you will probably need to look at it again soon.
 ■ Spatial locality (locality in space): if an item is referenced, items whose
addresses are close by will tend to be referenced soon. Libraries put books
on the same topic together on the same shelves to increase spatial locality.
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10. BASIC STRUCTURE OF MEMORY HIERARCHY
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11.  The faster memory is close to the processor and the slower, less expensive memory is below it.
 The goal is to present the user with as much memory as is available in the cheapest technology, while
providing access at the speed offered by the fastest memory.
A level closer to the processor is a subset of any level and all the data is stored at the lowest level.
 A memory hierarchy can consist of multiple levels, but data is copied between only two adjacent
levels at a time,
 The upper level—the one closer to the processor—is smaller and faster than the lower level, since
the upper level uses technology that is more expensive.
 The minimum unit of information that can be either present or not present in the two-level
hierarchy is called a block or a line.
 If the data requested by the processor appears in some block in the upper level, this is called a hit.
 If the data is not found in the upper level, the request is called a miss.
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13.  The hit rate, or hit ratio, is the fraction of memory accesses found in the
upper level; it is oft en used as a measure of the performance of the
memory hierarchy.
 The miss rate (1−hit rate) is the fraction of memory accesses not found in
the upper level.
 Hit time is the time to access the upper level of the memory hierarchy,
which includes the time needed to determine whether the access is a hit or
a miss.
 The miss penalty is the time to replace a block in the upper level with the
corresponding block from the lower level, plus the time to deliver this
block to the processor. Because the upper level is smaller and built using
faster memory parts, the hit time will be much smaller than the time to
access the next level in the hierarchy, which is the major component of the
miss penalty.
 A portion of memory can be used as a buffer to hold data temporarily that
is to be read out to disk. This technique is referred to as disk cache.
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