2. S.No FPGA CPLD
1 It is more expensive It is less expensive
2 The Architecture is Gate Array Format The Architecture is PALs Format
3 Power consumption is High Power Consumption is low
4 Speed performance is depends on application Speed performance is high
5 FPGA is a volatile memory CPLD is a Non-Volatile Memory
6 Density of Gates is from 10,000 to 1 Million Density of Gates is up to 10,000
7 The internal Architecture of FPGA is LUT The internal Architecture of CPLD is a form of Logic
function with Sea of Gates
8 Suitable for complex applications Suitable for small scale applications
16-04-2020 T.GOWRI KISHORE