1. Developing Monolithically Integrated CdTe Devices
Deposited By AP-MOCVD
Eva Tejedor Alonso
Universidad de Zaragoza
Zaragoza (Spain)
Abstract: The aim of this project is to investigate the
fabrication of CdTe modules, including: (a) deposition of
CdZnS/CdTe by Atmospheric Pressure Metal-Organic
Chemical Vapour Deposition (AP-MOCVD) onto ITO
coated boro-aluminosilicate glass substrate; (b) thermal
evaporation to deposit gold back contacts or screen
printing to deposit C/Ag back contacts, including
characterisation of solar cells using IV and a solar
simulator arrangements; (c) mechanical scribing isolating
lines for achieving monolithically integrated devices and
(d) characterisation of samples/devices using
profilometry/SEM. All these with the purpose of
improving performance and efficiency of the devices and
moving towards PV modules level research.
The different steps in the manufacture of cells were
improved, making it possible to move to module level.
Keywords:
CdTe
AP-MOCVD
Monolithic Interconnection
Mechanical Scribing
TCO
1. INTRODUCTION
Due to the depletion of oil reserves and the increase in
population and consumption, the world's energy supply
and planetary health are increasingly at risk. Changes are
needed in the production of energy, to continue enjoying
it without destroying the planet, as for example, the use
of renewable energy.
Research is still needed in the renewable sector, to
improve energy storage, integrate different renewable
energies, reduce the costs and increase the efficiency.
Solar energy is the origin of all the renewables, because
the sun moves all the natural cycles, and it can be directly
converted into usable electricity with photovoltaics.
The first generation of PV (monocrystalline and
polycrystalline silicon) is well established in our lives.
However, this first generation requires high temperatures,
ultra-high vacuum and complex operations for cutting
and assembling silicon wafers, making this technology
complicated and expensive [1]. This is why a perfect
substitute would be the second generation of PV.
Second generation PV includes thin film amorphous
Silicon, CdTe/CdS and CIGS. It is a low cost technology
because it uses less raw materials, inexpensive substrates
and cheaper manufacturing processes, like MOCVD, the
method used for this study.
Thin film technology uses monolithic integration to
interconnect cells in series during the fabrication process.
This interconnection consist of 3 cuts: the first one is
realized onto the TCO (Transparent Conducting Oxide),
isolating different areas; the second one is done after the
pn junction deposition, providing an electrical path from
the TCO front contact of one cell to the back contact of
the next cell. The last scribe is done after the deposition
of the back contact, isolating the different cells [2-3].
The scribing process can be done by laser or by
mechanical scriber. One of the objectives of this research
is to improve the scribing techniques, to be able to
fabricate modules with less dependence on laser
suppliers.
Of the many thin film materials, only CIS and CdTe have
been developed enough to be able to compete with
monocrystalline silicon in terms of cost, stability and
efficiency. [4]
CdTe is used as the material of the absorber layer in low
cost solar cells. It is the cheapest thin film material
because only a few microns are needed to absorb all the
incident light. This is due to CdTe energy bandgap (~1.5
eV), which is the best for solar energy conversion.
According to the Shockley-Queisser limit for the
efficiency of different types of solar cells, shown in Fig.
1, CdTe technology has huge potential, which can be
exploited though research [5].
Figure 1. The Shockley-Queisser limit for the efficiency
of different types of solar cells.
The chronological evolution of the efficiency of solar
cells (appendix 1), made from different technologies used

2. today, is essential to evaluate the results obtained in the
investigations.
2. METHODOLOGY
For the manufacture of cells, the whole process can be
summarised by: MOCVD pn junction deposition; back
contact deposition; front contact deposition and
characterisation.
For the manufacture of micro-modules monolithic
integration process has to be added.
2.1 Atmospheric Pressure Metal Organic Chemical
Vapour Deposition (AP-MOCVD).
AP-MOCVD was the deposition method used for the pn
junction growth. This method offers high flexibility in
terms of accuracy with respect to the doping and alloying
of the layers of the devices. AP-MOCVD can be
performed to investigate various experimental parameters
for improvements in the quality of the CdTe devices.
The substrate used for the deposition was ITO (Indium
Tin Oxide) coated aluminosilicate glass substrate (1.1
mm thick glass, 4-8 Ω/sheet resistance and 5 x 7.5 cm2
size). Typical composition of the aluminosilicate glass
was 55.0% SiO2, 7.0% B2O3, 10.4% Al2O3, 21.0%
CaO, and 1.0% Na2O.
Some cleaning processes were carried out on the
substrate before the deposition to improve the layer
nucleation and the quality of the pn junction properties.
The deposition was performed in a horizontal AP-
MOCVD reactor and the carrier gas used was purified H2.
Precursors (brought with the carrier gas) flew parallel to
the static substrate. This reactor was equipped with a
triple wavelength laser reflectometer for in situ
monitoring of the layer thickness and growth rate for the
CdTe absorber and the CdS/CdZnS window layers.
Table 1 shows the order in which the different layers
were deposited along with their thickness and deposition
temperatures.
Table 1. Thicknesses and temperatures for MOCVD
deposited layers.
The process started with the CdS deposition, which is
used as nucleation (seed) layer for the following
semiconducting layers. Then a CdZnS layer was
deposited, completing the window layer growth.
CdTe:As (As doped CdTe) was grown in a bi-layer form
onto the CdZnS film, including a 2µm layer of CdTe:As
(p-type), doped with ~1018
atoms/cm3
As and a second
250 nm layer of CdTe:As+ (p+-type), using an As
concentration of ~1019
atoms /cm3
, giving the devices an
npp+ structure.
CdTe is known to be a difficult material to dope with
high carrier concentrations [6]. In these experiments up to
0.01% of the arsenic available contributed to the p-type
conductivity of the CdTe [7]. Nevertheless, these doping
levels are adequate to provide npp+ CdTe devices with
conversion efficiency in excess of 10% [8].
Towards the end, CdCl2 was grown, followed by a 10 min
anneal (420ºC) for device activation. This treatment
improves the window and absorber layers.
The excess of CdCl2 had to be washed due to its toxicity.
Finally, the device was annealed for 40 minutes at 1700
C
in a conventional oven for further activation.
2.2 Cell Structure
The cell structure most commonly used for CdTe solar
cells is the “superstrate configuration”, where the cell is
deposited on a transparent, conducting substrate from
where the light enters, as shown in Fig. 2.
The substrate, coated with ITO serves as the front contact
of the cell [2].
The next layer is CdS, which forms part of the window
layer. A very thin CdS film (typically <50 nm) raises the
current density (Jsc) in the cell [2].
Then, the growth of CdZnS (190 nm) completes the
window layer. The addition of Zn results in a wider band
gap (between 2.7-3.0 eV), so the photon transmission and
Jsc are increased and consequently, the performance [9].
CdS and CdZnS are the n-type materials of the cell [2].
Next there is the CdTe, the absorber material, formed by
2 layers (2000 nm and 250 nm) doped with different
concentration of As, forming the p and the p+ layers. The
p+
layer provides a back surface field, improving the
characteristics of the metal back contacts.
Back Contact
CdTe:As+ (p+)
CdTe:As (p)
CdZnS (n)
ITO
Glass Substrate
Figure 2. CdTe solar cell structure by MOCVD
The last layer is the metallic back contact, current-
carrying conductor, applied onto the pn junction. For this
study it was usually gold (~0.3) due to its high electrical
conductivity, its great ductility and its resistance to
corrosion during storage. Also because of the work
function of gold (~5.1 eV) which makes it a good choice
for a CdTe back contact [9-10]. Also a carbon-silver bi-
layer was used as the back contact of some devices, to
avoid vacuum based processes.
2.3 Back Contacts
Depending on the material used for the back contacts the
deposition technique was different. For gold it was
thermal evaporation.
Evaporation is a common method of thin film physical
deposition. The source material is evaporated in high
vacuum (usually better than 10-5
mbar), which allows
vapour particles to travel directly to the target object
(substrate), where they condense back to a solid state.
Layer Thickness Temperature
CdS 50 nm 315ºC
CdZnS 190 nm 360ºC
CdTe: As 2000 nm 390ºC
CdTe: As+
250 nm 390ºC

3. A thermal evaporator utilizes an electric resistance heater
to melt the material and raise its vapour pressure to a
useful range. A temperature close to melting point is
needed to make the gold evaporate.
A shadow mask was used to deposit the gold controlling
the shape and size of the contacts made (Fig. 3). The
thickness of gold had to be controlled, to keep gold
resistivity as low as possible (~300 nm).
However, evaporated gold is intended to be replaced with
low cost options with probably higher long-term stability
than gold. Thus, the deposition of a conducting bi-layer
of carbon and silver is also used, as they require non
vacuum methods, which are simple to apply.
The technique used to apply these bi-layer back contacts
to the solar devices was screen printing.
The process consisted of placing the screen pattern over
the substrate, placing then some carbon paste over the
screen. This paste was moved gently with a rubber
squeegee to cover the screen pattern, pressing down to
make the paste flow through the screen and printing this
way the pattern onto the sample below.
Then, the paste on the sample had to be oven-cured at
170 ˚C for 30 minutes. This step allowed the carbon paste
to dry by removing the solvent contained in the paste.
All the process was repeated with silver paste, depositing
it over the dried carbon paste.
Here carbon is only used because silver alone does not
perform well when deposited directly onto the pn
junction. Due to its relatively lower conductivity, carbon
film has to be as thin as possible in order to reduce its
contribution to device series resistance.
2.4 Front Contacts
Metallic front contacts to the ITO film were needed for
the CdTe devices to be characterised, in order to
complete electrical connection to the sample. For this,
part of the pn junction was removed to expose the ITO
surface, if not it results in an increase of the series
resistance. A mixture of Indium-Gallium was then
applied in that area. Other materials used to make front
contacts were silver paste (Fig. 3), a silver pen and epoxy.
Figure 3. CdTe device with 8 gold back contacts and
silver paste front contacts.
2.5 Characterisation
The characterisation of devices was done with a solar
simulator, a device that provides an artificial illumination
to approximate natural sunlight at 1000 W/m2 (i.e. AM
1.5 G), which is the STC (standard test conditions) for
testing solar cells. The test carried out was the J-V curve
(current density-voltage), where the applied voltage is
swept within a given range and the current measured.
Parameters such as Jsc (current density), Voc (open
circuit voltage), η (efficiency), FF (Fill Factor) and
Rs/Rsh (series/shunt resistances) were then calculated
from the curve to provide an overall performance of
photovoltaic devices.
Other 2 devices used for the characterisation of samples
were the profilometer, to measure the surface profile, and
the SEM (Scanning electron microscope).
2.6 Scribing Technique.
To transfer from single cells to monolithically integrated
modules, series interconnections between individual
subcells were made, using scribing techniques.
The monolithically integration scheme consists of three
scribing processes which form the interconnection of
subcells; they can be made by laser, by mechanical
scriber or just by using a mask. For this study a
mechanical scriber was used. The 3 types of scribes (P1,
P2 and P3) are shown in Fig. 4.
P1 is used to scribe within the TCO, providing isolation
and defining the individual cells [9].
P2 is the scribed line removing the full p-n junction
(CdZnS/CdTe) down to the TCO. The TCO exposed will
form the electrical contact of one cell, with the back
contact of an adjacent cell.
P3 separates different units of back contacts, isolating the
individual cells of the module.
When gold back contacts are deposited, P3 is not scribed
because a mask is used for the deposition of the back
contact (figures 8 and 9). When the bi-layer (C/Ag) back
contact is used, P3 scribing of the continuous carbon
layer is necessary to avoid shunting losses. [11]
With mechanical scribing it is more difficult to calculate
the width and depth of the cuts compared to with laser
technology. However, it provides some flexibility and
allows rapid prototyping. It was therefore necessary to
experiment, to find the appropriate scribing configuration
in order to enhance precision in the cuts. [12]
The basic mechanism of operation is the movement of the
platform on which the sample is mounted, inwards and
outwards whilst the diamond tip scribes on said sample.
The force applied by the tip over the sample is controlled
by two weights. Such a force can vary, ranging from 0 to
581cN, moving from 0 to 12 in a scale. The depth the tip
reaches in the scribing process can be also controlled by a
micrometre screw, as well as its angle of inclination (60º
towards the substrates for this research).
The first tests were made just for P1 scribes, scribing
when the platform was pulled out. After several tests, it
was seen that the P1 scribes were not homogenous and
the quality of the scribed lines was changing from one
line to another. So it was proved to shift the configuration
of the scriber so that the samples were written in address
opposite, when the platform was pushed in.
Problems were also found with P2 scribing. Sometimes
the lines were not wide and clean enough to make a good
path for the electrons.
After making all the corrections this was the
methodology employed for the different types of cuts: To
isolate the TCO with P1 it was needed to repeat the
scribes over the same line, until isolation was reached.

4. Figure 4. Scheme of the monolithic interconnection [9].
To scribe P2 only the starting height of the tip had to be
configured, touching gently the surface of the sample,
scribing a line and then moving by 0.01 mm to scribe
again and obtain this way a cleaner cut. The same
procedure was used for P3 scribes.
At the beginning the separation between these 3 cuts was
0.5 mm, later it was reduced to 0.3 mm, to maximize the
active area of the cells.
Other problem that arose in the scribing process was the
clamping of the samples on the platform to avoid
movements. This was solved by using double-sided
carbon adhesive tape on the 4 corners of the samples.
The last issue related to the mechanical scribes was the
damage done to the diamond tip caused by P1 scribing,
resulting in deep scribed lines and damage to the TCO
surface. This was investigated to find a proper solution,
as will be explained in the next chapter.
3. RESSULTS
The main objective in the last six months of study has
been to use the knowledge acquired through the research
in the manufacture of cells and apply it to the
manufacture of modules, using monolithic integration.
3.1 Delamination
Delamination was the reason why TCO was used as the
substrate for this study, because TEC glass was
impractical for the monolithic integration of cells. This
was due to delamination after the CdCl2 treatment at the
end of the MOCVD process. It mainly occurred at the
edges of the substrate and around the P1 scribes made
with mechanical scriber.
Delaminated samples were analyzed with SEM, deducing
that the affected areas have larger CdTe grains, which
come off from the glass surface easily.
Delamination did not happen over TCO glass due to its
different composition (aluminosilicate). On the other
hand, TEC glass is alkaline.
3.2 Cells Fabrication Results
Although the main purpose in these 6 months has been to
move from cell manufacturing to module manufacturing,
the investigations with cells have continued, since its
manufacturing process is simpler and faster. Hence,
possible improvements can be identified faster and then
applied in the manufacture of modules.
Tables 2 and 3 show the results of 2 devices with gold
back contacts (0.5 0.5 cm2) after the analysis with the
Solar Simulator (J-V curve), where ɳ is the efficiency
(%), Voc is the Open Circuit Voltage (V), Jsc is the
Current Density (mA/cm2), FF is the Fill Factor (%) and
and Rs/Rsh the series/shunt resistances (Ω/cm2
).The best
and the worst cell of each device are shown.
As can be seen from Tables 2 and 3, results are getting
better with time, due to the increased knowledge of the
different steps of the fabrication process.
Table 2. CSER_465 platform IV data table.
(31-07-13) Worst cell Best cell
η (%) 9.4 11.2
Jsc (mA/cm2
) 22.2 23.7
Voc (V) 0.64 0.6
FF (%) 65.4 72.9
Rs (Ω/cm2
) 1.6 1.4
Rsh (Ω/cm2
) 357.7 1702.8
Improvements have been reached by using more As
(doping more the CdTe). The result was and increment of
the efficiency. Also Zn was increased, which improved
the current density (Jsc).
Table 3. CSER_515 platform IV data table.
(27-11-13) Worst cell Best cell
η (%) 13.3 15.6
Jsc (mA/cm2
) 24.4 25.3
Voc (V) 0.7 0.7
FF (%) 73.1 78.1
Rs (Ω/cm2) 2.6 2.8
Rsh (Ω/cm2) 3323.6 2168.2
In the last results showed (Table 3) the window layer was
reduced, improving this way the current density (Jsc).
Also the post growth activation annealing was optimised
for a better open circuit voltage (Voc) and fill factor (FF).
All these experiments had also drawbacks. When a factor
is increased, another factor or factors are decreased,
because these parameters are interdependent.
3.3 Annealing Study
Not only the deposition settings affect to the final results,
there are also other parameters, like the annealing time,
that have to be taken into consideration.
An experiment was realised to study the importance of
annealing. In this experiment a device was grown on a
TCO substrate (by AP-MOCVD). Then 8 carbon back
contacts were printed (Fig. 5a). Each contact was named
with a letter and a number.
The sample was annealed during 10 min (170 ºC) for the
carbon paste to dry. Then front contacts were made with

5. silver paste and 4 of the 8 carbon back contacts were
completed with more silver, using a silver pen (Fig. 5b).
Figure 5. Sample CSER_469 with 8 carbon back contacts
(a), with 4 carbon and 4 carbon-silver back contacts (b)
and with 8 carbon-silver back contacts (c).
The sample was cured for 30 min at room temperature
and measured with the solar simulator, obtaining the
results shown in Table 4. Cells with back contacts made
just with carbon were less efficient.
Table 4. CSER_469 results sample with 4 carbon and 4
carbon-silver back contacts
1
C/Ag
2
C/Ag
3
C
4
C
A η (%) 9.3 8.8 3.1 2.4
Jsc (mA/cm2
) 21.4 20.5 15.5 12.6
Voc (V) 0.7 0.7 0.7 0.7
FF (%) 57.9 57.7 27.0 26.1
Rs (Ω/cm2
) 9.0 9.2 44.5 55.2
Rsh (Ω/cm2
) 317.1 318.6 87.8 71.8
B η (%) 10.8 10.4 3.1 3.0
Jsc (mA/cm2
) 22.5 22.2 15.8 15.3
Voc (V) 0.7 0.7 0.7 0.7
FF (%) 62.4 61.3 26.2 26.0
Rs (Ω/cm2
) 7.0 7.2 44.7 46.6
Rsh (Ω/cm2
) 451.6 378.8 78.6 75.6
More silver paste was added to the front contacts of the
same sample (Fig. 5c), curing again the silver paste in the
oven 10 min (170ºC). By using the silver pen, other 4
silver contacts were added to the 4 back contacts made
just with carbon.
The sample was tested anew with the solar simulator. The
results significantly improved, as can be seen in the
results shown in Table 5.
This test showed the importance of the annealing time.
Also the importance of the location of the sample during
the MOCVD process, because the reactor does not
deposit the compounds homogenously and the best
results are always found in the middle of the deposition
area.
Here the row B was closer to the central area of the
deposition in the reactor, having therefore better results.
Table 5. CSER_469 second solar simulator results with 8
carbon back contacts.
1 oven
C/Ag
2 oven
C/Ag
3
C/Ag
4
C/Ag
A η (%) 10.2 9.5 10.0 10.2
Jsc(mA/cm2
) 21.9 20.8 21.2 22.4
Voc (V) 0.7 0.7 0.7 0.7
FF (%) 60.8 61.1 63.0 61.1
Rs (Ω/cm2
) 6.5 7.1 6.9 5.4
Rsh (Ω/cm2
) 391.1 401.8 365.7 231.7
B η (%) 11.4 11.1 11.2 11.2
Jsc(mA/cm2
) 22.7 22.5 22.6 22.5
Voc (V) 0.7 0.7 0.7 0.7
FF (%) 65.2 64.5 64.8 65.1
Rs (Ω/cm2
) 5.9 5.7 5.9 5.9
Rsh (Ω/cm2
) 555.3 480.6 465.2 535.4
3.4 Mechanical Scriber Configuration
To completely isolate the TCO it was needed to repeat
the scribes various times over the same line. As a result
some scribes were very deep, damaging the substrate
(Fig. 6) and even producing the fracture of the sample
during subsequent processes. Profilometry tests showed
that the depths varied from ~0.09 µm to 17.2 µm (Fig. 7).
Figure 6. Mechanical scriber microscope images showing
the damage caused to the substrate by several scribes.
Figure 7. Profilometry scan result for a P1 scribe, where
the blue colour represents the deepest areas.
Numerous tests were performed by varying each of the
parameters that define the scribes. In the end, the
appropriate settings, for applied force, height of the
diamond tip and scribing direction were found.

6. After adjusting such settings outcomes were improved,
obtaining homogeneous and cleaner cuts (Fig. 8).
Figure 8. Scribed lines seen from the mechanical scriber
microscope, after the scriber diamond tip passed once (a),
twice (b), three times (c) and four times (d).
With each additional pass cuts cause more damage to the
TCO surface. By increasing the force applied with the
weights, it was found that fewer scribes were needed to
isolate the TCO and the average depth was around 3 µm.
For P2 scribes, the problem was the damage caused to the
TCO when too much force was applied. Also that the
centre of the cut was not clean, which may obstruct the
flow of electrons. This was solved by scribing P2 twice
each time, making the cut wider.
As a result of this study the best configuration for the P1
scribes was force 7, tip height calculated by lowering the
tip to touch the surface and as many number of passes as
needed to isolate the TCO. To write P2 the best option
was force 2, lowering the tip to lightly skim the surface
and repeating each scribe twice, spaced 0.1 mm.
There was also necessary to study the diamond tip, which
was damaged by P1 scribes. SEM images showed that the
face of the tip that was being used was worn. This was
solved by turning the tip to use a new face for scribing.
3.5 Monolithically integrated modules
After having upgraded all the necessary techniques, the
first mechanical scribed monolithically integrated micro-
module was made, with an average efficiency of 4.54 %.
As it was expected, the results were worse than those of
cells. This is due to factors such the increase in the
resistance when cells are connected together or the
mechanical scriber cuts which, despite the improvements,
are still not as good as the laser ones.
Further research allowed improvements in the next
manufactured modules.
4. CONCLUSIONS
Over the last 6 months various stages of the
manufacturing process of CdTe cells with MOCVD have
been investigated and improved, with the objective of
applying the acquired knowledge to the fabrication of
CdTe monolithically integrated micro-modules.
Due to delamination issues related TEC glass, TCO was
the substrate chosen for the deposition of semiconductors.
Different improvements were made in the MOCVD
settings and annealing times, obtaining better results.
Numerous tests were conducted with the mechanical
scriber to achieve a scribing quality good enough to be
applied in the manufacture of monolithically integrated
devices. These experiments have helped to know more
about the structure of CdTe devices.
All the above mentioned developments were assembled
together for the manufacture of micro-modules with
subcells interconnected in series.
Through research, efficiency has been successfully
increased, allowing jumping from cell to module level,
although research is still needed at the module level.
Monolithically integrated CdTe devices deposited by
MOCVD are promising candidates for low-cost PV.
5. ACKNOWEDGEMENTS
The author greatly thanks the host organisation (CSER)
and the academic supervisor of this study, for the
suggestions and guidance, contributing to this work.
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