Coefficient of Thermal Expansion and their Importance.pptx
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PPT Samples (1).pptx
1. High Gain Switched Capacitor Multilevel
Inverter with Reduced stress and
Energy Storage Elements
Presented By :
Ms. Elsa Susan Jacob
MAC19EEPE03
M. Tech.PE
EEE Dept.
Guided by,
Smt. Beena M Varghese
Associate Professor
EEE Dept.
MACE
2. Contents
๏ถ Objectives
๏ถ Literature Review
๏ถ Single-Phase Seven level Inverter
๏ถ Control strategy
๏ถ Simulink Model with results
๏ถ Proposed Inverter
๏ถ Analysis
๏ถ Hardware Implementation
๏ถ Conclusion
๏ถ References
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High Gain Switched Capacitor Multilevel Inverter
3. Objectives
๏ถ To design a high gain Multilevel inverter.
๏ถ To reduce the inrush current of the inverter.
๏ถ To reduce the switching stress.
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High Gain Switched Capacitor Multilevel Inverter
4. Literature Review
๏ถ J. Chen, "A Single-Phase Step-Up Seven-Level Inverter With a Simple
Implementation Method for Level-Shifted Modulation Schemes," in
IEEE Access , 2019.
๏ Natural capacitor voltage balance
๏ Triple voltage gain
๏ Reduced number of components compared to
existing seven level inverter topologies.
๏ High capacitor inrush current.
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Fig.1. Single phase Seven Level Inverter
High Gain Switched Capacitor Multilevel Inverter
7. Simulation Parameters of Seven-level Inverter
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Table.1. Simulation Parameters
High Gain Switched Capacitor Multilevel Inverter
8. Simulink Model of Seven-level Inverter
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Fig.19. Simulink Model of Seven-level Inverter
High Gain Switched Capacitor Multilevel Inverter
9. Proposed Multilevel Inverter
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Fig.31 (a) Single phase Seven level Inverter and (b) Proposed Multilevel Inverter
(a) (b)
SC Cell
High Gain Switched Capacitor Multilevel Inverter
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๏ถ Output Voltage and output current (M.I =1) with R and RL load Using FFM
Simulation Results
Fig.49.(a)Output Voltage and Output Current with R and (b)RL Load (24โฆ and 100mH) for M.I=1
(a)
(b)
High Gain Switched Capacitor Multilevel Inverter
11. Analysis of Proposed Inverter
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Fig.55. (a) THD Vs Control strategies (b) THD Vs Switching Frequency(kHz) (c)Power loss in LSSM technique
High Gain Switched Capacitor Multilevel Inverter
(a) (b)
0
2
4
6
8
10
12
14
16
18
PDPWM LSSM PODPWM APODPWM FFM
THD(%)
14.5
15
15.5
16
16.5
17
17.5
18
0 10 20 30 40 50 60
THD(%)
Switching frequency(kHz)
PDPWM
PODPWM
APODPWM
LSSM
0
2
4
6
8
10
12
14
16
18
20
Switching loss Conduction loss Capacitor loss Total loss
Power
loss(W)
Basic Proposed
6.87
6.39
7.52
11.75
14.96
18.3
(c)
0.57
0.154
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Comparison of Inverters
Table 4 . Comparison of different inverters
Table 3 . Component Comparison of different inverters
๐๐ฟ = No. of levels, ๐๐ ๐ค= No. of switches, ๐๐ท๐ถ= No. of DC sources, ๐๐= No. of diodes
Input voltage = 30 V
High Gain Switched Capacitor Multilevel Inverter
13. Conclusion
๏ถ High gain inverter compared to existing topologies.
๏ถ Reduced switching stress.
๏ถ Reduced inrush current.
๏ถ Reduced number of energy storage elements.
๏ถ Reduced number of power components compared to other topologies.
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High Gain Switched Capacitor Multilevel Inverter
14. References
[1] J. Chen, C. Wang and J. Li, "A Single-Phase Step-Up Seven-Level Inverter With a Simple Implementation
Method for Level-Shifted Modulation Schemes," in IEEE Access , vol. 7, pp. 146552-146565, 2019.
https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=8862817
[2] Y. Nakagawa and H. Koizumi, โA hybrid nine-level inverter with series/parallel conversion,โ in Proc. IEEE
International Symposium Circuits and Systems 2017, Baltimore, USA, 28-31 May 2017, pp. 1-4.
[3] J. Liu, J. Wu, J. Zeng, and H. Guo H, โA novel nine-level inverter employing one voltage source and reduced
components as high-frequency ac power source,โ IEEE Transaction Power Electronics, vol. 32, no. 4, pp.
2939-2947, April 2017.
[4] Y. Nakagawa and H. Koizumi, "A Boost-Type Nine-Level Switched Capacitor Inverter," in IEEE Transaction
Power Electronics, vol. 34, no. 7, pp. 6522-6532, July 2019.
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High Gain Switched Capacitor Multilevel Inverter