1. RESUME
Name:- ALOK ASHOKRAO JADHAV
Contact no:- +919620129631 E-Mail:- alokjadhav_99@yahoo.com
Objective:-
To secure a challenging position where I can effectively contribute my skills as an Engineer, acquiring
competent Technical Skills.
Academic Qualification:-
 Recently pursued MTech in VLSI Design in Vellore Institute of Technology, Vellore.
Examination Month& Year of
Passing
University/Board CGPA/Percentage
MTech VLSI Design May 2015 VIT Vellore 9.36
B.E. Electronics May 2012 VIT Pune 8.73
Diploma (Ind. Electronics) May 2009 GPKP Kolhapur 87.38
S.S.C. March 2006 Maharashtra 86.93
Work Experience
 Internship at Intel Technology India Pvt. Ltd, Bangalore, India.
Duration: Oct 2014 to Present
Domain: 1. Verification of State Retention and Non-retention registers low power offload Engine.
-Complete verification of properties of state retention and non-retention registers based on
checker and coverage using System Verilog and OVM.
2. Automation of retention checkers and Coverage.
Project Work:-
 Design and Implementation of Double Precision Pipelined Floating Point Co-processor.
-Proposed Design of Double Precision floating point co-processor and its interfacing to processor in
Verilog HDL. Synthesis and Physical design is done with cadence TSMC 180 nm standard cell
library.
 VLSI Based Improved Low Power Floating Point FIR Filter Design For DSP Applications.
-Proposed design of FPBM based FIR filter using Verilog HDL in order to get low power & precise
response. Synthesis of the design is done with cadence CMOS gpdk-45 nm standard cell library.
 ASIC based HDB3 Encoder Chip Design for digital communication system.
-Implementation of HDB3 encoder using Verilog HDL language and synthesis using TSMC 180 nm
Library.
 ProSel MBISR with enhanced ESP and ECC scheme for SoC memories.
-Design of MBISR including BIST, Error correction codes, & redundancy analyzer module in order
to get yield improvement in SOC memories.

2.  RF Stability and Performance analysis of JLTGT.
-Calculation of RF Parameters of Junctionless Tri-Gate Transistor (JLTGT) and Stability
Performance Analysis using Silvaco TCAD.
 Smart Car parking system using FPGA.
-Design of Smart Car Parking System in Verilog HDL with Altera ModelSim and Quartus 2 and it's
Implementation on FPGA Board.
 Performance and analysis of Automatic meter reading in Power Line Communication Systems as a
Major Project in Final Year Engineering.
-Developed the system for Automatic readings of Electric meters using the power line
communication modem #1187 from SUNROM Technology.
 Vehicle power adaptor as a mini project in third year engineering.
-Developed less expensive charging circuit for the laptops in vehicles using the principle of step up
chopper and power semiconductor devices.
Other Achievements:-
 Merit Student in MTech VLSI Design in VIT University, Vellore.
 Presented Paper on project RF Stability and Performance Analysis in SCOPUS Magazine of Set
Conference NOV 2013 held in VIT Vellore.
 1st
in Government polytechnic, Kolhapur in Diploma Industrial Electronics.
 Winner of CIRCUIT EYE competition in MELANGE 2011 and runner up of the same in MELANGE
2012 held in VIT, Pune.
 Awarded by Maharashtra Business Technical Board for securing A grade in C programming course.
Skill Sets:-
Software: C language, System Verilog, Verilog HDL, VHDL, OVM, UVM, PERL, TCL, Cadence tools,
Psim, MATLAB, Altera tools, silvaco TCAD, Tanner, Tina TI, ngspice, microwind.
Other Activities
 Participation in the microcontroller events.
 Participation in Vishwakarandak cultural event in VIT, Pune.
 Organizer for micromind competition in melange 2010 held in VIT, Pune.
Strengths: -
Management Skills, Consistency in work, having nature of never give up, and Leadership Qualities.
Personal Profile:-
Name : Alok A. Jadhav
Father Name : Ashok J. Jadhav
Mother Name : Anita A. Jadhav
Permanent Address : ‘Athavan’, Karagde point, Kolhapur, Maharashtra.
Current Address : YCR Enclave, 10th
cross, Bellandur, Bangalore.
Contact Nos. : +91-9620129631, +91-7588171320
Date of Birth : 21/05/1991
Nationality : Indian

3. Languages known : English, Hindi, Marathi.
Email-id : alokjadhav_99@yahoo.com
Hobbies : Playing Cricket, Singing and Listening Marathi songs, Yoga and Pranayam.
.Declaration:-
I hereby solemnly declare that all the statements made above are true to the very best of my
knowledge and belief.
MR. ALOK A. JADHAV