Intel-Processor 80286

1. Intel-Processor 80286
Introduction:
The intel 80286 was introduced in 1982. In 1990 found in many machines (PC’s) it
become very popular. The new memory management generation is introduced in 80286. It
contains 24bit address bus accesses up to 16MB of RAM. The 80286 supporting multitasking
and allowing a user to work more than one application at a time. In 80286 Advantages of
protected mode provide help to prevent application from writing outside of their allocated
RAM zones.
Features:
 The 80286 is designed for multi user and multitasking environment.
 The 80286 is updated version of 8086.
 In 80286 1GB of virtual memory by using its memory-management system.
 In 80286 16MB address of physical memory.
 The 80286 is execute instruction more fast than 8086.
 The 80286 operates in both the real and protected modes.
 In real mode, the 80286 addresses a 1MB memory address space.
 Various version of 80286 are available that run on 12.5 MHz,10 MHz and 8 MHz clock
frequencies.
Processor Design:
 80286 designed for multitasking and multi user.
 It has 134000 transistors and four independent units.
 Instruction unit
 Bus unit
 Address unit
 Execution unit
 In 80286 produced 68-pin package like:
 Plastic leaded chip carrier
 Leadless chip carrier
 Pin grid array
 The 80286 more efficient in the execution of jumps, in complex micro-coded numerical
operation buffering, and prefetch of instructions.

2. 1. Instruction Set:
Instructions performed by CPUI
 Four main components:
 Address Unit (AU)
 Bus Unit (BU)
 Instructure Unit (IU)
 Execution Unit (EU)
InstructionOperation:
Instruction operations are:
 Move operation
 Xchg operation
 Load operation
 Push and Pop operation
 Arithmetic operation
InstructionRules:
 Data in move or copy from source to destination.
 Source and destination both are called operand.
 In move instruction the data is move or copy from register to register.
 No memory to memory movement.
 No segment to segment movement.
 No immediate to segment movement.
 Flag bit not effected in move instruction.
Addressing Modes:
In 80286 has two modes:
 Real address mode
 Protected Virtual Address Mode
 Register Mode
 Immediate Mode
 Direct Mode

3.  Register indirect Mode
 Based Plus Index Mode
 Register Relative Mode
 In 80286 real address modes act as a faster version of 8086 and program execute without
of any change in 80286.
 In 80286 protected virtual address mode accessing multiple program at a time and
supported Multitasking.
 In register mode both operand must be registers also they have same size.
 In immediate mode one operand is register and other one is physical memory.
 In direct mode one operand is register and other one is must be physical memory carted
as an address.
 In register indirect mode both operand must be registers and one operand register is
catered as an address.
 In base plus index mode both operand must be register but one operand general register
plus index register and catered as a physical address.
 In register relative mode both operand must be register but one operand contains one
register plus relative number catered as a physical address.
2. Instruction Encoding:
In instruction encoding command are given below:
Move Command:
 Register Mode:
 Mov AX,BX
 Mov AL,BL
 Immediate Mode:
 Mov CL,11001110B
 Direct Mode:
 Mov [1001H],AX
 Register indirectMode:
 Mov [AX],CX
 Mov BX,[DX]
 Base plus index Mode:
 Mov AX,[BX+Si]
 Register relative Mode:
 Mov DX,[BX+100H]

4.  XChange Command:
 Xchg AH,AL
 Xchg CX,DX
 LOAD Effective Addressing Command:
 LEA AX,[BX]
 GLEA CX,3[DX]
 Push and Pop Command:
 Push AX
 Pop AX
 Push BX
 Pop CX
Register And Special Features:
80286 processor CPU contains almost the same set of registers same as 8086.
All Register Files:
 General Register
 Index Register
 Pointer Register
 Segment Register
 Status and Control Register
 Flag Register
Special Register:
 Index Register
 Pointer Register
 Segment Register
 Status and Control Register
 Flag Register
Interstage Register:
 Eight 16-bit general purpose Register
 Four 16-bit segment Register
 Status and Control 16-bit Register
 Instruction 16-bit Register
 Flag 16-bit Register
Data Flow Diagram:
Data flow diagram mean block diagram of 80286 are given below:

6. Internal Block Diagram of 80286:
View to contain four functional parts are:
 Address unit
 Bus Unit
 Instruction Unit
 Execution Unit
 The Address Unit is calculating the physical address of instruction.
 That physical address find out by the address unit is hand over to the Bus Unit of the
CPU.
 One major function of the bus unit is to fetch instruction byte from the memory.
 Instruction Unit accepts instructions from the pre fetch queue and instruction decoder
decodes the instruction one by one.
 The output from the circuit decoding devices control circuit in the Execution Unit is
responsible for instructions received from the decoded instruction queue, which sends
the data part of the instruction over the data bus.
Design Analysis:
CPI Calculation:
CPI stand for average number of Cycle Per Instruction.
Reason:
In 80286 processor CPI cannot be calculated because the internal or interclock clock of this
processor is not defined in anywhere.
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7. PROJECT REPORT OF COMPUTER ARCITURE AND ORGANIZATION
Submitted TO:
Prof. G A Khan
Submitted BY:
Abu Bakar Rasheed(G1F16BSCS0084)
Uzair Butt(G1F16BSCS0117)