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© Semiconductor Components Industries, LLC, 2012
September, 2012 − Rev. 1
1 Publication Order Number:
BTA08−600BW3/D
BTA08-600BW3G,
BTA08-800BW3G
Triacs
Silicon Bidirectional Thyristors
Designed for high performance full-wave ac control applications
where high noise immunity and high commutating di/dt are required.
Features
• Blocking Voltage to 800 V
• On-State Current Rating of 8 A RMS at 80°C
• Uniform Gate Trigger Currents in Three Quadrants
• High Immunity to dV/dt − 2000 V/ms minimum at 125°C
• Minimizes Snubber Networks for Protection
• Industry Standard TO-220AB Package
• High Commutating dI/dt − 1.5 A/ms minimum at 125°C
• Internally Isolated (2500 VRMS)
• These Devices are Pb−Free and are RoHS Compliant*
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating Symbol Value Unit
Peak Repetitive Off−State Voltage (Note 1)
(TJ = −40 to 125°C, Sine Wave,
50 to 60 Hz, Gate Open)
BTA08−600BW3G
BTA08−800BW3G
VDRM,
VRRM
600
800
V
On-State RMS Current
(Full Cycle Sine Wave, 60 Hz, TC = 80°C)
IT(RMS) 8.0 A
Peak Non-Repetitive Surge Current
(One Full Cycle Sine Wave, 60 Hz,
TC = 25°C)
ITSM 90 A
Circuit Fusing Consideration (t = 8.3 ms) I2t 36 A2sec
Non−Repetitive Surge Peak Off−State
Voltage (TJ = 25°C, t = 10ms)
VDSM/
VRSM
VDSM/VRSM
+100
V
Peak Gate Current (TJ = 125°C, t = 20ms) IGM 4.0 A
Peak Gate Power
(Pulse Width ≤ 1.0 ms, TC = 80°C)
PGM 20 W
Average Gate Power (TJ = 125°C) PG(AV) 1.0 W
Operating Junction Temperature Range TJ −40 to +125 °C
Storage Temperature Range Tstg −40 to +150 °C
RMS Isolation Voltage
(t = 300 ms, R.H. ≤ 30%, TA = 25°C)
Viso 2500 V
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. VDRM and VRRM for all types can be applied on a continuous basis. Blocking
voltages shall not be tested with a constant current source such that the
voltage ratings of the devices are exceeded.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
TRIACS
8 AMPERES RMS
600 thru 800 VOLTS
TO−220AB
CASE 221A
STYLE 12
1
http://onsemi.com
BTA08−xBWG
AYWW
MARKING
DIAGRAM
x = 6 or 8
A = Assembly Location (Optional)*
Y = Year
WW = Work Week
G = Pb−Free Package
2
3
Device Package Shipping
ORDERING INFORMATION
BTA08−600BW3G TO−220AB
(Pb−Free)
50 Units / Rail
PIN ASSIGNMENT
1
2
3 Gate
Main Terminal 1
Main Terminal 2
4 No Connection
MT1
G
MT2
BTA08−800BW3G TO−220AB
(Pb−Free)
50 Units / Rail
4
* The Assembly Location code (A) is optional. In
cases where the Assembly Location is stamped
on the package the assembly code may be blank.
BTA08−600BW3G, BTA08−800BW3G
http://onsemi.com
2
THERMAL CHARACTERISTICS
Characteristic Symbol Value Unit
Thermal Resistance, Junction−to−Case (AC)
Junction−to−Ambient
RqJC
RqJA
2.5
63
°C/W
Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 seconds TL 260 °C
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted; Electricals apply in both directions)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Peak Repetitive Blocking Current
(VD = Rated VDRM, VRRM; Gate Open) TJ = 25°C
TJ = 125°C
IDRM,
IRRM −
−
−
−
0.005
2.0
mA
ON CHARACTERISTICS
Peak On-State Voltage (Note 2)
(ITM = ±11 A Peak)
VTM − − 1.55 V
Gate Trigger Current (Continuous dc) (VD = 12 V, RL = 30 W)
MT2(+), G(+)
MT2(+), G(−)
MT2(−), G(−)
IGT
2.5
2.5
2.5
−
−
−
50
50
50
mA
Holding Current
(VD = 12 V, Gate Open, Initiating Current = ±100 mA)
IH − − 60 mA
Latching Current (VD = 12 V, IG = 60 mA)
MT2(+), G(+)
MT2(+), G(−)
MT2(−), G(−)
IL
−
−
−
−
−
−
70
90
70
mA
Gate Trigger Voltage (VD = 12 V, RL = 30 W)
MT2(+), G(+)
MT2(+), G(−)
MT2(−), G(−)
VGT
0.5
0.5
0.5
−
−
−
1.7
1.1
1.1
V
Gate Non−Trigger Voltage (TJ = 125°C)
MT2(+), G(+)
MT2(+), G(−)
MT2(−), G(−)
VGD
0.2
0.2
0.2
−
−
−
−
−
−
V
DYNAMIC CHARACTERISTICS
Rate of Change of Commutating Current, See Figure 10.
(Gate Open, TJ = 125°C, No Snubber)
(dI/dt)c 1.5 − − A/ms
Critical Rate of Rise of On−State Current
(TJ = 125°C, f = 120 Hz, IG = 2 x IGT, tr ≤ 100 ns)
dI/dt − − 50 A/ms
Critical Rate of Rise of Off-State Voltage
(VD = 0.66 x VDRM, Exponential Waveform, Gate Open, TJ = 125°C)
dV/dt 2000 − − V/ms
2. Indicates Pulse Test: Pulse Width ≤ 2.0 ms, Duty Cycle ≤ 2%.
BTA08−600BW3G, BTA08−800BW3G
http://onsemi.com
3
+ Current
+ Voltage
VTM
IH
Symbol Parameter
VDRM Peak Repetitive Forward Off State Voltage
IDRM Peak Forward Blocking Current
VRRM Peak Repetitive Reverse Off State Voltage
IRRM Peak Reverse Blocking Current
Voltage Current Characteristic of Triacs
(Bidirectional Device)
IDRM at VDRM
on state
off state
IRRM at VRRM
Quadrant 1
MainTerminal 2 +
Quadrant 3
MainTerminal 2 −
VTM
IH
VTM Maximum On State Voltage
IH Holding Current
MT1
(+) IGT
GATE
(+) MT2
REF
MT1
(−) IGT
GATE
(+) MT2
REF
MT1
(+) IGT
GATE
(−) MT2
REF
MT1
(−) IGT
GATE
(−) MT2
REF
−
MT2 NEGATIVE
(Negative Half Cycle)
MT2 POSITIVE
(Positive Half Cycle)
+
Quadrant III Quadrant IV
Quadrant II Quadrant I
Quadrant Definitions for a Triac
IGT − + IGT
All polarities are referenced to MT1.
With in−phase signals (using standard AC lines) quadrants I and III are used.
BTA08−600BW3G, BTA08−800BW3G
http://onsemi.com
4
Figure 1. RMS Current Derating
IT(RMS), RMS ON-STATE CURRENT (A)
Figure 2. On-State Power Dissipation
IT(RMS), ON-STATE CURRENT (A)
Figure 3. On-State Characteristics
VT, INSTANTANEOUS ON-STATE VOLTAGE (V)
Figure 4. Thermal Response
t, TIME (ms)
1
0.1
0.01
1·10410001001010.1
Figure 5. Holding Current Variation
TJ, JUNCTION TEMPERATURE (°C)
TC,CASETEMPERATURE(°C)
125
120
115
110
105
100
876543210
DC
α = 180°
α = 120, 90, 60, 30°
PAV,AVERAGEPOWER(W)
876543210
12
10
8
6
4
2
0
α = 30°
DC
180°
120°
90°
60°
r(t),TRANSIENTTHERMALRESISTANCE(NORMALIZED)IH,HOLDINGCURRENT(mA)
55
45
35
25
15
5
−40 125−25 −10 5 20 35 50 65 80 95 110
MT2 POSITIVE
MT2 NEGATIVE
0.1
1
10
100
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
IT,INSTANTANEOUSON−STATECURRENT(A)
Typical @ TJ = 25°C
Typical @ TJ = 125°C
Typical @
TJ = −40°C
Typical @ TJ = 125°C
Typical @ TJ = 25°C
Typical @ TJ = −40°C
BTA08−600BW3G, BTA08−800BW3G
http://onsemi.com
5
1
10
100
−40 −25 −10 5 20 35 50 65 80 95 110 125
TJ, JUNCTION TEMPERATURE (°C)
Figure 6. Gate Trigger Current Variation
TJ, JUNCTION TEMPERATURE (°C)
Q2
VD = 12 V
RL = 30 W
Figure 7. Gate Trigger Voltage Variation
Figure 8. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Current (di/dt)c
LL 1N4007
200 V
+
MEASURE
I
-
CHARGE
CONTROLCHARGE
TRIGGER
NON‐POLAR
CL
51 W
MT2
MT1
1N914
G
TRIGGERCONTROL
200 VRMS
ADJUST FOR
ITM, 60 Hz VAC
Note: Component values are for verification of rated (di/dt)c. See AN1048 for additional information.
IGT,GATETRIGGERCURRENT(mA)
Q3
Q1
0.40
0.60
0.80
1.00
1.20
1.40
1.60
1.80
2.00
−40 −25 −10 5 20 35 50 65 80 95 110 125
Q1
Q3
Q2
GATETRIGGERVOLTAGE(V)
VD = 12 V
RL = 30 W
Figure 9. Critical Rate of Rise of Off-State Voltage
(Exponential Waveform)
RG, GATE TO MAIN TERMINAL 1 RESISTANCE (OHMS)
5000
4K
3K
2K
1K
0
10000100010010
dv/dt,CRITICALRATEOFRISEOFOFF‐STATEVOLTAGE(V/s)μ
VD = 800 Vpk
TJ = 125°C
Figure 10. Latching Current Variation
TJ, TEMPERATURE (°C)
0
20
40
60
80
100
120
−40 −25 −10 5 20 35 50 65 80 95 110 125
LATCHINGCURRENT(mA)
Q1
Q3
Q2
VD = 12 V
RL = 30 W
BTA08−600BW3G, BTA08−800BW3G
http://onsemi.com
6
PACKAGE DIMENSIONS
TO−220
CASE 221A−07
ISSUE AA
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A 0.570 0.620 14.48 15.75
B 0.380 0.405 9.66 10.28
C 0.160 0.190 4.07 4.82
D 0.025 0.035 0.64 0.88
F 0.142 0.147 3.61 3.73
G 0.095 0.105 2.42 2.66
H 0.110 0.155 2.80 3.93
J 0.014 0.022 0.36 0.55
K 0.500 0.562 12.70 14.27
L 0.045 0.060 1.15 1.52
N 0.190 0.210 4.83 5.33
Q 0.100 0.120 2.54 3.04
R 0.080 0.110 2.04 2.79
S 0.045 0.055 1.15 1.39
T 0.235 0.255 5.97 6.47
U 0.000 0.050 0.00 1.27
V 0.045 --- 1.15 ---
Z --- 0.080 --- 2.04
A
K
L
V
G
D
N
Z
H
Q
FB
1 2 3
4
−T− SEATING
PLANE
S
R
J
U
T
C
STYLE 12:
PIN 1. MAIN TERMINAL 1
2. MAIN TERMINAL 2
3. GATE
4. NOT CONNECTED
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where
personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and
its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly,
any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture
of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
BTA08−600BW3/D
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative

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Triacs Designed for High Performance AC Control up to 800 Volts

  • 1. © Semiconductor Components Industries, LLC, 2012 September, 2012 − Rev. 1 1 Publication Order Number: BTA08−600BW3/D BTA08-600BW3G, BTA08-800BW3G Triacs Silicon Bidirectional Thyristors Designed for high performance full-wave ac control applications where high noise immunity and high commutating di/dt are required. Features • Blocking Voltage to 800 V • On-State Current Rating of 8 A RMS at 80°C • Uniform Gate Trigger Currents in Three Quadrants • High Immunity to dV/dt − 2000 V/ms minimum at 125°C • Minimizes Snubber Networks for Protection • Industry Standard TO-220AB Package • High Commutating dI/dt − 1.5 A/ms minimum at 125°C • Internally Isolated (2500 VRMS) • These Devices are Pb−Free and are RoHS Compliant* MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Peak Repetitive Off−State Voltage (Note 1) (TJ = −40 to 125°C, Sine Wave, 50 to 60 Hz, Gate Open) BTA08−600BW3G BTA08−800BW3G VDRM, VRRM 600 800 V On-State RMS Current (Full Cycle Sine Wave, 60 Hz, TC = 80°C) IT(RMS) 8.0 A Peak Non-Repetitive Surge Current (One Full Cycle Sine Wave, 60 Hz, TC = 25°C) ITSM 90 A Circuit Fusing Consideration (t = 8.3 ms) I2t 36 A2sec Non−Repetitive Surge Peak Off−State Voltage (TJ = 25°C, t = 10ms) VDSM/ VRSM VDSM/VRSM +100 V Peak Gate Current (TJ = 125°C, t = 20ms) IGM 4.0 A Peak Gate Power (Pulse Width ≤ 1.0 ms, TC = 80°C) PGM 20 W Average Gate Power (TJ = 125°C) PG(AV) 1.0 W Operating Junction Temperature Range TJ −40 to +125 °C Storage Temperature Range Tstg −40 to +150 °C RMS Isolation Voltage (t = 300 ms, R.H. ≤ 30%, TA = 25°C) Viso 2500 V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. VDRM and VRRM for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. TRIACS 8 AMPERES RMS 600 thru 800 VOLTS TO−220AB CASE 221A STYLE 12 1 http://onsemi.com BTA08−xBWG AYWW MARKING DIAGRAM x = 6 or 8 A = Assembly Location (Optional)* Y = Year WW = Work Week G = Pb−Free Package 2 3 Device Package Shipping ORDERING INFORMATION BTA08−600BW3G TO−220AB (Pb−Free) 50 Units / Rail PIN ASSIGNMENT 1 2 3 Gate Main Terminal 1 Main Terminal 2 4 No Connection MT1 G MT2 BTA08−800BW3G TO−220AB (Pb−Free) 50 Units / Rail 4 * The Assembly Location code (A) is optional. In cases where the Assembly Location is stamped on the package the assembly code may be blank.
  • 2. BTA08−600BW3G, BTA08−800BW3G http://onsemi.com 2 THERMAL CHARACTERISTICS Characteristic Symbol Value Unit Thermal Resistance, Junction−to−Case (AC) Junction−to−Ambient RqJC RqJA 2.5 63 °C/W Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 seconds TL 260 °C ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted; Electricals apply in both directions) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Peak Repetitive Blocking Current (VD = Rated VDRM, VRRM; Gate Open) TJ = 25°C TJ = 125°C IDRM, IRRM − − − − 0.005 2.0 mA ON CHARACTERISTICS Peak On-State Voltage (Note 2) (ITM = ±11 A Peak) VTM − − 1.55 V Gate Trigger Current (Continuous dc) (VD = 12 V, RL = 30 W) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) IGT 2.5 2.5 2.5 − − − 50 50 50 mA Holding Current (VD = 12 V, Gate Open, Initiating Current = ±100 mA) IH − − 60 mA Latching Current (VD = 12 V, IG = 60 mA) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) IL − − − − − − 70 90 70 mA Gate Trigger Voltage (VD = 12 V, RL = 30 W) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) VGT 0.5 0.5 0.5 − − − 1.7 1.1 1.1 V Gate Non−Trigger Voltage (TJ = 125°C) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) VGD 0.2 0.2 0.2 − − − − − − V DYNAMIC CHARACTERISTICS Rate of Change of Commutating Current, See Figure 10. (Gate Open, TJ = 125°C, No Snubber) (dI/dt)c 1.5 − − A/ms Critical Rate of Rise of On−State Current (TJ = 125°C, f = 120 Hz, IG = 2 x IGT, tr ≤ 100 ns) dI/dt − − 50 A/ms Critical Rate of Rise of Off-State Voltage (VD = 0.66 x VDRM, Exponential Waveform, Gate Open, TJ = 125°C) dV/dt 2000 − − V/ms 2. Indicates Pulse Test: Pulse Width ≤ 2.0 ms, Duty Cycle ≤ 2%.
  • 3. BTA08−600BW3G, BTA08−800BW3G http://onsemi.com 3 + Current + Voltage VTM IH Symbol Parameter VDRM Peak Repetitive Forward Off State Voltage IDRM Peak Forward Blocking Current VRRM Peak Repetitive Reverse Off State Voltage IRRM Peak Reverse Blocking Current Voltage Current Characteristic of Triacs (Bidirectional Device) IDRM at VDRM on state off state IRRM at VRRM Quadrant 1 MainTerminal 2 + Quadrant 3 MainTerminal 2 − VTM IH VTM Maximum On State Voltage IH Holding Current MT1 (+) IGT GATE (+) MT2 REF MT1 (−) IGT GATE (+) MT2 REF MT1 (+) IGT GATE (−) MT2 REF MT1 (−) IGT GATE (−) MT2 REF − MT2 NEGATIVE (Negative Half Cycle) MT2 POSITIVE (Positive Half Cycle) + Quadrant III Quadrant IV Quadrant II Quadrant I Quadrant Definitions for a Triac IGT − + IGT All polarities are referenced to MT1. With in−phase signals (using standard AC lines) quadrants I and III are used.
  • 4. BTA08−600BW3G, BTA08−800BW3G http://onsemi.com 4 Figure 1. RMS Current Derating IT(RMS), RMS ON-STATE CURRENT (A) Figure 2. On-State Power Dissipation IT(RMS), ON-STATE CURRENT (A) Figure 3. On-State Characteristics VT, INSTANTANEOUS ON-STATE VOLTAGE (V) Figure 4. Thermal Response t, TIME (ms) 1 0.1 0.01 1·10410001001010.1 Figure 5. Holding Current Variation TJ, JUNCTION TEMPERATURE (°C) TC,CASETEMPERATURE(°C) 125 120 115 110 105 100 876543210 DC α = 180° α = 120, 90, 60, 30° PAV,AVERAGEPOWER(W) 876543210 12 10 8 6 4 2 0 α = 30° DC 180° 120° 90° 60° r(t),TRANSIENTTHERMALRESISTANCE(NORMALIZED)IH,HOLDINGCURRENT(mA) 55 45 35 25 15 5 −40 125−25 −10 5 20 35 50 65 80 95 110 MT2 POSITIVE MT2 NEGATIVE 0.1 1 10 100 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 IT,INSTANTANEOUSON−STATECURRENT(A) Typical @ TJ = 25°C Typical @ TJ = 125°C Typical @ TJ = −40°C Typical @ TJ = 125°C Typical @ TJ = 25°C Typical @ TJ = −40°C
  • 5. BTA08−600BW3G, BTA08−800BW3G http://onsemi.com 5 1 10 100 −40 −25 −10 5 20 35 50 65 80 95 110 125 TJ, JUNCTION TEMPERATURE (°C) Figure 6. Gate Trigger Current Variation TJ, JUNCTION TEMPERATURE (°C) Q2 VD = 12 V RL = 30 W Figure 7. Gate Trigger Voltage Variation Figure 8. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Current (di/dt)c LL 1N4007 200 V + MEASURE I - CHARGE CONTROLCHARGE TRIGGER NON‐POLAR CL 51 W MT2 MT1 1N914 G TRIGGERCONTROL 200 VRMS ADJUST FOR ITM, 60 Hz VAC Note: Component values are for verification of rated (di/dt)c. See AN1048 for additional information. IGT,GATETRIGGERCURRENT(mA) Q3 Q1 0.40 0.60 0.80 1.00 1.20 1.40 1.60 1.80 2.00 −40 −25 −10 5 20 35 50 65 80 95 110 125 Q1 Q3 Q2 GATETRIGGERVOLTAGE(V) VD = 12 V RL = 30 W Figure 9. Critical Rate of Rise of Off-State Voltage (Exponential Waveform) RG, GATE TO MAIN TERMINAL 1 RESISTANCE (OHMS) 5000 4K 3K 2K 1K 0 10000100010010 dv/dt,CRITICALRATEOFRISEOFOFF‐STATEVOLTAGE(V/s)μ VD = 800 Vpk TJ = 125°C Figure 10. Latching Current Variation TJ, TEMPERATURE (°C) 0 20 40 60 80 100 120 −40 −25 −10 5 20 35 50 65 80 95 110 125 LATCHINGCURRENT(mA) Q1 Q3 Q2 VD = 12 V RL = 30 W
  • 6. BTA08−600BW3G, BTA08−800BW3G http://onsemi.com 6 PACKAGE DIMENSIONS TO−220 CASE 221A−07 ISSUE AA NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.570 0.620 14.48 15.75 B 0.380 0.405 9.66 10.28 C 0.160 0.190 4.07 4.82 D 0.025 0.035 0.64 0.88 F 0.142 0.147 3.61 3.73 G 0.095 0.105 2.42 2.66 H 0.110 0.155 2.80 3.93 J 0.014 0.022 0.36 0.55 K 0.500 0.562 12.70 14.27 L 0.045 0.060 1.15 1.52 N 0.190 0.210 4.83 5.33 Q 0.100 0.120 2.54 3.04 R 0.080 0.110 2.04 2.79 S 0.045 0.055 1.15 1.39 T 0.235 0.255 5.97 6.47 U 0.000 0.050 0.00 1.27 V 0.045 --- 1.15 --- Z --- 0.080 --- 2.04 A K L V G D N Z H Q FB 1 2 3 4 −T− SEATING PLANE S R J U T C STYLE 12: PIN 1. MAIN TERMINAL 1 2. MAIN TERMINAL 2 3. GATE 4. NOT CONNECTED ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 BTA08−600BW3/D LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative