Final Presentation

2. Abstract
0 The aggressive semiconductor technology scaling has been pushing the
device feature size into the deep sub-micron region.
0 As a result, the chip power density has been doubled every two to three
years.
0 This increased power has directly translated into high temperature,
which negatively affects a system's cost, performance and reliability.
0 In this review, various methodologies for thermal and energy problem
mitigation are presented and compared

3. Power Consumption Issues
0 Stress on batteries in portable devices such as laptops and phones
0 Can be minimized through voltage and frequency scaling
0 High temperature greatly shortens the lifespan of a processor
0 100C increase in temperature reduces component life by 50% [1]
0 Obvious approach is to use bigger heat sinks and air- cooling techniques (for desktop
and laptop computers)
0 Expensive and inefficient
0 Power- aware techniques are not efficient in handling these issues
0 Logic blocks within the chip have different power densities (e.g. due to
different levels of switching activity)
0 The thermal map of a chip often shows wide variations in temperature
0 Many low-power techniques have insufficient impact because they do not
directly target the spatial and temporal behavior of the operating
temperature.

4. Thermal- aware Computing [2]
0 Components of power consumption
0 Dynamic
0 consumed when devices switch from one logic level to another.
0 related to the level of computational (switching) activity
0 Leakage
0 power that flows from source to ground whenever a device is powered up
0 grows exponentially with temperature
0 Thermal modeling
0 Hotspot Heatflow model [3]

5. Thermal- aware Computing
0 Thermal- aware chip design (Static)
0 focus on the floorplanning phase of the physical design process [4,5,6,7]
0 Floorplanning algorithms can be modified to also include reducing the maximum
temperature of a block in the chip.
0 Migration Computing [8]
0 Increasing silicon area allocated to hotblocks [9]
0 Runtime Thermal Management (Dynamic)
0 The operating system controls the scheduling of tasks and also assign tasks to
individual cores
0
0
0
0
Heat Balancing
Heat Unbalancing
Reducing Execution Rate of Hot Tasks
Adding a Predictive Component

6. Thermal- aware Computing
Runtime Techniques
Methodology
Voltage Scaling
Change voltage levels to adjust power and
energy
consumption. Clock rates are reduced to match
the
increased circuit delay that results
Heat Balancing
Spreads the thermal load among multiple
cores to
approximately even out their temperatures.
Heat Unbalancing
Reduce thermal cycling effects: accept
significant
temperature differentials between the cores as
long as
specified temperature levels are not breached.
Throttling
Reduce the rate at which heat is generated by
reducing instruction fetch rate and similar
parameters.

7. Thermal- aware Scheduling
0 Thermal aware task allocation in SoCs
0 Dynamic Thermal Management through Task-Scheduling [18]
0 Thermal-Aware Task Allocation and Scheduling for Embedded Systems [19]
0 Static and Dynamic Temperature-Aware Scheduling for Multiprocessor SoCs
[20]

8. Thermal-Aware Task Allocation and Scheduling
for Embedded Systems (Hung et. al)
0 Proposed an algorithm that is used as a subroutine for
hardware/software co-synthesis
0 To exploit resource sharing
0 Traditional algorithms do not take the temperature and power variables
into consideration
0 Power awareness
0 Dynamic Criticality (DC)
0 Analogous to priority
0

9. Thermal-Aware Task Allocation and Scheduling
for Embedded Systems (Hung et. al)
0
The flows of the thermal-aware co-synthesis framework
and thermal-aware platform-based system design
0
The temperature comparisons of the power-aware and the
thermal-aware approaches on co-synthesis architecture.

10. Static and Dynamic Temperature-Aware Scheduling for
Multiprocessor SoCs (Coskun et. Al)
0 This looks at Multiprocessor SoCs
0 ILPs to generate static solutions
0 target thermal hotspots and gradients
0 better thermal profile than other static methods
0 Dynamic Scheduling (OS- level scheduling)
0 Adaptive –random technique

11. Static and Dynamic Temperature-Aware Scheduling for
Multiprocessor SoCs (Coskun et. Al)

12. Dynamic Thermal Management
through Task-Scheduling (Yang et. al)
0 ThreshHot Algorithm
0 reduces the number of hardware DTMs (Dynamic
thermal management) required.
0 Increase in CPU throughput

13. Dynamic Thermal Management
through Task-Scheduling (Yang et. al)

14. Comparative Table
Authors
Methodology
Static Thermal
Management
Dynamic
thermal
Management
Static Energy
Management
Dynamic
Energy
Management
Issues
Hung et. al
Implemented
algorithm with
temperature
and power
vaiables
No
Yes
No
Yes
Floorplanning is
not effective to
control the
lateral heat
transfer.
Overhead due to
dynamic nature
Coskun et. al
Implemented
adaptive –
random
scheduling
algorithm
Yes
Yes
No
Yes
Overhead
associated with
dynamic
awareness is
high
Yang et. al
Implemented
ThresHot
scheduling
algorithm
No
Yes
No
Yes
Overhead
associated with
dynamic
awareness is
high

15. Energy- aware Computing
0 Energy consumption is a critical measure for battery powered and
tethered devices.
0 Energy can be reduced by
0 Static
0 Dynamic
0 DVFS
0 Examples
0
0
0
0
0
idle functional units can be powered down [10]
clock gating [11]
low-power design [12]
low-power synthesis [13]
lower the operating voltage level during the design/synthesis phase [14]

16. Energy- aware Computing
0 Energy- aware task scheduling
0 EDF [16]
0 RM [17]
0 LEDF
0 Energy- aware task scheduling in SoCs
0 Energy-Aware Task Allocation for Rate Monotonic Scheduling [21]
0 Real-time task scheduling for energy-aware embedded systems [22]
0 Energy-Aware Runtime Scheduling for Embedded Multiprocessor SOCs [23]

17. Energy-Aware Task Allocation for Rate
Monotonic Scheduling (AlEnawy et. al)
0 adopt partitioned scheduling and assume that tasks are assigned static
(rate-monotonic) priorities.
0 study and evaluate a number of well-known partitioning heuristics,
RMS admission control algorithms, and speed assignment schemes in
terms of the feasibility performance and overall energy consumption.
0 Off-line and on-line partitioning

18. Energy-Aware Task Allocation for Rate
Monotonic Scheduling (AlEnawy et. al)

19. Real-time task scheduling for energy-aware
embedded systems (Swaminathan et. al)
0 Two on-line scheduling algorithms that attempt to
minimize the energy consumed by a periodic task set
0 Both using EDF
0 LEDF
0 E- LEDF

20. Real-time task scheduling for energy-aware
embedded systems (Swaminathan et. al)

21. Energy-Aware Runtime Scheduling for Embedded
Multiprocessor SOCs (Yang et. al)
0 Preorder the concurrent behavior as much as possible
0 This task-scheduling method for embedded systems
combines the low runtime complexity of a designtime scheduling phase with the flexibility of a runtime
scheduling phase.
0 increases design flexibility and reduces design time
for multiprocessor SOCs

22. Energy-Aware Runtime Scheduling for Embedded
Multiprocessor SOCs (Yang et. al)

23. Comparative Table
Authors
Methodology
Static Energy
Management
Dynamic Energy
Management
Issues
AlEnawy et. al
Partitioned task
scheduling with
static priorities
Yes
Yes
Does not have good
performance for online partitioning and
overhead due to
dynamic computations
Swaminathan et. al
Implemented on-line
scheduling
algorithms based on
EDF
No
Yes
Difficulty with
Aperiodic and
sporadic tasks
and overhead due to
dynamic
computations
Yang et. al
Algorithm combines
the low runtime
complexity of a
design-time
scheduling phase
with the flexibility of
a runtime scheduling
phase.
No
Yes
Ineffective for very
heavy loads and
difficult to implement
for practical
applications