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Logic Families
INTRODUCTION 
ICs are integrated using following integration 
techniques 
•SSI < 12 gates/chip 
•MSI < 100 gates/chip 
•LSI …1K gates/chip 
•VLSI …10K gates/chip 
•ULSI …100K gates/chip
Logic Family 
It is a group of compatible ICs with the same 
logic levels and the supply voltages for 
performing various logic functions 
They are the building block of logic circuits.
Types of logic families
BIPOLAR ICs 
The main element of a bipolar ICs are 
Resistors, Diodes, Capacitors and Transistors. 
They can be operated in two ways: 
Saturated 
Non-Saturated 
Saturated Logic: The transistors in the IC are 
driven to saturation 
Non-Saturated Logic: The transistors in the IC 
are not driven to saturation.
BIPOLAR ICs 
Saturated Bipolar families are: 
Resistor-Transistor logic (RTL), 
Direct-Coupled transistor logic (DCTL), 
Integrated-injection logic (IIL), 
Diode-transistor logic (DTL), 
High-Threshold logic (HTL) and 
Transistor-transistor logic (TTL) 
Non-Saturated Bipolar families are: 
Schottkey TTL 
Emitter-Coupled logic (ECL)
UNIPOLAR LOGIC FAMILIES 
MOS devices are unipolar devices and only 
MOSFETs are employed in MOS logic circuits. 
These families are: 
PMOS (p-channel MOSFETs) 
NMOS (n-channel MOSFETs) 
CMOS (Both p- and n- channel MOSFETs are 
fabricated on same silicon chip)
Basic Characteristics of ICs 
Propagation delay 
Power dissipation 
Fan in and fan out 
Noise immunity 
Power supply requirement 
Figure of merits i.e. speed power product 
Operating temperature 
Current and voltage parameters
Power supply requirement 
 CMOS and TTL are available in different supply 
voltage categories 
 In each IC, Vcc pin is connected to positive supply 
and GND pin is connected to ground of supply.
Current and voltage parameters 
Four different kind of Logic level specifications 
are defined: VIL, VIH, VOL, VOH 
VIL, VIH : These are the input logic levels (Low & 
High) 
VOL, VOH : These are the output logic levels (Low & 
High)
Noise Immunity 
Noise is unwanted voltage that is induced in 
electrical circuits and can cause threat to 
proper operation of circuit. 
Noise immunity is the ability to tolerate a 
certain amount of unwanted voltage 
fluctuations on its inputs without changing 
outputs
Noise Margin 
A quantitative measure of noise immunity is 
called Noise margin. It is expressed in volts. 
Two Noise margins are specified for logic circuits, 
High level Noise margin (VNH) and Low level Noise 
margin (VNL), expressed as:
Power Dissipation 
This is the amount of power dissipated in an 
IC. 
It is Determined by the current Icc, that it 
draws from the Vcc supply, and is given by , 
Pd = Vcc X Icc.
Propagation Delay
Fan in and Fan out 
Fan-in: 
Number of inputs a gate has. For example, a two 
input gate will have fan-in equal to 2 
Fan-out: 
Maximum number of inputs of the same IC 
family that a gate can drive without falling 
outside the specified output voltage limits.
Figure of merits/speed power product 
This is obtained by multiplying gate 
propagation delay by gate power 
dissipation
Operating temperature 
For consumer application , the temperature is 
0 to +70°C 
For industrial application , the temperature is 
-55°C to +125 °C
Transistor as a switch 
Transistor in cut off
Transistor as a switch 
Transistor in saturation
TTL(Transistor Transistor logic)
Diode equivalent of TTL with 
single emitter transistor
Diode equivalent of a TTL multiple 
emitter Transistor
TTL Inverter
Basic integrated circuit TTL NAND 
gate 
Basic TTL 
NNAANNDD gate.
CMOS-Complementary metal oxide 
semiconductor 
most widely used family for large-scale devices 
combines high speed with low power consumption 
usually operates from a single supply of 5 – 15 V 
excellent noise immunity of about 30% of supply 
voltage
CMOS inverter 
A Q1 Q2 O/P 
0V 
(Logic 0) 
OFF ON VDD 
(Logic 1) 
VDD 
(Logic 1) 
ON OFF 0V 
(Logic 0)
CMOS NAND gate 
Input Transistor O/ 
P 
A B Q1 Q2 Q3 Q4 Y 
0 0 ON ON OFF OFF 1 
0 1 ON OFF OFF ON 1 
1 0 OFF ON ON OFF 1 
1 1 OFF OFF ON ON 0
CMOS AND gate
CMOS NOR gate
CMOS OR gate

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Logic Gates

  • 2. INTRODUCTION ICs are integrated using following integration techniques •SSI < 12 gates/chip •MSI < 100 gates/chip •LSI …1K gates/chip •VLSI …10K gates/chip •ULSI …100K gates/chip
  • 3. Logic Family It is a group of compatible ICs with the same logic levels and the supply voltages for performing various logic functions They are the building block of logic circuits.
  • 4. Types of logic families
  • 5. BIPOLAR ICs The main element of a bipolar ICs are Resistors, Diodes, Capacitors and Transistors. They can be operated in two ways: Saturated Non-Saturated Saturated Logic: The transistors in the IC are driven to saturation Non-Saturated Logic: The transistors in the IC are not driven to saturation.
  • 6. BIPOLAR ICs Saturated Bipolar families are: Resistor-Transistor logic (RTL), Direct-Coupled transistor logic (DCTL), Integrated-injection logic (IIL), Diode-transistor logic (DTL), High-Threshold logic (HTL) and Transistor-transistor logic (TTL) Non-Saturated Bipolar families are: Schottkey TTL Emitter-Coupled logic (ECL)
  • 7. UNIPOLAR LOGIC FAMILIES MOS devices are unipolar devices and only MOSFETs are employed in MOS logic circuits. These families are: PMOS (p-channel MOSFETs) NMOS (n-channel MOSFETs) CMOS (Both p- and n- channel MOSFETs are fabricated on same silicon chip)
  • 8. Basic Characteristics of ICs Propagation delay Power dissipation Fan in and fan out Noise immunity Power supply requirement Figure of merits i.e. speed power product Operating temperature Current and voltage parameters
  • 9. Power supply requirement  CMOS and TTL are available in different supply voltage categories  In each IC, Vcc pin is connected to positive supply and GND pin is connected to ground of supply.
  • 10. Current and voltage parameters Four different kind of Logic level specifications are defined: VIL, VIH, VOL, VOH VIL, VIH : These are the input logic levels (Low & High) VOL, VOH : These are the output logic levels (Low & High)
  • 11. Noise Immunity Noise is unwanted voltage that is induced in electrical circuits and can cause threat to proper operation of circuit. Noise immunity is the ability to tolerate a certain amount of unwanted voltage fluctuations on its inputs without changing outputs
  • 12. Noise Margin A quantitative measure of noise immunity is called Noise margin. It is expressed in volts. Two Noise margins are specified for logic circuits, High level Noise margin (VNH) and Low level Noise margin (VNL), expressed as:
  • 13. Power Dissipation This is the amount of power dissipated in an IC. It is Determined by the current Icc, that it draws from the Vcc supply, and is given by , Pd = Vcc X Icc.
  • 15. Fan in and Fan out Fan-in: Number of inputs a gate has. For example, a two input gate will have fan-in equal to 2 Fan-out: Maximum number of inputs of the same IC family that a gate can drive without falling outside the specified output voltage limits.
  • 16. Figure of merits/speed power product This is obtained by multiplying gate propagation delay by gate power dissipation
  • 17. Operating temperature For consumer application , the temperature is 0 to +70°C For industrial application , the temperature is -55°C to +125 °C
  • 18. Transistor as a switch Transistor in cut off
  • 19. Transistor as a switch Transistor in saturation
  • 21. Diode equivalent of TTL with single emitter transistor
  • 22. Diode equivalent of a TTL multiple emitter Transistor
  • 24.
  • 25.
  • 26. Basic integrated circuit TTL NAND gate Basic TTL NNAANNDD gate.
  • 27. CMOS-Complementary metal oxide semiconductor most widely used family for large-scale devices combines high speed with low power consumption usually operates from a single supply of 5 – 15 V excellent noise immunity of about 30% of supply voltage
  • 28. CMOS inverter A Q1 Q2 O/P 0V (Logic 0) OFF ON VDD (Logic 1) VDD (Logic 1) ON OFF 0V (Logic 0)
  • 29. CMOS NAND gate Input Transistor O/ P A B Q1 Q2 Q3 Q4 Y 0 0 ON ON OFF OFF 1 0 1 ON OFF OFF ON 1 1 0 OFF ON ON OFF 1 1 1 OFF OFF ON ON 0
  • 30.