More Related Content Similar to Comparative analysis of sine triangle and space vector pwm for cascaded multilevel (20) More from IAEME Publication (20) Comparative analysis of sine triangle and space vector pwm for cascaded multilevel1. INTERNATIONAL JOURNAL OFIssue 2, March – April (2013), ©ISSN 0976 –
International Journal of Electrical Engineering and Technology (IJEET),
6545(Print), ISSN 0976 – 6553(Online) Volume 4,
ELECTRICAL ENGINEERING IAEME
& TECHNOLOGY (IJEET)
ISSN 0976 – 6545(Print)
ISSN 0976 – 6553(Online)
Volume 4, Issue 2, March – April (2013), pp. 155-164
IJEET
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COMPARATIVE ANALYSIS OF SINE TRIANGLE AND SPACE
VECTOR PWM FOR CASCADED MULTILEVEL INVERTERS
B.kiran kumar1, Y.V.Sivareddy2, M.Vijayakumar3
1
(EEE Department, Research Scholar, JNTU Anantapur, India)
2
(EEE Department, Principal, KKR Institute of Technology,India)
3
(EEE department, Professor, JNTU Anantapur, India)
ABSTRACT
Cascaded Multilevel Inverter with Space Vector PWM strategy gained importance in
high power industrial drive applications, due to its reduced complexity. This paper proposes a
more switching times Space Vector PWM method for different level cascaded inverters. In
this, five level and seven level cascaded inverters are modelled with simplified Space Vector
PWM and compared the simulation results with Sine Triangle PWM.
Keywords: Cascaded multilevel inverter, Sine triangle PWM, switching times SVPWM.
I. INTRODUCTION
An Inverter gives the output voltage either +Vdc or –Vdc commonly, this type of
inverters are called as two level inverter [5]. This type of inverters is not able to use for
higher voltage and power requirements due to higher ripple content and switching losses[2].
To minimise this, the concept “Multilevel” has evolved, which can be able to generate better
output quality while operating at lower switching frequencies.
Among various multilevel topologies, the simplest and most flexible topology is cascaded
multilevel inverter, where an isolated dc sources are usually available, thus making the
structure so flexible for addition of several number of voltage level [1] .The cascade
multilevel inverter is simply a number of conventional two level bridges in series. Thus for
seven level inverter topology also requires only three full bridges [4].the disadvantage which
is limiting this cascaded inverters is, it requires separate isolated dc sources. The general
structure of cascaded multilevel inverter for a single phase system is shown in Fig 1. Each
Separate voltage source Vdc1, Vdc2, Vdc3 is connected in cascade with other sources via a
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2. International Journal of Electrical Engineering and Technology (IJEET), ISSN 0976 –
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special H-bridge circuit associated with it [3]. Each H-bridge circuit consists of four active
switching elements that can make the output voltage either positive or negative polarity; or it
can also be simply zero volts which depends on the switching condition of switches in the
circuit[3]. The imaginary times svpwm provides reduced complexity compared to
conventional svpwm[6]and gives better THD when employed to cascaded inverters
The S number of DC sources or stages and the associated number output level can be
calculated by using the equation as follows [3]
ܰ ൌ 2ܵ 1
S1 S2
Vdc1
S3 S4
Vdc2 S1 S2 Vo
S3 S4
S1 S2
Vdc3
S3 S4
Fig.1 Topology of cascaded seven level inverter
2. SPACE VECTOR PWM
For the ac machine drive application, full utilization of the dc bus voltage is extremely
important in order to achieve the maximum output torque under all operating conditions .In
this aspect, compared with any other PWM method for the voltage source inverter, the PWM
based on voltage space vectors results in excellent dc bus utilization [6] .Moreover, as
compared with sine triangle PWM method, the ripple content can be minimised [4].
In the conventional space Vector PWM required output voltage is generated by
sequential switching of active vectors and zero vectors according to the reference vector
location. So, in view of practical implementation, it requires calculation of sector in which
reference vector is located and gating time [6] .Therefore, it becomes complex and needs
longer calculation to implement conventional space vector PWM.
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6545(Print), ISSN 0976 – 6553(Online) Volume 4, Issue 2, March – April (2013), © IAEME
2.1. Space vector PWM based on Switching times
Usually, effective times can be deduced as following
ଶ ௦ గ
ܶ1 ൌ ଷ ௗ ܶ ݏsin ሺ ଷ െ ߙሻ (1)
ଶ ௦
ܶ2 ൌ ଷ ௗ
ܶ ݏsin ߙ (2)
ଷ
ܸߙ ൌ ଶ ܸܽ (3)
ଷ
ܸߚ ൌ ଶ ሺܸܾ െ ܸܿሻ (4)
Sector-1:
ଶ ்௦ గ గ
ܶ1 ൌ ቀܸ ݏcosߙ ݊݅ݏെ ܸ ݏܿ ߙ݊݅ݏ ݏቁ
ଷ ௗ ଷ ଷ
(5)
ଶ ்௦ ଷ గ ଷ గ
ൌ ሺ ܸܽ ݊݅ݏଷ െ ଶ ሺܸܾ െ ܸܿሻ ܿ ݏଷ ሻ (6)
ଷ ௗ ଶ
்௦ ଷ ଵ ଵ
ൌ ௗ ሺଶ ܸܽ െ ଶ ܸܾ ଶ ܸܿሻ (7)
= ܶ ܵܣെ ܶܵܤ (8)
ଶ ௦
ܶ2 ൌ ଷ ௗ ܶ ݏsin ߙ (9)
ଶ ௦
= ܸߚ (10)
ଷ ௗ
ଶ ௦ ଷ
= ሺܸܾ െ ܸܿሻ (11)
ଷ ௗ ଶ
௦
= ௗ ሺܸܾ െ ܸܿሻ (12)
= ܶ ܵܤെ ܶܵܥ (13)
Similarly we can calculate effective times in terms of phase voltages for six sectors also and
finally summarised as ,where T1 and T2 shows the effective times in the different sectors.
The effective time means the time duration in which the effective voltage is supplied to the
machine terminal. The time intervals of these switching times are meaningful only because
some of these imaginary times have negative time value according to the each reference
phase voltage [9].
Table (1) effective times for different sectors
Sector T1 T2
1 TAS-TBS TBS-TCS
2 TAS-TCS TBS-TAS
3 TBS-TCS TCS-TAS
4 TBS-TAS TCS-TBS
5 TCS-TAS TAS-TBS
6 TCS-TBS TAS-TCS
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2.2.Switching times SVPWM Algorithm
Step1: Calculate Vα, Vβ by using
3 3
ܸߙ ൌ ܸܽ ܸߚ ൌ ሺܸܾ െ ܸܿሻ
2 2
Step2: TAS = Ts( ), TBS = Ts( ) and
ௗ ௗ
TCS = Ts(ௗ)
Step3: Tmax = TAS if (TBS>Tmax); {Tmax=TBS}
Tmin=TAS if (TBS<Tmin);{Tmin=TBS}
if (TBS>Tmax); {Tmax=TCS}
if (TBS<Tmin); {Tmin=TCS}
step4 : Teffective = Tmax-Tmin
To= Tsample-Teffective
Toffset= (To/2-Tmin)
Step5: in a sampling period gating signals are calculated as
Tga = TAS+Toffset;
Tgb = TBS+Toffset;
Tgc = TCS+Toffset;
Advantages of Switching times SVPWM Algorithm
i) No look up table is needed
ii) No sector identification required
iii) Angle α information not needed
iv) Voltage vector amplitude is not needed
Aphase TAS A phase Tga
B-phase TBS B Phase Tgb
C-Phase TCS C phase Tgc
(a) (b)
Fig.2 switching pulse pattern of proposed PWM method
Switching times switching pulse pattern
(a)Actual switching pulse pattern
(b)Actual switching pulse pattern
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The basic SVM method is the modulation method with symmetrical spacing zero vectors (SVPWM).
In imaginary switching time’s method, in order to get symmetrical spacing an offset value is added[6].
√3 SPWM SVPWM
radius = Vdc
3
Fig.3 Locus of operating regions for different modulating techniques
The modulation index M varies from 0 to 1 at the square-wave output. The radius of the circle
inscribed of the hexagon in Fig. 3. At this condition the modulation index is equal:
√3
3
2
This means that 90.7% of the fundamental at the square wave can be obtained. It extends the linear
range of modulation in relation to 78.55% in the sinusoidal modulation techniques (Fig. 3)
3.MATLAB/SIMULINK MODELS
C
g
C
g
IGBT /Diode 6
IGBT /Diode 7
m
E
m
E
Out 1
2V
Out 2
C
g
C
g
Out 3
IGBT /Diode 5 IGBT /Diode 4
Out 4
m
E
m
E
Out 5 10 ohms
Out 6
Subsystem
+
-
Voltage Measurement
v
C
g
C
g
IGBT /Diode
IGBT /Diode 1
m
E
Scope 1
m
E
2 v1
C
g
C
g
IGBT /Diode 3
IGBT /Diode 2
m
E
m
E
Fig.4 Simulink for five level cascaded inverter
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g
g
C
C
IGBT /Diode IGBT /Diode 1
m
m
E
E
+ v
DC Voltage Source -
Voltage Measurement Scope
g
C
g
C
IGBT /Diode 3
IGBT /Diode 4
Pulse
Generator
m
E
m
E
Out1
Out2 Series RLC Load
Out3
Out4
Out5
Out6
g
g
C
C
Subsystem Pulse
Generator 2
IGBT /Diode 2 IGBT /Diode 5
m
m
E
E
DC Voltage Source 1
g
g
C
C
IGBT /Diode 8 IGBT /Diode 7
m
m
E
E
g
C
g
C
IGBT /Diode 6
IGBT /Diode 9
m
E
m
E
DC Voltage Source 2
g
C
IGBT /Diode 11
g
C
m
E
IGBT /Diode 10 m
E
Fig.5.simulink for seven level cascaded inverter
u(2)
Va
0.866 u(1)*u(3)
f(u)
Ma 1-D T (u) f(u) Vappha
u1 Vb
sin
Lookup
u(1)*u(2) f(u)
Table (n-D) f(u) Gain
vc
Vbeta 4/3
cos
max
Ramp
MinMax 1
min
Gain 1
MinMax 2
0.5
Scope 2
Fig.6 Simulink for Switching times space vector PWM
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4. SIMULATION RESULTS
a) Output for three level cascaded inverter
b) Output for five level cascaded inverter
FFT Analysis of cascaded Inverters
e) Three level inverter with spwm,ma=0.8
f) Three level inverter with svpwm,ma=0.8
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c) Output for cascaded sevel level inverter
d) Output for proposed SVPWM level inverter
g) Five level inverter with SPWM for ma=0.8
h) Five level inverter with SVPWM for ma=0.8
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4.1 Comparative THD Analysis
Modulating Three Five Seven
technique level level level
SPWM 67.01% 21.63% 14.57%
SVPWM 31.27% 13.16% 8.67%
i) Seven level inverter with SPWM for ma=0.8
j) Seven level inverter with SVPWM for ma=0.8
5. CONCLUSION
Space vector PWM based on imaginary times reduces the complexity involved in the
conventional svpwm. For the cascaded level inverters the THD decreases as levels increases
further, when compared to sine triangle modulation, svpwm gives lesser THD for
corresponding inverter level.
REFERENCES
[1] “A new hybrid cascaded h bridge multilevel inverter performance analysis”, IEEE
conference on advances in engineering, science and management, march 2012
[2]“ Analysis and Simulation of new 7- Level Inverter topology”, by M.suryasuresh and
Vishnu Prasad
[3] “seven-Level modified Cascaded Multilevel Inverter for Induction motor drive’, Journal
of information engineering applications vol.1 no.1 2011.
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10. International Journal of Electrical Engineering and Technology (IJEET), ISSN 0976 –
6545(Print), ISSN 0976 – 6553(Online) Volume 4, Issue 2, March – April (2013), © IAEME
[4] Simulation of a space vector PWM controller for three level voltage fed inverter motor
drive, 2006 IEEE.
[5]Ahmad FaizMinai and Abu Tariq (2011 IEEE) “Analysis of Cascaded Multilevel Inverter”
[6] “A Novel voltage modulation technique of the space vector pwm”,by seung ki sul.
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