The document discusses the technical challenges in developing an artificial retina, including achieving ultra-low power consumption of under 300uW. Key challenges include operating circuits in the sub-threshold voltage region, selecting an appropriate low-voltage power source like photovoltaics, and implementing very high resistances and low bandwidths below 100Hz needed for neural interfaces. Addressing these challenges requires specialized microarchitectures, circuit techniques like switched capacitor implementations, and modeling focused on sub-threshold and mismatch effects.
6. Key technical challenges
• Ultra low power (ULP) (<300uW)
• Weak power source
• Very low bandwidth (1÷40Hz)
• Wide dynamic range (>5 decades = ~17 bits)
• Sufficient resolution (~1000 pixels)
• Wirelessly configurable (w/o antenna)
• Very small device (<15mm2 including package)
6
May 2, 2012 6
7. Key development steps
• Phase 1: Providing proof of concept
– Development of Micro-electrode array
(MEA)
– Defining process flow & vendors
– Development of ULP test chip
– Performing pre-clinical experiments
• Phase 2: Development of prototypes
– Fully compliance for medical experiments
– Full functionality
– Complementary accessories
May 2, 2012 7
8. Micro architecture of Artificial Retina
• Process: TSL018 CIS • MEA: by NR
• Power: GaAs PV • Design: CSEM
8 May 2, 2012 8
9. Challenge #1: Very low power
• Why it is important?
– Ability to transfer optical power without exceeding eye safety limits
– Minimizing heating of the eye
– Minimizing the batteries on the glasses
• Considering the use of regulator
– Regulator consume significant portion of total power
– Regulator reduces the usable voltage swing
– Regulator is a must when AC power source is AC or unstable
– Regulator reduces the performance variation due to supply voltage
9
May 2, 2012 9
10. ?How it is achieved
• ULP oriented micro-architecture
– Minimum usable and achievable voltage
– Minimum digital processing
– Minimum frequency at any stage
– Discrete time analog processing
• ULP analog design style by ULP experts
• Low voltage operation
ULP design techniques are enablers for
implementing medical implantable devices,
such as Artificial Retina
10
May 2, 2012 10
11. Challenge #1a – sub-threshold circuits
• Vdd ~Vth -> operation at sub-threshold region
• Selecting proper circuits:
– Dynamic range
– Power
– Linearity
– Matching
– Noise
May 2, 2012 11
12. CSEM Microelectronics
Operating CMOS in sub-threshold
• Operating in sub-threshold (weak
inversion)
• Voltages are scaled to nUT (32 mV for n =
1.2 )
• ∆Id/∆Vgs = 70÷80mV/decade
• Weak inversion expression:
VG − VT 0
I Dsat = I s exp
nU
T
kT
UT = = 26.7 mV at T = 37°C
q
May 2, 2012 12
13. Example of sub-threshold low
voltage circuit – ULP amplifier
Amplifier with
controlled offset
Amplifier with
extended
dynamic range
Presented by E. Vittoz
May 2, 2012 13
14. Challenge #1b – device modeling
• Conventional BSIM3/4 are not accurate at sub-
threshold
• EKV models are more accurate (availability ?!)
• Need also accurate models for monte-carlo & noise
May 2, 2012 14
15. Challenge #1c – mismatch in sub-threshold
circuits
• Mis-matching is high
• Mitigation techniques:
– Large devices
– Very careful layout – matching rules
– Dynamic offset cancellation (chopping):
Presented by C. Enz & G. Themes
May 2, 2012 15
16. Challenge #2 – Selection of power source
• Relevant power sources:
– Battery
– Energy harvesting
– Electromagnetic power
– Optical power transfer
May 2, 2012 16
17. Performance limitations of PV
Laser IR transmitter + Photo-Voltaic receiver is the
…preferred power source for Artificial Retina. But
• Limited selection of voltages
• Limited current
• High dV/dI
• Fast voltage drop at over-
loading
May 2, 2012 17
18. Specifying voltage requirements
• Analog circuit requires higher supply voltage than
digital
• Limited by dynamic range of analog circuits
– Example: Logarithmic Trans-Impedance Amplifier
May 2, 2012 18
19. Challenge #3 – controlling very low
bandwidth
• Bandwidth of neural signals is <<100Hz
– RC example: C << 10pF ; R >> 10Gohm (!!!)
• Analog implementation of high giga-resistor:
– Transistor at very weak inversion
– Linearity ?!
– Immunity to leakage ?!
– Matching ?!
• Switch capacitor implementation:
– CMOS switches
– Charge injection !!!
May 2, 2012 19
20. Implementing ULP switch capacitor
resistor
• General SC resistor
– Minimum size CMOS switches
– Capacitors implemented by:
• NMOS
• MIM
• Native_NMOS
• Charge injection:
– Might cause offset
– Difficult to predict
– Difficult to match
• Differential SC circuits are better
May 2, 2012 20
21. Summary
• ULP is enabling technology for implantable medical devices,
such as Artificial Retina
• ULP implementation is challenging but doable
• Key factors for successful design:
– Optimal micro-architecture
– Optimal selection of power sourcing
– Know-how in sub-threshold design
– Availability of EKV models
– Intensive monte-carlo simulations
May 2, 2012 21