SPICE MODEL of uPC4560C in SPICE PARK. English Version is http://www.spicepark.net. Japanese Version is http://www.spicepark.com by Bee Technologies.

1. Device Modeling Report
COMPONENTS: OPERATIONAL AMPLIFIER
PART NUMBER: uPC4560C
MANUFACTURER: NEC ELECTRONICS
REMARK TYPE: (OPAMP)
Bee Technologies Inc.
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

2. Spice Model
U8
1 8
OUT1 VCC
2 7
-IN1 OUT2
3 6
+IN1 -IN2
4 5
VEE +IN2
UPC4560
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

3. Output Voltage Swing, +Vout and –Vout
Evaluation circuit
Rload
2k Vout U8
1 8
OUT1 VCC
2 7
-IN1 OUT2
3 6
V1 +IN1 -IN2
0Vdc 4 5
VEE +IN2
V+
UPC4560
Rload2
V-
2k 15Vdc
-15Vdc
0 0
The output voltage change of Opamp(open loop) when input DC voltage
(Vin -Vi) is changed with the evaluation circuit is simulated
Simulation result
These simulation results are compared with +Vout
Output Voltage Swing Data sheet Simulation %Error
+Vout(V) +14 +13.996 0.02857
-Vout(V) -14 -13.996 0.02857
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

4. Input Offset Voltage
Evaluation circuit
Rload
10k Vout U8
1 8
OUT1 VCC
2 7
-IN1 OUT2
3 6
+IN1 -IN2
4 5
VEE +IN2
Vin Vi V+
UPC4560
VOFF = 0 VOFF = 0 Rload2
VAMPL = 0 VAMPL = 0 V-
FREQ = 0 FREQ = 0 10k 15Vdc
AC = 0 AC = 0
DC = 0 DC = 0 -15Vdc
0 0
Simulation result
Measurement Simulation Error
Vos 6 mV 6.0064 mV 0.1066 %
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

5. Slew Rate, +SR, -SR
Evaluation circuit
Rload
2k Vout U8
1 8
OUT1 VCC
2 7
-IN1 OUT2
3 6
+IN1 -IN2
V1 = 0 Vi
V2 = 14 4 5
TD = 0 VEE +IN2
TR = 10n Vin V+
UPC4560
TF = 10n VOFF = 0 Rload2
PW = 5u VAMPL = 0 V-
PER = 500u FREQ = 0 2k 15Vdc
V2AC = 0
-6.0064m DC = 0 -15Vdc
0 0
The output voltage change versus time (slope) of op-amp when input electric
step voltage.
Simulation result
Output voltage change 2.8V in 1 us (If no good can change C2 of Spice
Model Editor)
Data sheet Simulation %Error
Slew Rate(v/us)
2.8 2.8048 0.142
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

6. Input current Ib, Ibos
Evaluation circuit
Rload
2k Vout U8
1 8
OUT1 VCC
2 7
-IN1 OUT2
3 6
+IN1 -IN2
4 5
VEE +IN2
Vi Vin V+
UPC4560
VOFF = -6.0064m VOFF = 0 Rload2
VAMPL = 0 VAMPL = 0 V-
FREQ = 0 FREQ = 0 2k 15Vdc
AC = 0 AC = 0
DC = 0 DC = 0 -15Vdc
0 0
The input offset current when supply voltage to op-amp
Simulation result
Data sheet Simulation %Error
Ib(nA) 60 59.644 0.593
Ibos(nA) 5 4.986 0.28
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

7. Open Loop Voltage Gain vs. Frequency, Av-dc, f-0dB
Evaluation circuit
Vout U8
1 8
OUT1 VCC
2 7
-IN1 OUT2
3 6
+IN1 -IN2
4 5
VEE +IN2
Vin Vi V+
UPC4560
VOFF = 0 VOFF = 0
VAMPL = 0 VAMPL = 0 V-
FREQ = 0 FREQ = 0 15Vdc
AC = 1m AC = 0
DC = -6.0064m DC = 0 -15Vdc
0
The open loop voltage gain of op-amp when supply AC input voltage 1MHz
frequecy
Simulation result
Data sheet Simulation %Error
f-0dB(MHz) 8.5 8.31 2.35
Av-dc 180000 179411 0.327
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

8. Output Short Circuit Current - Ios
Evaluation circuit
1nRload Vout U8
1 8
OUT1 VCC
2 7
V6 -IN1 OUT2
3 6
+IN1 -IN2 Rload2
0 4 5
VEE +IN2 1n
Vin Vi V+
UPC4560
VOFF = -6.0064m VOFF = 0
VAMPL = 0 VAMPL = 0 V-
FREQ = 0 FREQ = 0 V7 15Vdc
AC = 0 AC = 0
DC = 0 DC = 0 -15Vdc
0
0 0
Simulation result
Short Circuit current
Data sheet Simulation %Error
Short Circuit Current
40mA 40.621mA 1.55
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

9. Common-Mode Rejection Voltage gain
Evaluation circuit
Vout U8
1 8
OUT1 VCC
2 7
-IN1 OUT2
3 6
+IN1 -IN2
DC = 0 DC = 0 4 5
AC = 0 AC = 0 VEE +IN2
FREQ = 0 FREQ = 0 V+
UPC4560
VAMPL = 0 VAMPL = 0
VOFF = 0 VOFF = 0 V-
Vin Vi 15Vdc
-15Vdc
V
VOFF = 0
VAMPL = 0.5
FREQ = 1
AC = 0
DC = -6.0064m
0
Simulation result
Common mode gain=1/0.555
Common Mode Reject Ratio=179411/1.801=99617
Data sheet Simulation %Error
CMRR
100000 99617 0.383
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004