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Device Modeling Report




 COMPONENTS: OPERATIONAL AMPLIFIER
 PART NUMBER: uPC3403G2
 MANUFACTURER: NEC ELECTRONICS
 REMARK TYPE: (OPAMP)




               Bee Technologies Inc.




All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
Spice Model

    U1
1                    14
    OUT1      OUT4
2                    11
    -IN1      -IN4
3                    12
    +IN1      +IN4
4                    11
    VCC       VEE
5                    10
    +IN2      +IN3
6                    9
    -IN2      -IN3
7                    8
    OUT2      OUT3

    UPC3403




                     All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
Output Voltage Swing, +Vout and –Vout

Evaluation circuit

                                 Rload
                                 10k      Vout        U1
                                                  1                       14
                                                      OUT1        OUT4
                                                  2                       11
                                                      -IN1         -IN4
                   Vin
       VOFF = 0                                   3                       12
       VAMPL = 0                                      +IN1         +IN4
       FREQ = 0                                   4                       11
       AC = 0                                         VCC          VEE
                                Vi
       DC = 0       VOFF = 0                      5                       10    V-
                    VAMPL = 0                         +IN2         +IN3
                    FREQ = 0               V+     6                       9
                    AC = 0                            -IN2         -IN3        -15Vdc
                    DC = 0                        7                       8
                                          15Vdc       OUT2        OUT3

                                                      UPC3403



        0           0


The output voltage change of Opamp(open loop) when input DC voltage
(Vin -Vi) is changed with the evaluation circuit is simulated



Simulation result




These simulation results are compared with +Vout

 Output Voltage Swing                    Data sheet             Simulation           %Error
      +Vout(V)                              +13                  +12.999             0.0076
       -Vout(V)                             -13                   -12.999            0.0076




            All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
Input Offset Voltage

Evaluation circuit


                                       Vout        U1
                                               1                     14
                                                   OUT1      OUT4
                                               2                     11
                                                   -IN1       -IN4
                     Vin
         VOFF = 0                              3                     12
         VAMPL = 0                                 +IN1      +IN4
         FREQ = 0                              4                     11
         AC = 0                                    VCC        VEE
                                  Vi
         DC = 0       VOFF = 0                 5                     10      V-
                      VAMPL = 0                    +IN2      +IN3
                      FREQ = 0          V+     6                     9
                      AC = 0                       -IN2       -IN3          -15Vdc
                      DC = 0                   7                     8
                                       15Vdc       OUT2      OUT3

                                                   UPC3403



                      0




Simulation result




                            Measurement             Simulation               Error
        Vos                   7       mV           7.1112      mV         1.591    %




          All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
Slew Rate, +SR, -SR

Evaluation circuit

                                       2K Rload
                                              Vout        U1
                                                      1                     14
                                                          OUT1      OUT4
                                                      2                     11
                                                          -IN1       -IN4
                                                      3                     12
                                                          +IN1      +IN4
           V1 = 0       V1
           V2 = 14                                    4                     11
           TD = 0                                         VCC        VEE
                                      Vi
           TR = 10n       VOFF = 0                    5                     10    V-
           TF = 10n       VAMPL = 0                       +IN2      +IN3
           PW = 5u        FREQ = 0             V+     6                     9
           PER = 500u     AC = 0                          -IN2       -IN3        -15Vdc
                        V2DC = 0                      7                     8
           -7.1112m                           15Vdc       OUT2      OUT3

                                                          UPC3403



           0            0




The output voltage change versus time (slope) of op-amp when input electric
step voltage.



Simulation result




Output voltage change 0.5V in 1 us (If no good can change C2 of Spice
Model Editor)

                             Data sheet               Simulation                 %Error
Slew Rate(v/us)
                                0.5                     0.491                     1.8




          All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
Input current Ib, Ibos

Evaluation circuit

                                            2K Rload
                                                   Vout         U1
                                                            1                    14
                                                                OUT1      OUT4
                                                            2                    11
                                                                -IN1      -IN4
                                                            3                    12
                                                                +IN1      +IN4
                         Vin
       VOFF = -7.1112m                                      4                    11
            VAMPL = 0                                           VCC       VEE
                                           Vi
            FREQ = 0           VOFF = 0                     5                    10       V-
            AC = 0             VAMPL = 0                        +IN2      +IN3
            DC = 0             FREQ = 0             V+      6                    9
                               AC = 0                           -IN2      -IN3           -15Vdc
                               DC = 0                       7                    8
                                                   15Vdc        OUT2      OUT3

                                                                UPC3403



            0             0




The input offset current when supply voltage to op-amp



Simulation result




                                Data sheet                 Simulation                 %Error
     Ib(nA)                         45                       44.845                   0.344
    Ibos(nA)                        50                        49.87                    0.26




           All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
Open Loop Voltage Gain vs. Frequency , Av-dc, f-0dB

Evaluation circuit


                                                Vout        U1
                                                        1                     14
                                                            OUT1      OUT4
                                                        2                     11
                                                            -IN1       -IN4
                                                        3                     12
                                                            +IN1      +IN4
                                                        4                     11
                                                            VCC        VEE
                       Vin               Vi
       VOFF = 0              VOFF = 0                   5                     10       V-
       VAMPL = 0             VAMPL = 0                      +IN2      +IN3
       FREQ = 0              FREQ = 0            V+     6                     9
       AC = 1m               AC = 0                         -IN2       -IN3           -15Vdc
       DC = -7.1112m         DC = 0                     7                     8
                                                15Vdc       OUT2      OUT3

                                                            UPC3403



                        0



The open loop voltage gain of op-amp when supply AC input voltage 1MHz
frequecy



Simulation result




                                   Data sheet           Simulation                 %Error
   f-0dB(MHz)                          1                  0.985                     1.5
      Av-dc                          79432                79031                    0.504




           All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
Output Short Circuit Current - Ios

Evaluation circuit


                                                   1nRload
                                                         Vout        U1
                                                                 1                       14
               V6                                                    OUT1        OUT4
                                                                 2                       11
                                                                     -IN1         -IN4
            0                                                    3                       12
                                                                     +IN1        +IN4
                                                                 4                       11
                                                                     VCC          VEE
                            Vin               Vi
          VOFF = -7.1112m         VOFF = 0                       5                       10        V-
             VAMPL = 0            VAMPL = 0                          +IN2        +IN3
             FREQ = 0             FREQ = 0                V+     6                       9
             AC = 0               AC = 0                             -IN2         -IN3            -15Vdc
             DC = 0               DC = 0                         7                       8
                                                         15Vdc       OUT2        OUT3

                                                                     UPC3403



           0                 0




Simulation result




                                                                                         Short Circuit current



                                              Data sheet                    Simulation             %Error
     Short Circuit Current
                                                   20mA                     20.064mA                    0.32




          All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
Common-Mode Rejection Voltage gain

Evaluation circuit


                                        Vout        U1
                                                1                         14
                                                    OUT1       OUT4
                                                2                         11
                                                    -IN1           -IN4
                                                3                         12
                                                    +IN1           +IN4
                                                4                         11
                                                    VCC            VEE
                           Vi     Vin           5                         10     V-
                                                    +IN2           +IN3
                                         V+     6                         9
                       0Vdc      0Vdc               -IN2           -IN3         -15Vdc
                                                7                         8
                                        15Vdc       OUT2       OUT3

                                                    UPC3403

                       V
       VOFF = 0
       VAMPL = 0.5
       FREQ = 1
       AC = 0
       DC = -7.1112m
                       0




Simulation result




Common mode gain=1/0.3981
Common Mode Reject Ratio=79031/2.5519=31462


                                Data sheet           Simulation                %Error
        CMRR
                                  31622                    31462                0.5




           All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

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SPICE MODEL of uPC3403G2 in SPICE PARK

  • 1. Device Modeling Report COMPONENTS: OPERATIONAL AMPLIFIER PART NUMBER: uPC3403G2 MANUFACTURER: NEC ELECTRONICS REMARK TYPE: (OPAMP) Bee Technologies Inc. All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
  • 2. Spice Model U1 1 14 OUT1 OUT4 2 11 -IN1 -IN4 3 12 +IN1 +IN4 4 11 VCC VEE 5 10 +IN2 +IN3 6 9 -IN2 -IN3 7 8 OUT2 OUT3 UPC3403 All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
  • 3. Output Voltage Swing, +Vout and –Vout Evaluation circuit Rload 10k Vout U1 1 14 OUT1 OUT4 2 11 -IN1 -IN4 Vin VOFF = 0 3 12 VAMPL = 0 +IN1 +IN4 FREQ = 0 4 11 AC = 0 VCC VEE Vi DC = 0 VOFF = 0 5 10 V- VAMPL = 0 +IN2 +IN3 FREQ = 0 V+ 6 9 AC = 0 -IN2 -IN3 -15Vdc DC = 0 7 8 15Vdc OUT2 OUT3 UPC3403 0 0 The output voltage change of Opamp(open loop) when input DC voltage (Vin -Vi) is changed with the evaluation circuit is simulated Simulation result These simulation results are compared with +Vout Output Voltage Swing Data sheet Simulation %Error +Vout(V) +13 +12.999 0.0076 -Vout(V) -13 -12.999 0.0076 All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
  • 4. Input Offset Voltage Evaluation circuit Vout U1 1 14 OUT1 OUT4 2 11 -IN1 -IN4 Vin VOFF = 0 3 12 VAMPL = 0 +IN1 +IN4 FREQ = 0 4 11 AC = 0 VCC VEE Vi DC = 0 VOFF = 0 5 10 V- VAMPL = 0 +IN2 +IN3 FREQ = 0 V+ 6 9 AC = 0 -IN2 -IN3 -15Vdc DC = 0 7 8 15Vdc OUT2 OUT3 UPC3403 0 Simulation result Measurement Simulation Error Vos 7 mV 7.1112 mV 1.591 % All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
  • 5. Slew Rate, +SR, -SR Evaluation circuit 2K Rload Vout U1 1 14 OUT1 OUT4 2 11 -IN1 -IN4 3 12 +IN1 +IN4 V1 = 0 V1 V2 = 14 4 11 TD = 0 VCC VEE Vi TR = 10n VOFF = 0 5 10 V- TF = 10n VAMPL = 0 +IN2 +IN3 PW = 5u FREQ = 0 V+ 6 9 PER = 500u AC = 0 -IN2 -IN3 -15Vdc V2DC = 0 7 8 -7.1112m 15Vdc OUT2 OUT3 UPC3403 0 0 The output voltage change versus time (slope) of op-amp when input electric step voltage. Simulation result Output voltage change 0.5V in 1 us (If no good can change C2 of Spice Model Editor) Data sheet Simulation %Error Slew Rate(v/us) 0.5 0.491 1.8 All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
  • 6. Input current Ib, Ibos Evaluation circuit 2K Rload Vout U1 1 14 OUT1 OUT4 2 11 -IN1 -IN4 3 12 +IN1 +IN4 Vin VOFF = -7.1112m 4 11 VAMPL = 0 VCC VEE Vi FREQ = 0 VOFF = 0 5 10 V- AC = 0 VAMPL = 0 +IN2 +IN3 DC = 0 FREQ = 0 V+ 6 9 AC = 0 -IN2 -IN3 -15Vdc DC = 0 7 8 15Vdc OUT2 OUT3 UPC3403 0 0 The input offset current when supply voltage to op-amp Simulation result Data sheet Simulation %Error Ib(nA) 45 44.845 0.344 Ibos(nA) 50 49.87 0.26 All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
  • 7. Open Loop Voltage Gain vs. Frequency , Av-dc, f-0dB Evaluation circuit Vout U1 1 14 OUT1 OUT4 2 11 -IN1 -IN4 3 12 +IN1 +IN4 4 11 VCC VEE Vin Vi VOFF = 0 VOFF = 0 5 10 V- VAMPL = 0 VAMPL = 0 +IN2 +IN3 FREQ = 0 FREQ = 0 V+ 6 9 AC = 1m AC = 0 -IN2 -IN3 -15Vdc DC = -7.1112m DC = 0 7 8 15Vdc OUT2 OUT3 UPC3403 0 The open loop voltage gain of op-amp when supply AC input voltage 1MHz frequecy Simulation result Data sheet Simulation %Error f-0dB(MHz) 1 0.985 1.5 Av-dc 79432 79031 0.504 All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
  • 8. Output Short Circuit Current - Ios Evaluation circuit 1nRload Vout U1 1 14 V6 OUT1 OUT4 2 11 -IN1 -IN4 0 3 12 +IN1 +IN4 4 11 VCC VEE Vin Vi VOFF = -7.1112m VOFF = 0 5 10 V- VAMPL = 0 VAMPL = 0 +IN2 +IN3 FREQ = 0 FREQ = 0 V+ 6 9 AC = 0 AC = 0 -IN2 -IN3 -15Vdc DC = 0 DC = 0 7 8 15Vdc OUT2 OUT3 UPC3403 0 0 Simulation result Short Circuit current Data sheet Simulation %Error Short Circuit Current 20mA 20.064mA 0.32 All Rights Reserved Copyright (c) Bee Technologies Inc. 2004
  • 9. Common-Mode Rejection Voltage gain Evaluation circuit Vout U1 1 14 OUT1 OUT4 2 11 -IN1 -IN4 3 12 +IN1 +IN4 4 11 VCC VEE Vi Vin 5 10 V- +IN2 +IN3 V+ 6 9 0Vdc 0Vdc -IN2 -IN3 -15Vdc 7 8 15Vdc OUT2 OUT3 UPC3403 V VOFF = 0 VAMPL = 0.5 FREQ = 1 AC = 0 DC = -7.1112m 0 Simulation result Common mode gain=1/0.3981 Common Mode Reject Ratio=79031/2.5519=31462 Data sheet Simulation %Error CMRR 31622 31462 0.5 All Rights Reserved Copyright (c) Bee Technologies Inc. 2004