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SPICE MODEL of TC74VHC02FN in SPICE PARK
1. Device Modeling Report
COMPONENTS : CMOS DIGITAL INTEGRATED CIRCUIT
PART NUMBER : TC74VHC02FN
MANUFACTURER : TOSHIBA
Bee Technologies Inc.
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
2. Truth Table
Circuit simulation result
U1:1A 0
U1:1B 0
U1:2A 0
U1:2B 0
U1:3A 0
U1:3B 0
U1:4A 0
U1:4B 0
Y1 1
Y2 1
Y3 1
Y4 1
0s 0.5us 1.0us
Time
Evaluation circuit
U1
1Y VCC
Y1
1A 4Y
LO Y4
LO
1B 4B LO
2Y 4A
Y2 LO
2A 3Y
LO Y3 V1
R1
LO
2B 3B LO
1MEG 5
GND 3A LO
74VHC02
0
Comparison table
Input Output
%Error
An Bn Yn (Measurement) Yn (Simulation)
L L H H 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
3. Truth Table
Circuit simulation result
U1:1A 0
U1:1B 1
U1:2A 0
U1:2B 1
U1:3A 0
U1:3B 1
U1:4A 0
U1:4B 1
Y1 0
Y2 0
Y3 0
Y4 0
0s 0.5us 1.0us
Time
Evaluation circuit
U1
1Y VCC
Y1
1A 4Y
LO Y4
HI 1B 4B HI
2Y 4A
Y2 LO
2A 3Y
LO Y3 V1
R1
HI 2B 3B HI
1MEG 5
GND 3A LO
74VHC02
0
Comparison table
Input Output
%Error
An Bn Yn (Measurement) Yn (Simulation)
L H L L 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
4. Truth Table
Circuit simulation result
U1:1A 1
U1:1B 0
U1:2A 1
U1:2B 0
U1:3A 1
U1:3B 0
U1:4A 1
U1:4B 0
Y1 0
Y2 0
Y3 0
Y4 0
0s 0.5us 1.0us
Time
Evaluation circuit
U1
1Y VCC
Y1
HI 1A 4Y
Y4
LO
1B 4B LO
2Y 4A HI
Y2
HI 2A 3Y
Y3 V1
R1
LO
2B 3B LO
1MEG 5
GND 3A HI
74VHC02
0
Comparison table
Input Output
%Error
An Bn Yn (Measurement) Yn (Simulation)
H L L L 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
5. Truth Table
Circuit simulation result
U1:1A 1
U1:1B 1
U1:2A 1
U1:2B 1
U1:3A 1
U1:3B 1
U1:4A 1
U1:4B 1
Y1 0
Y2 0
Y3 0
Y4 0
0s 0.5us 1.0us
Time
Evaluation circuit
U1
1Y VCC
Y1
HI 1A 4Y
Y4
HI 1B 4B HI
2Y 4A HI
Y2
HI 2A 3Y
Y3 V1
R1
HI 2B 3B HI
1MEG 5
GND 3A HI
74VHC02
0
Comparison table
Input Output
%Error
An Bn Yn (Measurement) Yn (Simulation)
H H L L 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
6. High Level and Low Level Input Voltage
Circuit simulation result
6.0V
4.0V
Output
Input
2.0V
0V
0s 1.0ms 2.0ms 3.0ms 4.0ms
V(R1:1) V(U1:1A)
Time
Evaluation circuit
U1
1Y VCC
1A 4Y
LO
1B 4B
2Y 4A
R1 2A 3Y
V1
1MEG V1 = 0 2B 3B
V2 = 5 V2
TD = 0.5m GND 3A
TR = 0.1m
TF = 0.1m 5
74VHC02
PW = 1m
PER = 2m
0
Comparison table
VCC = 5V Measurement Simulation %Error
Min VIH = (VCC*0.7) (V) 3.5 3.6252 3.577
Min VIL = (VCC*0.3) (V) 1.5 1.4951 -0.327
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
7. High Level and Low Level Output Voltage
Circuit simulation result
5.0V
2.5V
Output
0V
V(R1:1) Input
5.0V
2.5V
SEL>>
0V
0s 5ms 10ms
V(V1:+)
Time
Evaluation circuit
U1
1Y VCC
1A 4Y
LO
1B 4B
2Y 4A
2A 3Y
R1
V1 2B 3B
V1 = 0 1MEG V2
V2 = 4.5 GND 3A
TD = 0.5m
TR = 3n 4.5
74VHC02
TF = 3n
PW = 1m
PER = 2m
0
Comparison table
VCC = 4.5V Measurement Simulation %Error
VOH (V) 4.5 4.4965 -0.078
VOL (V) 0 0 0
All Rights Reserved Copyright (c) Bee Technologies Inc. 2005