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Device Modeling Report




COMPONENTS : CMOS DIGITAL INTEGRATED CIRCUIT
PART NUMBER : TC74VHCT00AFN
MANUFACTURER : TOSHIBA




                   Bee Technologies Inc.

     All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
Truth Table

Circuit simulation result


                 U1:1A     0
                 U1:1B     0
                 U1:2A     0
                 U1:2B     0
                 U1:3A     0
                 U1:3B     0
                 U1:4A     0
                 U1:4B     0
                    Y1     1
                    Y2     1
                    Y3     1
                    Y4     1




                           0s                             0.5us               1.0us
                                                          Time


Evaluation circuit

                                     U1

                      LO
                                1A                  VCC

                                1B                  4B
                      LO                                    LO

                                1Y                  4A
                     Y1                                     LO

                                2A                  4Y
                      LO                                     Y4
                                2B                  3B
                      LO                                    LO
                                                                      R1        V1
                                2Y                  3A
                     Y2                                     LO
                                                                      1MEG      5
                               GND                  3Y
                                                             Y3


                                     74VHCT00




                                                0


Comparison table

             Input                              Output
                                                                             %Error
        An           Bn        Yn (Measurement)           Yn (Simulation)
         L           L                    H                       H            0

                All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
Truth Table

Circuit simulation result


                 U1:1A     0
                 U1:1B     1
                 U1:2A     0
                 U1:2B     1
                 U1:3A     0
                 U1:3B     1
                 U1:4A     0
                 U1:4B     1
                    Y1     1
                    Y2     1
                    Y4     1
                    Y3     1




                           0s                             0.5us               1.0us
                                                          Time


Evaluation circuit

                                     U1

                      LO
                                1A                  VCC

                      HI
                                1B                  4B       HI

                                1Y                  4A
                     Y1                                     LO

                                2A                  4Y
                      LO                                     Y4
                      HI
                                2B                  3B       HI
                                                                      R1        V1
                                2Y                  3A
                     Y2                                     LO
                                                                      1MEG      5
                               GND                  3Y
                                                             Y3


                                     74VHCT00




                                                0


Comparison table

             Input                              Output
                                                                             %Error
        An           Bn        Yn (Measurement)           Yn (Simulation)
         L           H                    H                       H            0

                All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
Truth Table

Circuit simulation result


                 U1:1A     1
                 U1:1B     0
                 U1:2A     1
                 U1:2B     0
                 U1:3A     1
                 U1:3B     0
                 U1:4A     1
                 U1:4B     0
                    Y1     1
                    Y2     1
                    Y3     1
                 U1:4Y     1




                           0s                             0.5us               1.0us
                                                          Time


Evaluation circuit

                                     U1

                      HI        1A                  VCC

                                1B                  4B
                      LO                                     LO

                                1Y                  4A       HI
                     Y1
                      HI        2A                  4Y
                                                             Y4
                                2B                  3B
                      LO                                     LO
                                                                      R1        V1
                                2Y                  3A       HI
                     Y2
                                                                      1MEG      5
                               GND                  3Y
                                                             Y3


                                     74VHCT00




                                                0


Comparison table

             Input                              Output
                                                                             %Error
        An           Bn        Yn (Measurement)           Yn (Simulation)
         H           L                    H                       H            0

                All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
Truth Table

Circuit simulation result


                 U1:1A     1
                 U1:1B     1
                 U1:2A     1
                 U1:2B     1
                 U1:3A     1
                 U1:3B     1
                 U1:4A     1
                 U1:4B     1
                    Y1     0
                    Y2     0
                    Y4     0
                    Y3     0




                           0s                             0.5us               1.0us
                                                          Time


Evaluation circuit

                                     U1

                      HI        1A                  VCC

                      HI
                                1B                  4B       HI

                                1Y                  4A       HI
                     Y1
                      HI        2A                  4Y
                                                             Y4
                      HI
                                2B                  3B       HI
                                                                      R1        V1
                                2Y                  3A       HI
                     Y2
                                                                      1MEG      5
                               GND                  3Y
                                                             Y3


                                     74VHCT00




                                                0



Comparison table

             Input                              Output
                                                                             %Error
        An           Bn        Yn (Measurement)           Yn (Simulation)
         H           H                    L                       L            0

                All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
High Level and Low Level Input Voltage

Circuit simulation result

               5.0V




                                                                                    Output
               2.5V                                                                 Input




                 0V
                      0s             1.0ms             2.0ms                3.0ms           4.0ms
                           V(R1:1)    V(V1:+)
                                                        Time



Evaluation circuit

                                                       U1

                                                  1A                   VCC

                                            HI
                                                  1B                   4B

                                                  1Y                   4A

                                                  2A                   4Y

                                                  2B                   3B

                           V1                     2Y                   3A
            V1 = 0
            V2 = 5                     R1        GND                   3Y                       V2
            TD = 0.5m
            TR = 0.1m                 1MEG
            TF = 0.1m                                                                           5
                                                       74VHCT00
            PW = 1m
            PER = 2m




                                                            0


Comparison table

         VCC = 5V               Measurement                 Simulation                %Error
           VIH (V)                    2                            2                        0
           VIL (V)                   0.8                        0.799250               -0.094
               All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
High Level and Low Level Output Voltage

Circuit simulation result

               5.0V



               2.5V


                                                                            Output
                  0V
                         V(R1:1)                                            Input
               5.0V



               2.5V

              SEL>>
                 0V
                    0s                                5ms                           10ms
                         V(V1:+)
                                                     Time


Evaluation circuit

                                                    U1

                                               1A                  VCC

                                         HI
                                               1B                  4B

                                               1Y                  4A

                                               2A                  4Y

                          V1                   2B                  3B                   V2
            V1 = 0
            V2 = 4.5                           2Y                  3A
            TD = 0.5m                                                                   4.5
            TR = 3n                 R1        GND                  3Y
            TF = 3n
            PW = 1m                1MEG
            PER = 2m
                                                    74VHCT00




                                                                        0


Comparison table

        VCC = 4.5V             Measurement               Simulation           %Error
          VOH (V)                  4.5                      4.4988             -0.027
          VOL (V)                   0                          0                    0
               All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
Propagation Delay Time

Circuit simulation result

               5.0V




                                                                                Output
               2.5V                                                             Input




                  0V
                       0s                             50ns                              100ns
                            V(U1:1Y)   V(V1:+)
                                                      Time



Evaluation circuit

                                                            U1

                                                       1A                 VCC

                                                 HI
                                                       1B                 4B

                                                       1Y                 4A

                                                       2A                 4Y

                                                       2B                 3B
                                                                                           V2
            V1 = 0          V1                         2Y                 3A
            V2 = 5
            TD = 10n                   C1             GND                 3Y
            TR = 3n                                                                        5
            TF = 3n                    15p
            PW = 50n
                                                            74VHCT00
            PER = 100n




                                                            0


Comparison table

  CL=15pF,VCC=5 V,Tr=Tf=3ns                 Measurement                Simulation              %Error
            tpLH (ns)                             5                     5.0416                  0.832
            tpHL (ns)                             5                     5.0744                  1.488
               All Rights Reserved Copyright (c) Bee Technologies Inc. 2005

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SPICE MODEL of TC74VHCT00AFN in SPICE PARK

  • 1. Device Modeling Report COMPONENTS : CMOS DIGITAL INTEGRATED CIRCUIT PART NUMBER : TC74VHCT00AFN MANUFACTURER : TOSHIBA Bee Technologies Inc. All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
  • 2. Truth Table Circuit simulation result U1:1A 0 U1:1B 0 U1:2A 0 U1:2B 0 U1:3A 0 U1:3B 0 U1:4A 0 U1:4B 0 Y1 1 Y2 1 Y3 1 Y4 1 0s 0.5us 1.0us Time Evaluation circuit U1 LO 1A VCC 1B 4B LO LO 1Y 4A Y1 LO 2A 4Y LO Y4 2B 3B LO LO R1 V1 2Y 3A Y2 LO 1MEG 5 GND 3Y Y3 74VHCT00 0 Comparison table Input Output %Error An Bn Yn (Measurement) Yn (Simulation) L L H H 0 All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
  • 3. Truth Table Circuit simulation result U1:1A 0 U1:1B 1 U1:2A 0 U1:2B 1 U1:3A 0 U1:3B 1 U1:4A 0 U1:4B 1 Y1 1 Y2 1 Y4 1 Y3 1 0s 0.5us 1.0us Time Evaluation circuit U1 LO 1A VCC HI 1B 4B HI 1Y 4A Y1 LO 2A 4Y LO Y4 HI 2B 3B HI R1 V1 2Y 3A Y2 LO 1MEG 5 GND 3Y Y3 74VHCT00 0 Comparison table Input Output %Error An Bn Yn (Measurement) Yn (Simulation) L H H H 0 All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
  • 4. Truth Table Circuit simulation result U1:1A 1 U1:1B 0 U1:2A 1 U1:2B 0 U1:3A 1 U1:3B 0 U1:4A 1 U1:4B 0 Y1 1 Y2 1 Y3 1 U1:4Y 1 0s 0.5us 1.0us Time Evaluation circuit U1 HI 1A VCC 1B 4B LO LO 1Y 4A HI Y1 HI 2A 4Y Y4 2B 3B LO LO R1 V1 2Y 3A HI Y2 1MEG 5 GND 3Y Y3 74VHCT00 0 Comparison table Input Output %Error An Bn Yn (Measurement) Yn (Simulation) H L H H 0 All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
  • 5. Truth Table Circuit simulation result U1:1A 1 U1:1B 1 U1:2A 1 U1:2B 1 U1:3A 1 U1:3B 1 U1:4A 1 U1:4B 1 Y1 0 Y2 0 Y4 0 Y3 0 0s 0.5us 1.0us Time Evaluation circuit U1 HI 1A VCC HI 1B 4B HI 1Y 4A HI Y1 HI 2A 4Y Y4 HI 2B 3B HI R1 V1 2Y 3A HI Y2 1MEG 5 GND 3Y Y3 74VHCT00 0 Comparison table Input Output %Error An Bn Yn (Measurement) Yn (Simulation) H H L L 0 All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
  • 6. High Level and Low Level Input Voltage Circuit simulation result 5.0V Output 2.5V Input 0V 0s 1.0ms 2.0ms 3.0ms 4.0ms V(R1:1) V(V1:+) Time Evaluation circuit U1 1A VCC HI 1B 4B 1Y 4A 2A 4Y 2B 3B V1 2Y 3A V1 = 0 V2 = 5 R1 GND 3Y V2 TD = 0.5m TR = 0.1m 1MEG TF = 0.1m 5 74VHCT00 PW = 1m PER = 2m 0 Comparison table VCC = 5V Measurement Simulation %Error VIH (V) 2 2 0 VIL (V) 0.8 0.799250 -0.094 All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
  • 7. High Level and Low Level Output Voltage Circuit simulation result 5.0V 2.5V Output 0V V(R1:1) Input 5.0V 2.5V SEL>> 0V 0s 5ms 10ms V(V1:+) Time Evaluation circuit U1 1A VCC HI 1B 4B 1Y 4A 2A 4Y V1 2B 3B V2 V1 = 0 V2 = 4.5 2Y 3A TD = 0.5m 4.5 TR = 3n R1 GND 3Y TF = 3n PW = 1m 1MEG PER = 2m 74VHCT00 0 Comparison table VCC = 4.5V Measurement Simulation %Error VOH (V) 4.5 4.4988 -0.027 VOL (V) 0 0 0 All Rights Reserved Copyright (c) Bee Technologies Inc. 2005
  • 8. Propagation Delay Time Circuit simulation result 5.0V Output 2.5V Input 0V 0s 50ns 100ns V(U1:1Y) V(V1:+) Time Evaluation circuit U1 1A VCC HI 1B 4B 1Y 4A 2A 4Y 2B 3B V2 V1 = 0 V1 2Y 3A V2 = 5 TD = 10n C1 GND 3Y TR = 3n 5 TF = 3n 15p PW = 50n 74VHCT00 PER = 100n 0 Comparison table CL=15pF,VCC=5 V,Tr=Tf=3ns Measurement Simulation %Error tpLH (ns) 5 5.0416 0.832 tpHL (ns) 5 5.0744 1.488 All Rights Reserved Copyright (c) Bee Technologies Inc. 2005