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Source: AMD internal performance and power measurements and estimates using a java-based workload.. Information is provided for informational purposes only. Any difference in system hardware or
                       software design or configuration may affect actual performance. For detailed calculations, configurations and assumptions refer to backup slides 19-20.




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           * For full disclosure report, contact AMD. SPEC and the benchmark name SPECpower_ssj are trademarks of the Standard Performance Evaluation
           Corporation. For the latest SPECpower_ssj2008 benchmark results, visit http://www.spec.org/power_ssj2008.
             9                                                      !!
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• HT Assist helps reduces memory latency and increase overall system performance in multi-socket
  systems
• HT Assist improves HyperTransport™ technology efficiency and increases performance by:
      • Reducing probe traffic
      • Resolving probes more quickly
• Probe “broadcasting” can be eliminated in 8 of 11 typical CPU-to-CPU transactions
• HT Assist can provide a significant benefit in 4-way and greater systems
      • 4-Way Stream memory bandwidth performance improves by ~60% (41.5GB/s with HT Assist
        vs. 25.5GB/s without HT Assist)*
• HT Assist reserves 1MB portion of each CPU’s L3 cache to act as a directory. This directory tracks
  where that CPU’s cache lines are used elsewhere in the system
      • For 2-way systems this reduction in L3 cache size may eliminate any HT Assist benefit as
        probe traffic is already significantly less than in 4-way systems
• Each CPU is considered the “host” of the cache information contained in its L3 directory
• For many CPU-to-CPU transactions the host CPU knows exactly which CPU to probe for the
  information it needs, eliminating the need to “broadcast”.
• Reducing broadcasting cuts down considerably the amount of system probe traffic and helps
  resolve probes more quickly, resulting in reduced memory latency and improved system
  performance

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Six-Core AMD Opteron launched

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  • 12. > # ; ( ; ; : ; ; : ; + # 4 90 or :3? (;? + # + + # + 4 4 (90 9 (90 2 2 2 Source: AMD internal performance and power measurements and estimates using a java-based workload.. Information is provided for informational purposes only. Any difference in system hardware or software design or configuration may affect actual performance. For detailed calculations, configurations and assumptions refer to backup slides 19-20. ! 9 !!
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  • 22. %& • HT Assist helps reduces memory latency and increase overall system performance in multi-socket systems • HT Assist improves HyperTransport™ technology efficiency and increases performance by: • Reducing probe traffic • Resolving probes more quickly • Probe “broadcasting” can be eliminated in 8 of 11 typical CPU-to-CPU transactions • HT Assist can provide a significant benefit in 4-way and greater systems • 4-Way Stream memory bandwidth performance improves by ~60% (41.5GB/s with HT Assist vs. 25.5GB/s without HT Assist)* • HT Assist reserves 1MB portion of each CPU’s L3 cache to act as a directory. This directory tracks where that CPU’s cache lines are used elsewhere in the system • For 2-way systems this reduction in L3 cache size may eliminate any HT Assist benefit as probe traffic is already significantly less than in 4-way systems • Each CPU is considered the “host” of the cache information contained in its L3 directory • For many CPU-to-CPU transactions the host CPU knows exactly which CPU to probe for the information it needs, eliminating the need to “broadcast”. • Reducing broadcasting cuts down considerably the amount of system probe traffic and helps resolve probes more quickly, resulting in reduced memory latency and improved system performance &, $% $% ! !' 5* !!
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  • 25. , # ) @ .& > ? 4 ; 89 $" 4 3 1; $ " :3; EC . E E E E% . E . E E< <F 33 5- . E E- <F " * 5 ;2 < N : 23 9 *FN 2 F : ; < 5 5 ;2@ : *5 N 2 K*-N ?2 ; 2 ! # K 9 N A @ K 5 K KN - 9 A KF K 5N , . 9 9 KF K D9 005 3/ D3/ 8 1 A "/4 / 'B D3/ 533 . , 98(? 5? 2 5 < *< L@K ! K Z ! @@* L3 ! - Z 3 ! 3 - * LK ! K Z5 ! ) ' 7 M@< 3@F 7 " E5 4 *< 5 7 " E5 4 *< ) A D95; D959 $F ) ') B D9 1 9 . , (5? D(5? 4 3 1; 2 / / . • A@ F $ ! ) 7+ $ $% 1 # '7 4 % % # %1 ? 0# '0 ! '" # % 7 ! # • F . < . ! ! A <$ 3 7 % 8! ! ' @@ $ $ ' ! ! ! %! # * 3 !!
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  • 27. Percentage of Capability 25% 50% 75% 100% ; Memory Speed Performance ! ! Bus Speed High ! % Cache 8 # %! AMD-P and AMD-V # Memory Speed Standard Power $ Bus Speed Cache 2 !$ AMD-P and AMD-V !2 7 ' Memory Speed Low Power Bus Speed 2 % % # '1 !! % H Cache AMD-P and AMD-V ' ' 2 I !! Memory Speed # # Ultra Low % % Bus Speed Power Cache AMD-P and AMD-V G@ '0 ' '! Memory Speed (1333MHz) Performance Bus Speed (6.4GT/s) High Cache (8MB) $ ! Hyperthreading and Turbo 0! $ ! % ! % Memory Speed (1066MHz) Standard Power Bus Speed (5.86-4.8GT/s) 4.8GT/s) H Cache (8MB) @ Hyperthreading and Turbo Memory Speed (800MHz) I Low Power Bus Speed (5.86-4.8GT/s) 4.8GT/s) ' Cache (8MB) 1 2 Hyperthreading and Turbo
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