TAKUMI is a company founded in 2003 that licenses OpenGL ES- and OpenVG-compliant graphics accelerator IP cores for use in embedded systems and mobile devices. They used S2C's Virtex-6 FPGA platform to test and verify several of their graphics IP cores, including the GS3000 and GSV3000 cores. This allowed TAKUMI to demonstrate and evaluate the IP cores for customers more easily, reducing system-on-chip integration time. Using S2C's solution, TAKUMI was able to test a variety of software on different graphics IP cores at near real-time speeds.

1. Success Story
TAKUMI
www.s2cinc.com
•
•
•
About
TAKUMI
Founded in 2003, TAKUMI licenses out its unique and
OpenGL ES- and OpenVG-compliant Graphics Accelerator
IP cores for embedded systems and mobile information
devices, including digital still/video cameras, mobile
phones and set-top boxes that enable the smallest size and
power consumption as well as real rich 2D/3D intuitive
user interface around the world. The company maintains
headquarters in Shiba, Tokyo. TAKUMI also has offices in
Kofu, Yamanashi.
S2C’s rapid SoC prototyping solutions are known for
their reliability, interface flexibility to a variety of SoC
models and interfaces, and scalability to support
designs of various gate counts.
Large-capacity and high-stability enable TAKUMI to
run all the different test pattern at high speed.
The quick response of S2C’s support team helped
TAKUMI to bring up their FPGA verification environ-
ment successfully.
Challenge
Overview
“Graphics IPs today are very complex and require a
large number of test patterns to perform the complete
hardware verification and software testing. Thus, a
reliable, flexible and high-performance FPGA platform
is required,”said Hiroyuki Nitta, Executive Director of
Research and Development of TAKUMI Corporation.
TAKUMI Corporation products are for image processing
application. TAKUMI used S2C’s Virtex-6 760 Prodigy
Logic Module to run a variety of test patterns at high
speed for a series of Graphics IP cores including the
GS3000 and GSV3000 cores. These TAKUMI IP cores
have been fully validated in FPGAs and can be easily
demonstrated to and evaluated by TAKUMI customers;
thereby significantly reduce system-on-chip (SoC)
integration time.
“Moreover, we need to evaluate side by side the library
groups that run together with our Graphics IP cores.”
In addition, SoC designers who are planning to
integrate a complex IP core, such as TAKUMI’s 3D
graphics IP, often require tremendous amount of
verification effort such as verifying the correctness of all
hardware functions, evaluating SoC bus efficiency and
testing software compatibilities. Therefore, having an
easy-to-use and scalable rapid FPGA-based prototyping
platform with TAKUMI’s 3D Graphics IP core already
verified on the platform would certainly ease the
integration of end SoC.

2. “We mapped our 3D graphics IP core into a Virtex-6 760
FPGA on S2C’s V6 TAI Logic Module and used S2C’s
DVI-ver2.0 daughter card to display the video on a TV.
To control our graphics IP core, we utilized an off-the-
shelf ARM11 CPU board (ARMADILLO-500) and Japan
Circuit, S2C’s partner in Japan, custom made an
interface board so the ARM11 CPU board can be plug
on top of S2C’s V6 TAI Logic Module,”said Makoto
Natori, Group Manager of IP Core Development Group
Solution
“Once we got the basic function of our first graphics IP
core working on V6 TAI Logic Module, we expanded the
hardware design to integrate more functions as there
are still plenty of room in FPGA for additional logic
verification. Then, we substituted the FPGA design with
different models of our graphics IP cores so all of them
were verified. We were able to test a lot of software on
all the different graphics IP cores as we were able to run
our FPGA design on the TAI Logic Module at close to
real system speed.”
Results
“Now we can focus on the innovation of image processing
application. We can nearly run all the test patterns in FPGA,
which reduce the time, costs and risk associated with SoC
design,”said Makoto Natori. ”We look forward to build a
long-term cooperation with S2C and await S2C to provide
even more complete and convenient CPU development kit
as well as applications notes in that area.”
Using S2C’s rapid SoC prototyping solutions, TAKUMI’s
Graphics IP cores were prototyped and are available as
reference designs today on S2C’s Virtex-6 760 TAI Logic
Modules for customers to integrate into their SoC. TAKUMI
Graphics IP core reference designs can also be easily ported
to the new Virtex-7 2000T TAI Logic Module series or the
Altera Stratix-4 820 TAI Logic Module series upon customer
requests.
S2C and TAI, are trademarks of S2C, Inc. Virtex is registered trademark of Xilinx. Inc. Stratix is a registered trademark of Altera Corporation.
All other tradenames and trademarks are the property of their respective owners.
Seoul
Hsinchu
Beijing
Shanghai
San Jose Yokohama