The document discusses the timing requirements for real-time EEG analysis, emphasizing the need for instantaneous processing and minimizing delays and jitter. It highlights the importance of data processing in blocks, with varying block sizes affecting jitter and overall performance. The text also explains the delay calculations associated with different block sizes and the trade-offs involved in processing EEG data efficiently.

1. Real-time EEG
timing and block size
Robert Oostenveld
23 Oct 2016
CRI brain control club - Paris

2. Timing requirements

3. Timing requirements
• “realtime” analysis
– instantaneous
– very fast
– well controlled

4. Timing requirements
• “realtime” analysis
– instantaneous
– very fast
– well controlled y = a*x + b

5. Timing requirements
• “realtime” analysis
– instantaneous
– very fast
– well controlled y = a*x + b
T = delay + jitter
T = complexity*datasize + jitter

6. Timing requirements
• “realtime” analysis
– instantaneous
– very fast
– well controlled
• quantifying time
– delay
– jitter
y = a*x + b
T = delay + jitter
T = complexity*datasize + jitter

7. Timing requirements

8. Timing requirements
• Minimizing delay
– reduce data size
– increase speed of algorithm
– increase bandwith of transfer

9. Timing requirements
• Minimizing delay
– reduce data size
– increase speed of algorithm
– increase bandwith of transfer
• Minimizing jitter
– ?

10. Understanding jitter

11. Understanding jitter

12. Understanding jitter

13. Understanding jitter

14. Understanding jitter

15. Understanding jitter

16. Understanding jitter

17. Understanding jitter

18. Understanding jitter

19. Understanding jitter

20. Understanding jitter

21. Understanding jitter

22. Understanding jitter

23. Understanding jitter

24. Understanding jitter

25. Understanding jitter

26. Understanding jitter
• data is processed in blocks everywhere
– amplifier
– usb port
– network (tcp packet)
– processing stream step 1
– processing stream step 2

27. Understanding jitter
• data is processed in blocks everywhere
– amplifier
– usb port
– network (tcp packet)
– processing stream step 1
– processing stream step 2
• unequal block sizes cause jitter

28. Timing requrements
Why not always use blocks of 1 sample?

29. Timing requrements
Why not always use blocks of 1 sample?
for 1 sample
delay = speed*datasize + offset

30. Timing requrements
Why not always use blocks of 1 sample?
for 1 sample
delay = speed*datasize + offset
for N 1-sample blocks
delay = N*speed*datasize + N*offset

31. Timing requrements
Why not always use blocks of 1 sample?
for 1 sample
delay = speed*datasize + offset
for N 1-sample blocks
delay = N*speed*datasize + N*offset
for N samples in one block
delay = N*speed*datasize + offset