1. RAMYA. K.V
+919066241547
246, 13th B Cross, F-Block, 15th Main, ramyakv77@gmail.com
Sahakarnagar, Blore
Objective :To develop career in an industry where I could be a valuable team member
contributing quality ideas and ample scope towards organizational growth
and development ensuring self growth and looking for a challenging career
which demands the best of my professional ability.
Areas of Interest: Embedded System, VLSI, Digital Electronics, C
Educational Qualifications:
Sl.
No
Degree School/College Year of
Passing
Percentage
77.25
75.83
Board/
University
1 Mtech
(VLSI & ES)
Reva Institute of
Technology &Mgt
2015 VTU
2 BE
(ECE)
Atria Institute of
Technology
2013 VTU
3 PUC
(PCMB)
Seshadripuram
Composite PU
College
2009
86
PU Board
4 SSLC Sri Vani Girls High
School
2007 96.32 KSEEB
Professional Training:Underwent training in Professional Diploma in Embedded System
Design from Cranes varsity a Training Division of Cranes Software
International Ltd.
Technical Skills : Languages :C, C++, HDL(Verilog & VHDL)
Operating Systems :Unix Fundamentals, hands on experience on
Linux, Windows XP/8
Tools : Leonardo spectrum, Solid Edge, VLSI design and knowledge of
architecture and functioning of 8086 microprocessor and 8051
microcontroller.
Embedded Boards :ARM development kit (LPC 2148 ) ]
Network protocols :IOS Model, TCP/IP,Socket programming
Embedded protocols :I2C,SPI,UART

2. HARDWARE DESIGN AND DESIGN ENVIRONMENT PROFICIENCY
Digital Environment:
Simulator: NC – Simulator, Xilinx ISE, ModelSim (Verilog),Cadence.
Debugging Environment: Simvision,
Synthesis: Cadence RTL Compiler, Xilinx XST.
Physical Design: Cadence SoC Encounter.
Analog Environment:
Schematic Entry: Virtuoso.
Analog Simulator: Spectre (ADE environment).
Layout Editor: Virtuoso Environment.
Physical verification: Assura, Calibre.
PROJECT DETAILS
Project Brief -Title:Optimized Address Generation of WiMAXDeinterleaver
The addresses are generated for any huge randomly organized data which is
obtained from WiMAX after it is being modulated by 3 modulation
techniques. ASIC & FPGA implementations have been carried out.
Software Used : Xilinx ISE, Cadence.
Project Brief - Title:Design of Vedic Multiplier Using Transistors
The transistor level Multiplication analysis is carried out using
UrdhvaTiryagbhyam Sutra and results are obtained in a very limited number
of steps when compared to the conventional multiplication.
Software Used : Cadence.
Project Brief - Title:New Frontiers of Analog Communication, Remote Virtual Lab
The virtual lab set up can be done in any remote place by just logging into the
without the actual need of costly lab equipments and the results can be
monitored by the guide through GSM.
Software Used :KeilMicrovision.
Project Brief - Title:Design of FSM Based Coffee Vending Machine
This project is based on Mealey implementation of FSM where we get
different products like coffee, tea, juice and has the provision to get back the
money, change when cancel button is pressed or when excess money inserted.
Software Used : Xilinx ISE.
Technical Activities:
 Participated in HDL design Contest, Analog Design Contest conducted by
Texas and won prizes.
 Attended various conferences presenting the projects and won awards and
published papers in various journals.
 Participated in technical seminars and attended workshops on analog& digital
design in Cadence and Xilinx.
Key Strengths :Patience, Open to feedback, Strong Determination, Soft spoken.
Hobbies :Singing, Gardening, Reading books.

3. Personal Details : Name : RAMYA K.V
Date of birth : 07-05-1992
Father’s name : K.Venkatesh
Mother’s name : Nirmala K.S
Languages known : English, Kannada, Tamil
Declaration :
I, hereby declare that the information furnished above is correct to the best of my knowledge.
Date:
Place: Bangalore.
[RAMYA K.V]