The document discusses an integrate and dump filter receiver for digital signals. The receiver integrates the noisy input signal over one bit period using a capacitor. At the end of the bit period, the output magnitude is measured to decide whether a 1 or 0 was transmitted, then the capacitor is discharged to prepare for the next bit. The receiver aims to maximize signal to noise ratio and minimize error probability when detecting transmitted bits in the presence of additive Gaussian noise.

1. OPTIMAL RECEPTION OF
DIGITAL SIGNALS

2. INTEGRATE AND DUMP FILTER
RECEIVER

3. • Here the signal s(t) is distorted by noise n(t) and
applied to the input of the integrate and dump filter.
• The capacitor is discharged fully at the beginning of
bit interval(by closing Sw1 switch),the integrator then
integrates the noisy input signal over one bit period.

4. • For a square pulse input the output would be triangular,
the magnitude of vo(t).
• At t=T the o/p magnitude is maximum.
• Depending on the value of vo(T),the decision is taken
whether the transmitted bit is 1 or 0.
• The dump switch Sw1 is closed momentarily to
discharge the capacitor to receive the next bit.

5. Signal to noise ratio

6. Signal output
Noise output of the integrator

8. Probability of error

11. Optimum receiver

15. Optimum filter transfer function

17. Optimum filter realization using
matched filter

18. Error probability for matched filter

19. Optimum filter realization using
correlator

21. summary
• To perform detection the receiver observes the received
signal for the duration of one symbol and guesses which
particular symbol was sent according to some set of rules.
• In coherent detection the receiver is assumed to be in
possession of exact replicas of the transmitted signals.
• In coherent detection a source of error in decision making
process is additive thermal noise at the receiver
input ,which is modelled as Gaussian noise of zero mean
and constant power spectral density.