This document proposes a new method to identify faulty contact pins in semiconductor testing sockets using contact impedance measurement. Currently, visual inspection and open/short circuit tests are used but have limitations. The proposed method measures the impedance of each pin using a contact impedance tester consisting of a microprocessor, LCR meter, and software. It can identify pins with high impedance qualitatively on a GUI in real-time, improving on resistance-only tests. This allows faulty pins to be identified earlier, reducing debugging time and costs of socket replacement.
This document summarizes a proposed method for comprehensively analyzing the reliability of electronic products by combining electronic design automation (EDA) software simulation with hardware testing. The method involves: 1) Using hardware testing to model circuit components in simulation software like Saber; 2) Analyzing circuit reliability through worst-case simulation analysis; 3) Validating simulations with hardware testing; and 4) Analyzing total circuit board signal integrity and electromagnetic interference using ANSYS software. The method is intended to more precisely model components, analyze component stress levels, and verify simulations to comprehensively evaluate electronic product reliability during design and testing stages.
The semiconductor industry is undergoing dynamic changes as technology challenges escalate due to the end of scaling and declining prices/shortening lifecycles. R&D and manufacturing investment requirements are becoming unaffordable for many smaller companies. As a result, companies globally are adopting an "asset-lite" strategy and manufacturing is moving offshore to large-scale foundries. Revenue growth of the IC industry will remain lower than traditional rates in the single digits rather than double digits, though productivity will still improve at lower rates. Partnerships will be important for development, manufacturing, and delivering technology leadership given mounting investment needs.
This document discusses Oxford Instruments' nanotechnology tools for synthesizing 2D materials. It summarizes their portfolio including MBE systems for wafer-scale graphene growth, cluster tools for combining growth and analysis, CVD and PECVD tools for applied research and pilot production, and ALD systems for dielectric deposition. Oxford Instruments has experience developing tools to meet emerging industry needs and providing long-term support for moving techniques from lab to fabrication. Key challenges in commercializing 2D materials include reducing growth costs, developing integration methods, and ensuring process reliability and automation.
Analysis of recent transactions in Semiconductors Industry detailing on Transaction Multiples (Revenue & EBITDA), Multiples Chart, Active Buyers & Transaction Data
This document provides an agenda and overview for a 2016 Meter School on test switches and accessories. It discusses test switch specifications, configurations, materials, and safety considerations. The key points are:
- Test switches allow inserting instruments into current transformer circuits safely to test meters, without opening the live secondary circuit.
- Specifications cover ratings, materials, barriers between switches, terminals, and minimum spacings. Configurations vary layout, handle colors, and potentials.
- Accessories include test plugs, safety covers, and isolators to allow testing while maintaining safety.
- Proper use and safety procedures are important as open current transformer circuits can generate high voltages, creating electrical and insulation breakdown hazards.
This document discusses different methods for testing electronic components, including passive and active devices. It describes several key methods:
1) Automated testing uses tools to repeatedly execute tests and compare results over time.
2) Debugging is part of software testing and occurs throughout development to identify and address issues.
3) Inspection is a formal evaluation using procedures and measurements to meet standards.
4) In-circuit testing uses equipment to check that components are correctly placed and valued on circuit boards.
This document summarizes a proposed method for comprehensively analyzing the reliability of electronic products by combining electronic design automation (EDA) software simulation with hardware testing. The method involves: 1) Using hardware testing to model circuit components in simulation software like Saber; 2) Analyzing circuit reliability through worst-case simulation analysis; 3) Validating simulations with hardware testing; and 4) Analyzing total circuit board signal integrity and electromagnetic interference using ANSYS software. The method is intended to more precisely model components, analyze component stress levels, and verify simulations to comprehensively evaluate electronic product reliability during design and testing stages.
The semiconductor industry is undergoing dynamic changes as technology challenges escalate due to the end of scaling and declining prices/shortening lifecycles. R&D and manufacturing investment requirements are becoming unaffordable for many smaller companies. As a result, companies globally are adopting an "asset-lite" strategy and manufacturing is moving offshore to large-scale foundries. Revenue growth of the IC industry will remain lower than traditional rates in the single digits rather than double digits, though productivity will still improve at lower rates. Partnerships will be important for development, manufacturing, and delivering technology leadership given mounting investment needs.
This document discusses Oxford Instruments' nanotechnology tools for synthesizing 2D materials. It summarizes their portfolio including MBE systems for wafer-scale graphene growth, cluster tools for combining growth and analysis, CVD and PECVD tools for applied research and pilot production, and ALD systems for dielectric deposition. Oxford Instruments has experience developing tools to meet emerging industry needs and providing long-term support for moving techniques from lab to fabrication. Key challenges in commercializing 2D materials include reducing growth costs, developing integration methods, and ensuring process reliability and automation.
Analysis of recent transactions in Semiconductors Industry detailing on Transaction Multiples (Revenue & EBITDA), Multiples Chart, Active Buyers & Transaction Data
This document provides an agenda and overview for a 2016 Meter School on test switches and accessories. It discusses test switch specifications, configurations, materials, and safety considerations. The key points are:
- Test switches allow inserting instruments into current transformer circuits safely to test meters, without opening the live secondary circuit.
- Specifications cover ratings, materials, barriers between switches, terminals, and minimum spacings. Configurations vary layout, handle colors, and potentials.
- Accessories include test plugs, safety covers, and isolators to allow testing while maintaining safety.
- Proper use and safety procedures are important as open current transformer circuits can generate high voltages, creating electrical and insulation breakdown hazards.
This document discusses different methods for testing electronic components, including passive and active devices. It describes several key methods:
1) Automated testing uses tools to repeatedly execute tests and compare results over time.
2) Debugging is part of software testing and occurs throughout development to identify and address issues.
3) Inspection is a formal evaluation using procedures and measurements to meet standards.
4) In-circuit testing uses equipment to check that components are correctly placed and valued on circuit boards.
This document provides an overview of test switches used for transformer-rated metering services. It discusses typical self-contained and transformer-rated metering services. It then covers test switch operation, specifications from ANSI C12.9, configurations, accessories like test plugs, and considerations for sites without existing test switches. The purpose is to familiarize attendees with using and specifying test switches and their components for safe testing of current transformers. It concludes with an optional multiple choice quiz.
Underground Cable Fault Detection Using IOTIRJET Journal
This document discusses a system to detect faults in underground cable lines using IoT. It proposes using a microprocessor, LCD display, fault sensing circuit module, LoRa module, and power supply to detect the location and type of fault (single line to ground, double line to ground, or three phase faults). The system measures voltage changes across series resistors when a short circuit occurs to determine the fault location. It can display the fault location and phase on the LCD and transmit the data over WiFi. The document reviews literature on condition monitoring of underground cables, current transformer saturation effects, and comparing optical and magnetic current transformers.
John Greenewald and TESCO have been involved in several AMI pilot programs and meter certification projects over the past several years. TESCO has provided customized equipment, software, and engineering support to assist with certification testing of new AMI meters and functional testing of received meters. They have also provided meter technicians to assist with various roles throughout AMI deployments.
Testing strategies for electronic componentsDepEd-Bataan
This document discusses different types of testing strategies for electronic components, including passive electronic components, dynamic testing, and in-circuit testing. It defines passive electronic components as those that cannot control electric current with another signal, such as capacitors, resistors, and inductors. Dynamic testing evaluates the mechanical endurance and integrity of electronics under static, dynamic and fatigue conditions. In-circuit testing uses a tester with drivers and sensors to check that components are correctly placed and valued on printed circuit boards by performing simple resistance, capacitance and inductance measurements between points.
This document discusses using artificial neural networks (ANNs) and statistical techniques to classify partial discharge (PD) defects within cross-linked polyethylene (XLPE) medium voltage cables. PD measurements were taken from six cables with different defects and voltages. Statistical features were extracted from the 3D PD patterns to form the input for various ANNs for classification. 72 different ANN structures were analyzed to determine the most effective and optimal classification technique, based on metrics like mean square error and accuracy. The proposed approach achieved high recognition rates for identifying different types of PD defects within XLPE cables.
This document discusses the benefits of configurable Kelvin technology for optimizing semiconductor component testing. Kelvin testing allows for more precise measurements by using a four-wire method to separate the force and sense contacts. This eliminates errors from contact resistance and improves accuracy. A configurable Kelvin system was developed that standardizes the technology, reduces costs, and allows routing flexibility on load boards. It provides reliable contacts even with smaller device pads through redundant sense contact tines.
Testing strategies for electronics involve various techniques and methodologies to ensure the quality, functionality, and reliability of electronic components, circuits, devices, and systems. Here are some common testing strategies used in the electronics industry:
Unit Testing: This involves testing individual electronic components, such as resistors, capacitors, transistors, integrated circuits (ICs), etc., to ensure they meet specifications and function correctly. Unit testing is typically performed using specialized equipment like multimeters, oscilloscopes, and function generators.
Functional Testing: This tests the functionality of electronic devices or systems as a whole. It verifies whether the device or system performs its intended functions correctly according to the specifications. Functional testing often involves applying input signals and observing output responses. Automated test equipment (ATE) and test scripts are commonly used for functional testing.
In-Circuit Testing (ICT): ICT is used to test electronic circuits and PCBs (Printed Circuit Boards) while they are still in production. It verifies the integrity of the connections and the functionality of individual components by applying test signals to specific nodes on the circuit and measuring responses. ICT can identify defects such as open circuits, short circuits, incorrect component values, etc.
Boundary Scan Testing: Boundary scan, based on the IEEE 1149.1 standard (commonly known as JTAG), is used for testing digital integrated circuits. It allows for testing the interconnects between integrated circuits on a PCB and verifying the functionality of these connections. Boundary scan testing can be performed during manufacturing or in-circuit testing.
Environmental Testing: This involves subjecting electronic devices or systems to various environmental conditions such as temperature extremes, humidity, vibration, and shock to assess their performance and reliability under different operating conditions. Environmental testing helps identify potential weak points and ensures products meet specified standards and requirements.
Burn-In Testing: Burn-in testing involves subjecting electronic components or systems to prolonged operation under normal or accelerated conditions to identify potential early failures. This stress testing helps detect latent defects and ensures product reliability over its expected lifespan.
Automated Testing: Automation of testing processes using specialized test equipment and software can improve efficiency, consistency, and reliability of testing. Automated test systems can execute test scripts, analyze test results, and provide detailed reports, reducing manual effort and human error.
Regression Testing: For iterative development processes, regression testing ensures that modifications or updates to electronic components or systems do not adversely affect previously tested functionality. It involves rerunning previously conducted tests valid.
A Fault Dictionary-Based Fault Diagnosis Approach for CMOS Analog Integrated ...VLSICS Design
In this paper, we propose a simulation-before-test (SBT) fault diagnosis methodology based on the use of a fault dictionary approach. This technique allows the detection and localization of the most likely defects of open-circuit type occurring in Complementary Metal–Oxide–Semiconductor (CMOS) analog integrated circuits (ICs) interconnects. The fault dictionary is built by simulating the most likely defects causing the faults to be detected at the layout level. Then, for each injected fault, the spectre’s frequency responses and the power consumption obtained by simulation are stored in a table which constitutes the fault dictionary. In fact, each line in the fault dictionary constitutes a fault signature used to identify and locate a considered defect. When testing, the circuit under test is excited with the same stimulus, and the responses obtained are compared to the stored ones. To prove the efficiency of the proposed technique, a full custom CMOS operational amplifier is implemented in 0.25 µm technology and the most likely faults of opencircuit type are deliberately injected and simulated at the layout level.
A Fault Dictionary-Based Fault Diagnosis Approach for CMOS Analog Integrated ...VLSICS Design
In this paper, we propose a simulation-before-test (SBT) fault diagnosis methodology based on the use of a fault dictionary approach. This technique allows the detection and localization of the most likely defects of open-circuit type occurring in Complementary Metal–Oxide–Semiconductor (CMOS) analog integrated circuits (ICs) interconnects. The fault dictionary is built by simulating the most likely defects causing the faults to be detected at the layout level. Then, for each injected fault, the spectre’s frequency responses and the power consumption obtained by simulation are stored in a table which constitutes the fault dictionary. In fact, each line in the fault dictionary constitutes a fault signature used to identify and locate a considered defect. When testing, the circuit under test is excited with the same stimulus, and the responses obtained are compared to the stored ones. To prove the efficiency of the proposed technique, a full custom CMOS operational amplifier is implemented in 0.25 µm technology and the most likely faults of opencircuit type are deliberately injected and simulated at the layout level.
This document provides 10 best practices for testing electrosurgical units (ESUs) to ensure their performance and safety. It recommends adopting standardized test procedures, using additional test equipment like electrical safety analyzers and medical oscilloscopes, exercising caution with active electrodes, and performing comprehensive tests of power output, RF leakage currents, return electrode monitors, and inert gas parameters. It also suggests using test automation to quickly perform tests, document measurements, and archive long-term data. The document promotes choosing an ESU tester like the QA-ES II Electrosurgery Analyzer that can perform complete preventive maintenance and safety testing.
This document discusses various electrical testing instruments used in engineering. It describes megger, volt stick pen, clamp meter, battery tester, cable fault locator, continuity tester, and surge protection devices. A megger measures insulation resistance, a volt stick pen detects power without contact, and a clamp meter measures current without disrupting wires. Battery testers check battery state and a cable fault locator finds underground cable faults. Continuity testers check unpowered circuits and surge protectors limit voltage spikes to protect devices. The document emphasizes the importance of testing and protection instruments for reliable power systems.
1. Electrical installation testing should only be done by qualified electricians using the proper equipment. Testing includes both dead testing of de-energized circuits and live testing of energized circuits.
2. Dead testing checks the insulation resistance and continuity of ring circuits and other circuits. Live testing checks polarity, earth loop impedance, prospective short circuit current, and RCD operation.
3. Specific tests include ring circuit loop tests, circuit loop tests, insulation resistance tests, polarity tests, earth loop impedance tests, and RCD tests. Proper procedures and acceptable readings are defined for each test.
Brugg Kabel AG uses silicone insulation for high voltage cable accessories up to 400kV. Routine partial discharge (PD) testing is done on prefabricated joints to ensure quality and detect defects. On-site PD measurements after installation can accurately detect PD above 5pC and localize faults. Directional coupler sensors allow sensitive PD detection and localization in unscreened environments. PD testing is important for ensuring reliability of joints and avoiding premature failures during operation.
Detection of Underground Cable Fault using ArduinoIRJET Journal
This document describes a system to detect faults in underground cables using an Arduino. It uses Ohm's law - a voltage is applied to the cable and the current measured to determine faults. Resistors represent distances along the cable where fault switches can induce faults. When a fault occurs, the voltage change is read by the Arduino and the fault location displayed on an LCD in kilometers. The system can detect common fault types like line-ground and line-line faults. It is meant to more easily locate underground cable faults compared to traditional methods that require digging to find faults.
This document discusses how sustained overvoltage conditions can degrade electronics and reduce product lifetime, even if they are designed to be compatible with overvoltages. It proposes using an accelerated life testing method to quantify the impact. A switch mode power supply circuit will be used as a test device and elevated temperature testing of 160°C will accelerate capacitor aging. The failure criterion will be when capacitor equivalent series resistance increases 2.8 times its initial value. Simulations and statistical analysis will validate the test method and derive relationships between overvoltage, temperature, and failure rate to better understand the thin line between compatible and immune operations.
This document describes an automated resistor sorting machine designed to sort and measure resistors with minimal human interference and increased accuracy. The machine uses a microcontroller and servos to move resistors through the sorting and measuring process. Resistors are inserted into the machine, which then either sorts the resistor into a predefined bin based on its resistance value or measures and displays the value before returning it. The measurement process uses a voltage divider circuit with different reference resistors to measure resistance values from 1 ohm to 1 megohm. An LCD screen and mobile app allow the user to select the sort or measure function and set bin values. The machine aims to increase efficiency in laboratories by automatically sorting resistors and reducing measurement errors.
Troubleshooting is the process of determining the cause of a problem in an electronic circuit by examining the affected area and taking appropriate action. It involves checking connections for minor problems but requires deeper knowledge of circuit operation for major issues. Troubleshooting techniques include tracing signals, measuring voltages and resistance, and substituting components. Intermittent faults, complete failures, and poor performance are common reasons circuits fail. Experienced technicians follow logical steps like associating symptoms to faulty stages or signal tracing to isolate defects.
IRJET- Design and Development of Underground Cable Fault Detection and Locali...IRJET Journal
The document describes a system to detect and localize faults in underground cables using IoT. It can detect both open and short circuit faults. For open circuits, it measures the cable's capacitance, which varies linearly with the length of the fault. For short circuits, it measures the cable's inductance, which also varies linearly with the fault length. A microcontroller processes the capacitance and inductance measurements and displays the fault location on an LCD and webpage. This allows easy, low-cost detection and localization of underground cable faults.
Underground Cable Fault Detection Using ArduinoIRJET Journal
This document describes a project to detect faults in underground cables using an Arduino. It contains the following key points:
1. The project uses a circuit of resistors connected to an Arduino to represent the length of an underground cable. Switches placed at 1 km intervals can induce faults manually.
2. When a fault occurs, the Arduino and its ADC convert the analog current readings to digital data to determine the precise location of the fault in kilometers.
3. The document reviews related work on cable fault detection and discusses cable types, common fault types like earth faults and short circuits, and methods like Time Domain Reflectometry that have been used.
This document provides an overview of test switches used for transformer-rated metering services. It discusses typical self-contained and transformer-rated metering services. It then covers test switch operation, specifications from ANSI C12.9, configurations, accessories like test plugs, and considerations for sites without existing test switches. The purpose is to familiarize attendees with using and specifying test switches and their components for safe testing of current transformers. It concludes with an optional multiple choice quiz.
Underground Cable Fault Detection Using IOTIRJET Journal
This document discusses a system to detect faults in underground cable lines using IoT. It proposes using a microprocessor, LCD display, fault sensing circuit module, LoRa module, and power supply to detect the location and type of fault (single line to ground, double line to ground, or three phase faults). The system measures voltage changes across series resistors when a short circuit occurs to determine the fault location. It can display the fault location and phase on the LCD and transmit the data over WiFi. The document reviews literature on condition monitoring of underground cables, current transformer saturation effects, and comparing optical and magnetic current transformers.
John Greenewald and TESCO have been involved in several AMI pilot programs and meter certification projects over the past several years. TESCO has provided customized equipment, software, and engineering support to assist with certification testing of new AMI meters and functional testing of received meters. They have also provided meter technicians to assist with various roles throughout AMI deployments.
Testing strategies for electronic componentsDepEd-Bataan
This document discusses different types of testing strategies for electronic components, including passive electronic components, dynamic testing, and in-circuit testing. It defines passive electronic components as those that cannot control electric current with another signal, such as capacitors, resistors, and inductors. Dynamic testing evaluates the mechanical endurance and integrity of electronics under static, dynamic and fatigue conditions. In-circuit testing uses a tester with drivers and sensors to check that components are correctly placed and valued on printed circuit boards by performing simple resistance, capacitance and inductance measurements between points.
This document discusses using artificial neural networks (ANNs) and statistical techniques to classify partial discharge (PD) defects within cross-linked polyethylene (XLPE) medium voltage cables. PD measurements were taken from six cables with different defects and voltages. Statistical features were extracted from the 3D PD patterns to form the input for various ANNs for classification. 72 different ANN structures were analyzed to determine the most effective and optimal classification technique, based on metrics like mean square error and accuracy. The proposed approach achieved high recognition rates for identifying different types of PD defects within XLPE cables.
This document discusses the benefits of configurable Kelvin technology for optimizing semiconductor component testing. Kelvin testing allows for more precise measurements by using a four-wire method to separate the force and sense contacts. This eliminates errors from contact resistance and improves accuracy. A configurable Kelvin system was developed that standardizes the technology, reduces costs, and allows routing flexibility on load boards. It provides reliable contacts even with smaller device pads through redundant sense contact tines.
Testing strategies for electronics involve various techniques and methodologies to ensure the quality, functionality, and reliability of electronic components, circuits, devices, and systems. Here are some common testing strategies used in the electronics industry:
Unit Testing: This involves testing individual electronic components, such as resistors, capacitors, transistors, integrated circuits (ICs), etc., to ensure they meet specifications and function correctly. Unit testing is typically performed using specialized equipment like multimeters, oscilloscopes, and function generators.
Functional Testing: This tests the functionality of electronic devices or systems as a whole. It verifies whether the device or system performs its intended functions correctly according to the specifications. Functional testing often involves applying input signals and observing output responses. Automated test equipment (ATE) and test scripts are commonly used for functional testing.
In-Circuit Testing (ICT): ICT is used to test electronic circuits and PCBs (Printed Circuit Boards) while they are still in production. It verifies the integrity of the connections and the functionality of individual components by applying test signals to specific nodes on the circuit and measuring responses. ICT can identify defects such as open circuits, short circuits, incorrect component values, etc.
Boundary Scan Testing: Boundary scan, based on the IEEE 1149.1 standard (commonly known as JTAG), is used for testing digital integrated circuits. It allows for testing the interconnects between integrated circuits on a PCB and verifying the functionality of these connections. Boundary scan testing can be performed during manufacturing or in-circuit testing.
Environmental Testing: This involves subjecting electronic devices or systems to various environmental conditions such as temperature extremes, humidity, vibration, and shock to assess their performance and reliability under different operating conditions. Environmental testing helps identify potential weak points and ensures products meet specified standards and requirements.
Burn-In Testing: Burn-in testing involves subjecting electronic components or systems to prolonged operation under normal or accelerated conditions to identify potential early failures. This stress testing helps detect latent defects and ensures product reliability over its expected lifespan.
Automated Testing: Automation of testing processes using specialized test equipment and software can improve efficiency, consistency, and reliability of testing. Automated test systems can execute test scripts, analyze test results, and provide detailed reports, reducing manual effort and human error.
Regression Testing: For iterative development processes, regression testing ensures that modifications or updates to electronic components or systems do not adversely affect previously tested functionality. It involves rerunning previously conducted tests valid.
A Fault Dictionary-Based Fault Diagnosis Approach for CMOS Analog Integrated ...VLSICS Design
In this paper, we propose a simulation-before-test (SBT) fault diagnosis methodology based on the use of a fault dictionary approach. This technique allows the detection and localization of the most likely defects of open-circuit type occurring in Complementary Metal–Oxide–Semiconductor (CMOS) analog integrated circuits (ICs) interconnects. The fault dictionary is built by simulating the most likely defects causing the faults to be detected at the layout level. Then, for each injected fault, the spectre’s frequency responses and the power consumption obtained by simulation are stored in a table which constitutes the fault dictionary. In fact, each line in the fault dictionary constitutes a fault signature used to identify and locate a considered defect. When testing, the circuit under test is excited with the same stimulus, and the responses obtained are compared to the stored ones. To prove the efficiency of the proposed technique, a full custom CMOS operational amplifier is implemented in 0.25 µm technology and the most likely faults of opencircuit type are deliberately injected and simulated at the layout level.
A Fault Dictionary-Based Fault Diagnosis Approach for CMOS Analog Integrated ...VLSICS Design
In this paper, we propose a simulation-before-test (SBT) fault diagnosis methodology based on the use of a fault dictionary approach. This technique allows the detection and localization of the most likely defects of open-circuit type occurring in Complementary Metal–Oxide–Semiconductor (CMOS) analog integrated circuits (ICs) interconnects. The fault dictionary is built by simulating the most likely defects causing the faults to be detected at the layout level. Then, for each injected fault, the spectre’s frequency responses and the power consumption obtained by simulation are stored in a table which constitutes the fault dictionary. In fact, each line in the fault dictionary constitutes a fault signature used to identify and locate a considered defect. When testing, the circuit under test is excited with the same stimulus, and the responses obtained are compared to the stored ones. To prove the efficiency of the proposed technique, a full custom CMOS operational amplifier is implemented in 0.25 µm technology and the most likely faults of opencircuit type are deliberately injected and simulated at the layout level.
This document provides 10 best practices for testing electrosurgical units (ESUs) to ensure their performance and safety. It recommends adopting standardized test procedures, using additional test equipment like electrical safety analyzers and medical oscilloscopes, exercising caution with active electrodes, and performing comprehensive tests of power output, RF leakage currents, return electrode monitors, and inert gas parameters. It also suggests using test automation to quickly perform tests, document measurements, and archive long-term data. The document promotes choosing an ESU tester like the QA-ES II Electrosurgery Analyzer that can perform complete preventive maintenance and safety testing.
This document discusses various electrical testing instruments used in engineering. It describes megger, volt stick pen, clamp meter, battery tester, cable fault locator, continuity tester, and surge protection devices. A megger measures insulation resistance, a volt stick pen detects power without contact, and a clamp meter measures current without disrupting wires. Battery testers check battery state and a cable fault locator finds underground cable faults. Continuity testers check unpowered circuits and surge protectors limit voltage spikes to protect devices. The document emphasizes the importance of testing and protection instruments for reliable power systems.
1. Electrical installation testing should only be done by qualified electricians using the proper equipment. Testing includes both dead testing of de-energized circuits and live testing of energized circuits.
2. Dead testing checks the insulation resistance and continuity of ring circuits and other circuits. Live testing checks polarity, earth loop impedance, prospective short circuit current, and RCD operation.
3. Specific tests include ring circuit loop tests, circuit loop tests, insulation resistance tests, polarity tests, earth loop impedance tests, and RCD tests. Proper procedures and acceptable readings are defined for each test.
Brugg Kabel AG uses silicone insulation for high voltage cable accessories up to 400kV. Routine partial discharge (PD) testing is done on prefabricated joints to ensure quality and detect defects. On-site PD measurements after installation can accurately detect PD above 5pC and localize faults. Directional coupler sensors allow sensitive PD detection and localization in unscreened environments. PD testing is important for ensuring reliability of joints and avoiding premature failures during operation.
Detection of Underground Cable Fault using ArduinoIRJET Journal
This document describes a system to detect faults in underground cables using an Arduino. It uses Ohm's law - a voltage is applied to the cable and the current measured to determine faults. Resistors represent distances along the cable where fault switches can induce faults. When a fault occurs, the voltage change is read by the Arduino and the fault location displayed on an LCD in kilometers. The system can detect common fault types like line-ground and line-line faults. It is meant to more easily locate underground cable faults compared to traditional methods that require digging to find faults.
This document discusses how sustained overvoltage conditions can degrade electronics and reduce product lifetime, even if they are designed to be compatible with overvoltages. It proposes using an accelerated life testing method to quantify the impact. A switch mode power supply circuit will be used as a test device and elevated temperature testing of 160°C will accelerate capacitor aging. The failure criterion will be when capacitor equivalent series resistance increases 2.8 times its initial value. Simulations and statistical analysis will validate the test method and derive relationships between overvoltage, temperature, and failure rate to better understand the thin line between compatible and immune operations.
This document describes an automated resistor sorting machine designed to sort and measure resistors with minimal human interference and increased accuracy. The machine uses a microcontroller and servos to move resistors through the sorting and measuring process. Resistors are inserted into the machine, which then either sorts the resistor into a predefined bin based on its resistance value or measures and displays the value before returning it. The measurement process uses a voltage divider circuit with different reference resistors to measure resistance values from 1 ohm to 1 megohm. An LCD screen and mobile app allow the user to select the sort or measure function and set bin values. The machine aims to increase efficiency in laboratories by automatically sorting resistors and reducing measurement errors.
Troubleshooting is the process of determining the cause of a problem in an electronic circuit by examining the affected area and taking appropriate action. It involves checking connections for minor problems but requires deeper knowledge of circuit operation for major issues. Troubleshooting techniques include tracing signals, measuring voltages and resistance, and substituting components. Intermittent faults, complete failures, and poor performance are common reasons circuits fail. Experienced technicians follow logical steps like associating symptoms to faulty stages or signal tracing to isolate defects.
IRJET- Design and Development of Underground Cable Fault Detection and Locali...IRJET Journal
The document describes a system to detect and localize faults in underground cables using IoT. It can detect both open and short circuit faults. For open circuits, it measures the cable's capacitance, which varies linearly with the length of the fault. For short circuits, it measures the cable's inductance, which also varies linearly with the fault length. A microcontroller processes the capacitance and inductance measurements and displays the fault location on an LCD and webpage. This allows easy, low-cost detection and localization of underground cable faults.
Underground Cable Fault Detection Using ArduinoIRJET Journal
This document describes a project to detect faults in underground cables using an Arduino. It contains the following key points:
1. The project uses a circuit of resistors connected to an Arduino to represent the length of an underground cable. Switches placed at 1 km intervals can induce faults manually.
2. When a fault occurs, the Arduino and its ADC convert the analog current readings to digital data to determine the precise location of the fault in kilometers.
3. The document reviews related work on cable fault detection and discusses cable types, common fault types like earth faults and short circuits, and methods like Time Domain Reflectometry that have been used.
Similar to Internship_Technical Paper-20 Dec 2012 (20)
1. A Novel Method to Identify Faulty Socket for Semiconductor
Packaged Device Testing Using Contact Impedance Tester
Abdul Azeem bin Mohd Mohideen
Intern (PE-IP)
Altera Corporation (M) Sdn. Bhd.
Penang, Malaysia.
+6012-4252786
azeem040@gmail.com
Ker Harn Lim
Section Head (PE-IP)
Altera Corporation (M) Sdn. Bhd.
Penang, Malaysia.
+6017-5500338
khlim@altera.com
Abstract - A contactor socket is an essential tool for
semiconductor packaged device testing. Over time after
long hours of usage and repetitive insertions, the socket
will be defective and socket pins will need to be
replaced. Currently, there are several methods
available in the market yet some better and effective
method to identify faulty socket pins required to
determine the end-life of a contactor socket pins earlier
and save numerous hour spent for the hardware
debugging process in performing a test. The most
recent method used in semiconductor industry is by
measuring the contact resistance unfortunately the
presence of parasitic components such as inductance and
capacitance on the contactor pin could not be measured
effectively. Hence, semiconductor industries still
searching for the best method to solve the faulty
contactor pin problem diligently. In this paper, a new
method is proposed where a quantitative indicator,
contact impedance is introduced.
Keywords - Contactor, Impedance, Pin, Resistance,
Socket, Tester
I. INTRODUCTION
In semiconductor testing, contactor is one of the test
accessories that make the actual physical contact with the
device under test (DUT) to create the necessary electrical
connection between the ATE and the DUT. The contactor
assembly is generally a part of the test handler. Thus,
before production testing can begin, the test handler must
first be fitted with the test contactor assembly or contactor
block suitable for the device to be tested. [1]
A contactor has a set of contact elements that are
usually in the form of metal fingers (also known as 'contact
fingers') or spring-loaded pins as shown in Figure 1. These
contact elements are the ones that come into contact with
the leads or solder balls of the DUT during electrical
testing. The crown on top of the contactor is the part where
it come into contact with Ball Grid Array (BGA), where
else the bottom part of the spring probe known as pin and it
create contact to the Printed Circuit Board (PCB). Contact
elements are commonly composed of a beryllium-
copper base metal with gold-plating on the surface. [2]
The proper selection of contactors for electrical testing
has a great impact on test yields, device grading,
repeatability and reproducibility of testing, and
productivity. However, over time after long hours of usage,
exposure to changing temperatures and repetitive
insertions, the socket will be defective and socket pins will
need to be replaced. A defective contactor socket with
faulty pins can eventually lead to contact problems that
cause invalid failures or test miscorrelations, which in turn
can result in product verification downtimes, unexplained
yield problems, and even customer’s dissatisfaction. [5]
To overcome this problem, the most common method
used in the industry is by inspecting the pin condition using
naked eye or microscope and it is up to the person’s
discretion to determine the pin is faulty or still fit to be
used. The next common method used is to leverage ATE
and perform an open/short test. Through this method,
faulty pins can be localized at the exact location easily, but
it is still qualitatively represented, either good or bad pin.
Almost end-of-life pin will not be detected. In this paper, a
new method is proposed where a quantitative indicator,
contact impedance measurement is introduced.
Figure 1: Contactor Pin (Spring Probe) Architecture
This paper is organized as follows. The disadvantage of
existing faulty socket pin identification methods are
described in Section 2. The proposed contact impedance
testing methodology discussed in Section 3. The
conceptual tester design is presented in Section 4 and the
conclusion is given in Section 5.
2. II. FAULTY SOCKET PIN IDENTIFICATION
METHODS
A. Visual Inspection
Visual inspection is a common method used for quality
control, data acquisition, and data analysis and majorly
used in maintenance of facilities, mean inspection of
equipment and structures using either or all of human
senses such as vision, hearing, touches and smell. Typically
visual inspection means inspection using raw human senses
and/or any non-specialized inspection equipment such
microscope, magnifying glass and etc. [3]
Normally the contactor pins visually inspected to identify
the physical damage on contactor socket pins by using bare
naked eyes or with the aid of microscope. Figure 2
describes how visual inspection conducted using
microscope; where contactor pin with label 1 represent a
good contactor pin where else contactor pin with label 2
represents a deformed or defective contactor pin
Unfortunately this inspection method is limited to identify
the mechanical damage of socket pins but unable to
indicate the actual number of faulty pins and the faulty
pin’s location on the contactor.
Figure 2: Visual inspection using microscope
B. Open/Short Circuit Test
Usually open/short circuit test conducted to detect open
or shorted device pins and to verify proper connections
between the test system and the DUT. This method is also
known as continuity or contact test and it helps to
determine whether a device has shorted pins, missing bond
wires, a pin damaged from static electricity, a
manufacturing defects. [3] This method only evaluates the
device but it does not evaluate the contactor pins
separately. This method produce DC measurement and
measured value indicates whether the failure was caused by
a shorted condition or open condition inside the device
using Red and Green colour indicators on ATE’s graphical
user interface (GUI). Red indicates a failing contact and
green indicate a good contact.
Sometime the failure might be caused by a defective
contactor pins instead of the device itself. The only way to
verify whether the failure is related with contactor or the
device is by repeat the test process with same contactor but
with another working device. [5] If the failure reproduced
identically at the same pin even with different working
device, it verifies the failure is related to contactor pins.
The Figure 3 shows a custom made DUT card used for
performing open/short circuit test on each pin of FPGAs
contact by routing it to the edge of the DUT card and
connects it to an ATE. This method is time consuming and
the result also qualitative and not accurate.
Figure 3: DUT card for open/short circuit testing
C. Contact Resistance Tester
Currently, contact resistance tester has been used in
semiconductor industry to expedite root cause analysis in
test setup, to enable efficient trouble-shooting by
identifying the locations of open or high resistance contacts
within the contactor socket pin array. Besides that, this
method also helps to verify the contactor pin’s electrical
integrity for preventive maintenance. Unfortunately, the
contact resistance testing method does not consider the
presence of parasitic components such as inductance and
capacitance on the contactor pin. These parasitic
components will affect the integrity of the AC signal in
characterization process of a device.
To improvise the existing contact resistance method, this
paper is introducing the contact impedance method which
identifies the faulty contactor socket pin by evaluating the
impedance of the contactor pin qualitatively and verify the
electrical integrity of pins in term of AC and DC, with
considering the presence of parasitic according to the
3. Equation (1) explains the relationship between voltage,
current and impedance and the components of impedance
verified in Equation (2), where else Equation (3) explains
the concept of contact resistance by assuming the
reactance, X is absence or neglected on the contactor pin.
V = I Z (1)
V is voltage,
I is current,
Z is impedance.
Z = R + jX (2)
R is resistance,
X is reactance.
When assume jX = 0
Z = R (3)
Basically the Figure 4 explains the methodology used for
developing the contact resistance tester by integrating a
Digital Multi Meter (DMM) to the contactor pin probe
card. The resistance value is measured by using the Ohm’s
Law according to Equation (4). [5][6] Where sense voltage
(Vsense) divided by force current will provide the contact
resistance.
If substitute Equation (3) into Equation (1)
V = I R
R = V sense / I force (4)
Figure 4: Contact resistance tester methodology
III. PROPOSED IMPEDANCE TESTING
METHOD
A. Impedance
Impedance is defined as the frequency domain ratio of
the voltage to the current. In general, impedance will be a
complex number, with the same units as resistance, for
which the SI unit is the ohm (Ω). For a sinusoidal current
or voltage input, the polar form of the complex impedance
relates the amplitude and phase of the voltage and current.
The two impeding mechanisms to be taken into account
in AC circuits: the induction of voltages in conductors self-
induced by the magnetic fields of currents (inductance),
and the electrostatic storage of charge induced by voltages
between conductors (capacitance). The impedance caused
by these two effects is collectively referred to
as reactance and forms the imaginary part of complex
impedance whereas resistance forms the real part.[2][6]
The symbol for impedance is usually and it may be
represented by writing its magnitude and phase as shown in
the form .
B. Impedance Tester Experiment Setup
Figure 5 shows the contactor pin test setup to measure
the contact impedance of each pin using LCR meter and
PC. The measured data by LCR meter will be saved into
PC via USB and the test result displayed using specific
software for identifying the faulty contactor pin.
Figure 5: Contactor pin impedance test setup
C. Proposed Test Procedure
Setup test equipments according to Figure 5.
LCR meter and laptop connected using USB
cable.
Kelvin clip probe connects each contactor pin
designated for testing to the LCR meter.
Test equipments turned “ON” and the LCR meter
interfacing software launched in PC.
Each contactor pin tested using Kelvin clip probe
to measure its impedance.
4. Measured impedance values recorded into PC and
analyzed by specific software.
The test result for each contactor pins displayed
qualitatively and quantitatively through specific
software on PC.
D. Impedance Measurement Methodology
Kelvin sensing approach proposed for this impedance
testing method as shown in Figure 6. Kelvin sensing is
also known as Four-terminal sensing, an approach
discovered by Lord Kelvin, who invented the Kelvin
Bridge in 1861 to measure very low resistances. Each
two-wire connection can be called a Kelvin connection. A
pair of contacts that is designed to connect a force-and-
sense pair to a single terminal or lead simultaneously is
called a Kelvin contact.
Four-terminal sensing (4T sensing), 4-wire sensing,
or 4-point probes method is an electrical measuring
technique that uses separate pairs of current-carrying
and voltage-sensing electrodes to make more accurate
measurements than traditional two-terminal (2T) sensing.
The key advantage of four-terminal sensing is that the
separation of current and voltage electrodes eliminates the
impedance contribution of the wiring and contact
resistances but increases the conductance. [7]
Figure 6: Kelvin probe architecture
IV. CONCEPTUAL TESTER DESIGN
A. Hardware Design
The automated impedance tester designed by integrating
impedance measurement features to the contactor pin test
fixture or electronic architecture as shown above in Figure
7. The automated impedance tester could able to perform
test on all the contactor pin in few minutes automatically
and display the test results on the PC.
The tester main board require a multi-layer PCB to test
each pin of contactor using 4 trace, where 2 trace will
provide constant 25mA current supply using (Force +)
and (Force -) where else another 2 trace used for
(Sense+) and (Sense-) to measure the voltage drop across
each pair of contactor pin and let the microprocessor to
compute the impedance by dividing the sense voltage with
force current according to the Equation 5.
Z = V sense / I force (5)
The tester is proposed to design using Motorola
MC68020 32-bit Embedded Microprocessor, which
enables the tester to measure the impedance of every each
contactor pins simultaneously using preprogrammed
algorithm. The microprocessor also automates the test
process and sends the impedance measurement to the host
PC via USB cable as shown in Figure 7.
Figure 7: Impedance measurement processor circuit
5. The Daisy-Chain device is also recognized as shorting
device which made out of gold used to short all the
contactor pins to enable the microprocessor to test each
pair of pins in sequence as shown in Figure 8. Besides that
the tester will be using 4-Wire Reference Point for each
pin of the socket to implement the Kelvin sensing
approach for better impedance measurement.
Figure 8: Daisy-Chain configuration circuit for impedance measurement
The tester’s electronics design in Figure 7 and Figure 8
able to successfully measure the impedance and send the
impedance measurement result to PC and the software
plays an important role to organize and display the test
result qualitatively and quantitatively using specific
software as shown in Figure 9. The software design will
be discussed in details on Section 4.2.
Figure 9: Complete Impedance Tester setup
B. Software Design
The test result displayed on PC using software designed
specifically to represent the test results qualitatively and
quantitatively with simple user-friendly GUI as shown in
Figure 8. The software proposed to be developed using
Visual C++ and Lab VIEW. The software enables the user
to locate the faulty contactor pins visibly and by using
colour indication and provide the user with the averaged
impedance value of specific contactor pin. Red colour
indicates that the contactor pin might be open circuit or
short circuit where else the green colour indicates good
pins.
6. The software also allows the user to define the
impedance level manually to enables it to filter which pins
fails and which pin have acceptable impedance range. The
software GUI layout will look similar to Figure 8. The
software also enables user to save previous test result and
compare the new result to identify which pins impedance
have increased and might cause failure in future.
Figure 10: Expected Output Display
V. CONCLUSION
This paper proposed an effective method of identifying
faulty contactor socket pins using impedance
measurement technique to improvise the commonly
practiced test methods available in the semiconductor
industry. This impedance measurement method also
improvise the existing contact resistance tester that
available in the market to a better overall solution for
identifying the faulty contactor pin in semiconductor
packaged device testing to reduce inefficient debugging
time.
Besides saving debugging time, this proposed method
also able to diagnose the end-life of the contactor pin
earlier and avoid debugging down time, increase the
effectiveness and efficiency of DUT testing and assure the
reliability of characterization result.
Accurate identification of defective contactor pins, help
reduces 50% of contactor replacement cost by changing
only identified faulty pins. This testing method also saves
75% of debugging time if an engineer require
approximately 2 hours to debug a contactor issue but with
this tester they could able to identify which pin is faulty
and identify whether the faulty pin will affect their test
within 30 minutes only.
This contact impedance tester can be further improvised
by adding more measurement features besides impedance
and reduce the tester hardware size.
VI. ACKNOWLEDGEMENT
We would like to express our greatest gratitude to all the
people who have helped & supported us throughout our
research and in completing this paper. A special thank
goes to Hong Hai Teh and Ah Kah who helped us in our
experiments. At last but not least we want to thank our
friends who appreciated our work and motivated us and
finally to God who made all the things possible.
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