Gordon W. Roberts
Electrical Engineering, University of Toronto, Toronto (Ph.D)
Professor of Electrical and Computer
Engineering Dept., McGill University,
Toronto, Montreal, Canada (1989-present)
Electrical and electronics engineering professionalsHoopeer Hoopeer
Paul R. Gray, David A. Hodges, Robert G. Meyer, Andreas Antoniou, Gabor C. Temes, Christian C. Enz, Eric A. Vittoz, François Krummenacher, George S. Moschytz
This is a standard for synchronized phasor measurement systems in substations. It addresses synchronization of data
sampling, data-to-phasor conversions, and formats for timing input and phasor data output from a Phasor
Measurement Unit (PMU). It does not specify response time, accuracy, hardware, software, or a process for computing
phasors.
David A. Johns
Electrical and Computer Engineering Department, University of Toronto,
State-space filters based on LC ladder simulation
Analog and digital state-space adaptive IIR filters
Ph.D. Advisor: Adel S. Sedra and W. Martin Snelgrove
D. A. Johns and K. W. Martin, Analog Integrated Circuit Design, Wiley, New York, NY, N.Y., 1997.
Gene's law, Common gate, kernel Principal Component Analysis, ASIC Physical Design Post-Layout Verification, TSMC180nm, 0.13um IBM CMOS technology, Cadence Virtuoso, FPAA, in Spanish, Bruun E,
Electrical and electronics engineering professionalsHoopeer Hoopeer
Paul R. Gray, David A. Hodges, Robert G. Meyer, Andreas Antoniou, Gabor C. Temes, Christian C. Enz, Eric A. Vittoz, François Krummenacher, George S. Moschytz
This is a standard for synchronized phasor measurement systems in substations. It addresses synchronization of data
sampling, data-to-phasor conversions, and formats for timing input and phasor data output from a Phasor
Measurement Unit (PMU). It does not specify response time, accuracy, hardware, software, or a process for computing
phasors.
David A. Johns
Electrical and Computer Engineering Department, University of Toronto,
State-space filters based on LC ladder simulation
Analog and digital state-space adaptive IIR filters
Ph.D. Advisor: Adel S. Sedra and W. Martin Snelgrove
D. A. Johns and K. W. Martin, Analog Integrated Circuit Design, Wiley, New York, NY, N.Y., 1997.
Gene's law, Common gate, kernel Principal Component Analysis, ASIC Physical Design Post-Layout Verification, TSMC180nm, 0.13um IBM CMOS technology, Cadence Virtuoso, FPAA, in Spanish, Bruun E,
Lab 2: Cadence Tutorial on Layout and DRC/LVS/PEX
This section describes how to extract a netlist from your layout that includes parasitic resistances and capacitances. You will then be able to re-simulate your design with extracted parasitics in Spectre. PEX requires a clean LVS so that extracted parasitics can be correlated to nets on the schematic. Initiate the PEX interface by clicking on:Calibre > Run PEX
A window asking to load a runset file will now appear. Browse to the file
Step by step process of uploading presentation videos Hoopeer Hoopeer
Deep neural network, compressive sensing, floating gate techniques can be efficiently employed to increase voltage swing and reduce supply voltage requirements of class AB regulated cascode current mirrors, implement extreme low power analog circuits with this process. /also have good references for subthreshold region.
[Extreme Low Power Differential Pair: An Experimental Evaluation, Super-Gain-Boosted Miller Op-Amp based on Nested Regulated Cascode Techniques , Step by Step process of uploading presentation videos, Dennis Ritchie The creator of the C programming language and co-creator of Unix
Influential and powerful professional electrical and electronics engineering ...Hoopeer Hoopeer
powerful professional electrical and electronics engineering books
. Analysis and Design of Analog Integrated Circuits
Analysis and Design of Analog Integrated Circuits
Analog filter design
BJT and MOS, Advanced Circuit Topologies, concept of tracking, mm-Wave frequency beyond 30GHz, Bandgap is a stable, well defined, and constant current source
HEAP SORT ILLUSTRATED WITH HEAPIFY, BUILD HEAP FOR DYNAMIC ARRAYS.
Heap sort is a comparison-based sorting technique based on Binary Heap data structure. It is similar to the selection sort where we first find the minimum element and place the minimum element at the beginning. Repeat the same process for the remaining elements.
NUMERICAL SIMULATIONS OF HEAT AND MASS TRANSFER IN CONDENSING HEAT EXCHANGERS...ssuser7dcef0
Power plants release a large amount of water vapor into the
atmosphere through the stack. The flue gas can be a potential
source for obtaining much needed cooling water for a power
plant. If a power plant could recover and reuse a portion of this
moisture, it could reduce its total cooling water intake
requirement. One of the most practical way to recover water
from flue gas is to use a condensing heat exchanger. The power
plant could also recover latent heat due to condensation as well
as sensible heat due to lowering the flue gas exit temperature.
Additionally, harmful acids released from the stack can be
reduced in a condensing heat exchanger by acid condensation. reduced in a condensing heat exchanger by acid condensation.
Condensation of vapors in flue gas is a complicated
phenomenon since heat and mass transfer of water vapor and
various acids simultaneously occur in the presence of noncondensable
gases such as nitrogen and oxygen. Design of a
condenser depends on the knowledge and understanding of the
heat and mass transfer processes. A computer program for
numerical simulations of water (H2O) and sulfuric acid (H2SO4)
condensation in a flue gas condensing heat exchanger was
developed using MATLAB. Governing equations based on
mass and energy balances for the system were derived to
predict variables such as flue gas exit temperature, cooling
water outlet temperature, mole fraction and condensation rates
of water and sulfuric acid vapors. The equations were solved
using an iterative solution technique with calculations of heat
and mass transfer coefficients and physical properties.
We have compiled the most important slides from each speaker's presentation. This year’s compilation, available for free, captures the key insights and contributions shared during the DfMAy 2024 conference.
KuberTENes Birthday Bash Guadalajara - K8sGPT first impressionsVictor Morales
K8sGPT is a tool that analyzes and diagnoses Kubernetes clusters. This presentation was used to share the requirements and dependencies to deploy K8sGPT in a local environment.
Water billing management system project report.pdfKamal Acharya
Our project entitled “Water Billing Management System” aims is to generate Water bill with all the charges and penalty. Manual system that is employed is extremely laborious and quite inadequate. It only makes the process more difficult and hard.
The aim of our project is to develop a system that is meant to partially computerize the work performed in the Water Board like generating monthly Water bill, record of consuming unit of water, store record of the customer and previous unpaid record.
We used HTML/PHP as front end and MYSQL as back end for developing our project. HTML is primarily a visual design environment. We can create a android application by designing the form and that make up the user interface. Adding android application code to the form and the objects such as buttons and text boxes on them and adding any required support code in additional modular.
MySQL is free open source database that facilitates the effective management of the databases by connecting them to the software. It is a stable ,reliable and the powerful solution with the advanced features and advantages which are as follows: Data Security.MySQL is free open source database that facilitates the effective management of the databases by connecting them to the software.
An Approach to Detecting Writing Styles Based on Clustering Techniquesambekarshweta25
An Approach to Detecting Writing Styles Based on Clustering Techniques
Authors:
-Devkinandan Jagtap
-Shweta Ambekar
-Harshit Singh
-Nakul Sharma (Assistant Professor)
Institution:
VIIT Pune, India
Abstract:
This paper proposes a system to differentiate between human-generated and AI-generated texts using stylometric analysis. The system analyzes text files and classifies writing styles by employing various clustering algorithms, such as k-means, k-means++, hierarchical, and DBSCAN. The effectiveness of these algorithms is measured using silhouette scores. The system successfully identifies distinct writing styles within documents, demonstrating its potential for plagiarism detection.
Introduction:
Stylometry, the study of linguistic and structural features in texts, is used for tasks like plagiarism detection, genre separation, and author verification. This paper leverages stylometric analysis to identify different writing styles and improve plagiarism detection methods.
Methodology:
The system includes data collection, preprocessing, feature extraction, dimensional reduction, machine learning models for clustering, and performance comparison using silhouette scores. Feature extraction focuses on lexical features, vocabulary richness, and readability scores. The study uses a small dataset of texts from various authors and employs algorithms like k-means, k-means++, hierarchical clustering, and DBSCAN for clustering.
Results:
Experiments show that the system effectively identifies writing styles, with silhouette scores indicating reasonable to strong clustering when k=2. As the number of clusters increases, the silhouette scores decrease, indicating a drop in accuracy. K-means and k-means++ perform similarly, while hierarchical clustering is less optimized.
Conclusion and Future Work:
The system works well for distinguishing writing styles with two clusters but becomes less accurate as the number of clusters increases. Future research could focus on adding more parameters and optimizing the methodology to improve accuracy with higher cluster values. This system can enhance existing plagiarism detection tools, especially in academic settings.
Sachpazis:Terzaghi Bearing Capacity Estimation in simple terms with Calculati...Dr.Costas Sachpazis
Terzaghi's soil bearing capacity theory, developed by Karl Terzaghi, is a fundamental principle in geotechnical engineering used to determine the bearing capacity of shallow foundations. This theory provides a method to calculate the ultimate bearing capacity of soil, which is the maximum load per unit area that the soil can support without undergoing shear failure. The Calculation HTML Code included.
Industrial Training at Shahjalal Fertilizer Company Limited (SFCL)MdTanvirMahtab2
This presentation is about the working procedure of Shahjalal Fertilizer Company Limited (SFCL). A Govt. owned Company of Bangladesh Chemical Industries Corporation under Ministry of Industries.
6th International Conference on Machine Learning & Applications (CMLA 2024)ClaraZara1
6th International Conference on Machine Learning & Applications (CMLA 2024) will provide an excellent international forum for sharing knowledge and results in theory, methodology and applications of on Machine Learning & Applications.
Hierarchical Digital Twin of a Naval Power SystemKerry Sado
A hierarchical digital twin of a Naval DC power system has been developed and experimentally verified. Similar to other state-of-the-art digital twins, this technology creates a digital replica of the physical system executed in real-time or faster, which can modify hardware controls. However, its advantage stems from distributing computational efforts by utilizing a hierarchical structure composed of lower-level digital twin blocks and a higher-level system digital twin. Each digital twin block is associated with a physical subsystem of the hardware and communicates with a singular system digital twin, which creates a system-level response. By extracting information from each level of the hierarchy, power system controls of the hardware were reconfigured autonomously. This hierarchical digital twin development offers several advantages over other digital twins, particularly in the field of naval power systems. The hierarchical structure allows for greater computational efficiency and scalability while the ability to autonomously reconfigure hardware controls offers increased flexibility and responsiveness. The hierarchical decomposition and models utilized were well aligned with the physical twin, as indicated by the maximum deviations between the developed digital twin hierarchy and the hardware.
Using recycled concrete aggregates (RCA) for pavements is crucial to achieving sustainability. Implementing RCA for new pavement can minimize carbon footprint, conserve natural resources, reduce harmful emissions, and lower life cycle costs. Compared to natural aggregate (NA), RCA pavement has fewer comprehensive studies and sustainability assessments.
Recycled Concrete Aggregate in Construction Part III
Gordon W. Roberts
1. Gordon W. Roberts
November 3rd, 1959
Toronto, Canada
Canadian
Ph.D., Electrical Engineering,
University of Toronto, Toronto, ON,
Canada, 1989, Advisor: Adel S. Sedra.
M.Sc., Electrical Engineering,
University of Toronto, Toronto, ON,
Canada, 1986, Advisor: Adel S. Sedra.
B.Sc., Electrical Engineering,
University of Waterloo, Waterloo, ON,
Canada, 1983.
Professor of Electrical and Computer
Engineering Dept., McGill University,
Toronto, Montreal, Canada (1989-present)
http://www.ece.mcgill.ca/~grober4/RO
BERTS/Welcome.html
Google Scholar (1986-present)
IEEE Author (1986-present)
(S’84-M’85-F’04)
ResearchGate
Research Areas:
CMOS Integrated
Circuits
Microelectronics
Delta-Sigma
Modulation
Delay Lock Loop
Analog Processing
Circuits
Switched-Capacitor
Filters
2. G. W. Roberts, F. Taenzler
and M. Burns, An
Introduction to Mixed-
Signal IC Test and
Measurement, 2nd Ed.,
Oxford University Press,
New York, USA 2011,
October 2011.
M. Burns and G. W.
Roberts, An Introduction
to Mixed-Signal IC Test
and Measurement, Oxford
University Press, New
York, USA 2000.
G. W. Roberts and A. S.
Sedra, Spice For
Microelectronic Circuits,
3rd ed., Oxford University
Press, 1995.
3. G. W. Roberts and A. S.
Sedra, Spice For
Microelectronic Circuits,
Saunders College
Publishing, Philadelphia,
USA, 1992,
G. W. Roberts and V.
W. Leung, Design and
Analysis of Log-
Domain Filter
Circuits, Kluwer
Academic Publishers,
Norwell, MA, USA,
1999.
G. W. Roberts and A.
K. Lu, Analog Signal
Generation For Built-
In Self-Test Of Mixed-
Signal Integrated
Circuits, Kluwer
Academic Publishers,
Norwell, MA, USA,
1994.
4. B. Dufort and G. W.
Roberts, Analog Test
Signal Generation Using
Periodic Sigma-Delta-
Encoded Data Streams,
Kluwer Academic
Publishers, Norwell, MA,
USA, 2000.
5. Teaching:
1. Education Award, bourse
d’enseignment en genie, Ministére
do l’Éducation, du Loisir et du
Sport, Quebec Government, 2009-
2018.
2. Principal's Prize for Excellence
in Teaching, University-Wide
Teaching Award, McGill
University, 2001.
3. Departmental Teacher Award,
Department of Electrical
Engineering, McGill University,
1994/95.
4. Outstanding Departmental
Teacher Award, Department of
Electrical Engineering, McGill
University, 1993/94.
5. Engineering Class of 51' Award
for Outstanding Teaching, Faculty
of Engineering, McGill
University, 1992/93.
6. Overall Best Teacher Award,
Department of Electrical
Engineering, McGill University,
1992/93.
7.Teaching Assistant Award,
Department of Electrical
Engineering, University of
Toronto, 1988/89.
6. Leadership Awards Or Recognition:
1. Outstanding Contribution Award, IEEE
Philadelphia Section, 2015.
2. Meritorious Service Award, IEEE
International Test Conference, 2014
3. Meritorious Service Award, IEEE
Computer Society, 2010
4. Continuing Service Award, IEEE
Computer Society, 2006
5. Certificate of Appreciation, IEEE
Computer Society, 2005.
6. Outstanding Contribution Award, IEEE
Computer Society, 2004.
7. Golden Core Member, IEEE Computer
Society, 2004.
8. Certificate of Appreciation, Area Editor,
IEEE Design & Test Magazine, 2002.
9. Certificate of Appreciation, IEEE
Computer Society, 2001.
10. Certificate of Appreciation, Associate
Editor, IEEE Circuits and Circuits Society,
1997.
11. Certificate of Appreciation, Board
Member, IEEE Circuits and Circuits
Society, 1996.
7. Granted Patents:
1.G. W. Roberts and C. Tam, Method and Device For Use In DC Parametric Tests, US Patent #6,727,834, McGill University, Filed:
May 1, 2003, Granted: April 27, 2004.
2.G. W. Roberts and A. Chan, Timing Measurement Device Using A Component-Invariant Vernier Delay Line,” US Patent #6,850,051,
McGill University, Filed: March 26, 2002, Granted: Feb. 1, 2005.
3.G. W. Roberts, and M. Hafed, Integrated Excitation/Extraction System for Analog Test and Measurement, US Patent 6,931,579,
McGill University, Filed: April 28, 2000, Granted: Aug. 16, 2005.
4.G. W. Roberts, S. Laberge, M. Hafed, Programmable DC Voltage Generator, US Patent 6,914,548, McGill University, Filed: April
28, 2000, Granted: July 5, 2005.
5.D. Rolston, D. V. Plant and G. W. Roberts, Method and Apparatus for Distributing Synchronous Clocking, US Patent #7,035,269,
McGill University, Filed: March 14, 2002, Granted: April 25, 2006.
6.G. W. Roberts, A. Chan, G. Duerden, M. Hafed, S. Laberge, B. Pishdad and C. Tam, “System and Method for Testing Integrated
Circuits, US patent #7,242,209, DFT Microsystems, Inc., Filed: May 3, 2004, Granted: Jul 10, 2007.
7.M. Hafed, G. Duerden, G. W. Roberts, “System Method For Generating A Jittered Test Signal,” US Patent #7,315,574, DFT
Microsystems, Inc., Filed: April 26, 2005, Granted: Jan. 1, 2008.
8.G. W. Roberts, M. Safi-Harb and M. Oulmane, "A Novel Technique for Characterizing Rise/Fall Times for High Speed Digital
Circuits and Analog Slew Rates.” US Patent #7,474,974, Filed: Jan. 31, 2007, Granted: Jan 6, 2009.
9.R. Abhari, G. W. Roberts, N. Smith and A. Suntives, "A high speed band pass serial data link," US Patent #8,258,892, Filed: Feb 19,
2008, Granted: Sep. 4, 2012.
10.G. W. Roberts and S. Aouini, "A Predictable Robust Fully Programmable Analog Gaussian Noise Generator" US Patent #8,849,882,
Filed: Oct. 30, 2008, Granted: Sept. 30, 2014.
11.G. W. Roberts and S. Aouini, “Method and Device for Frequency Synthesis Using Sigma Delta Modulation Techniques” US Patent
#8,855,215, Filed: May 9, 2011, Granted: Oct. 7, 2014.
12.G. W. Roberts and M. Ali Bakhshian, “Digital Storage, Addition and Subtraction of Time-Mode Variables,” US Patent #8,933,742
Filed: on May 10, 2011, Granted: Jan. 13, 2015.
13.J. Saari, N. Quitoriano, J. Forbes and G. Roberts, "Sensor Systems And Methods For Analyte Detection," US Patent No.
#20160084705 Filed: on September 22, 2014, Granted: Mar 24, 2016
14.P. Kambhampati, J. Saari, N. Quitoriano, J. Forbes and G. Roberts, “Systems For Detecting Target Chemicals And Methods For
Their Preparation And Use,” US Patent No. # 20160084810 Filed: on September 22, 2014, Granted: Mar 24, 2016.
15.J. Saari, J. Forbes, N. Quitoriano and G. Roberts, "Chemical Sensor That Are Adaptable to Mobile Devices," Canada Patent No.
#869313 Filed: on July 18, 2013, Granted: June 13, 2017.
16.S. Aouini, A. Emara, G. W. Roberts, M. Parvizi and N. Ben-Hamida, “Extremely-fine resolution sub-ranging current mode Digital-
Analog-Converter using Sigma-Delta modulators,” US Patent No. 10,425,099. Filed: Nov 28, 2018. Granted: Sept. 24, 2019.
8. G. W. Roberts and A. S. Sedra, "All current-mode frequency selective circuits,"
Electronics Letters, Vol. 25, No. 12, pp. 759-761, June 1989.
G. W. Roberts, W. M. Snelgrove and A.S. Sedra, "Switched-capacitor realization of Nth
order transfer function using a single multiplexed op-amp," IEEE Trans. on Circuits and
Systems, vol. CAS-34, pp. 140-148, Feb. 1987.
G. W. Roberts, D. G. Nairn and A. S. Sedra, "On the implementation of fully-
differential switched-capacitor ladder filters," IEEE Trans. on Circuits and Systems,
vol. CAS-33, pp. 452-455, April 1986.
O. Abdelfattah, High-Frequency Synthesis
using Phase-Locked Loops for Wide Tuning-
Range Application and Sub-1 V Operation in
Deep Submicron CMOS Processes, Ph. D.
Thesis, McGill University, Dec. 2015.
Ph.D. Student