The document outlines the design and simulation of a finite state machine-based vending machine using Verilog HDL in Xilinx Vivado. It details the functional and non-functional requirements, modular design, implementation steps, and validation metrics in order to ensure accurate operations such as coin processing, item selection, and change dispensing. The project aims to validate its objectives through comprehensive simulations and provides insights for future enhancements.

1. Finite State Machine-
Based Vending Machine
TEAM MEMBERS :-
DHRUVA SUDEEP S (1NT22EC049)
BHUMIKA K S (1NT22EC035)
H R NANDINI (1NT22EC057)

2. Finite State Machine-
Based Vending Machine
This presentation will outline the design and simulation of a
vending machine using Verilog HDL in Xilinx Vivado. The project
focuses on creating a virtual vending machine, emphasizing
simulation and testbench development to validate its
functionality.

3. Project Scope and Requirements
Functional Requirements
• Accept coins of denominations 1, 5, and 10.
• Enable item selection and balance check.
• Dispense selected items and provide change.
• Indicate errors like insufficient balance or invalid input.
Non-functional Requirements
• Reliable state transitions using an FSM.
• Accurate simulation results.

4. Modular Design Approach
1 FSM Modeling
The vending machine's
behavior is modeled
using an FSM to
manage state
transitions.
2 Functional Modules
The design is broken
down into functional
modules for coin
processing, item
selection, and change
dispensing.
3 Simulation and Testbenches
Simulations and testbenches are used to validate the
behavior under different scenarios.

5. Tools and Technologies
Xilinx Vivado
Used for coding, synthesizing, and simulating Verilog HDL.
Verilog HDL
Used for describing the digital design.
Finite State Machine (FSM)
Used for controlling the vending machine's operations.

6. Finite State Machine Design
1
IDLE
The initial state, waiting for user input.
2 COIN ACCEPTED
Processes the coin insertion and updates the balance.
3
CHECK BALANCE
Determines if enough balance is available for item selection.
4 DISPENSE ITEM
Dispenses the selected item if sufficient balance is available.
5
DISPENSE CHANGE
Returns change to the user after a successful purchase.
6 ERROR
Indicates insufficient balance or invalid input.

7. Module Design
Coin Processor
Updates the balance based
on coin input.
Item Selector
Determines item validity
and price.
Change Calculator
Computes change to be
returned.
Controller
Implements the FSM and
coordinates the modules.

8. Implementation Steps
1 Requirement Gathering
2 FSM Design
3 Coding
4 Integration
5 Simulation Setup

9. Testing and Validation
Testbench Development
Generate clock ('clk') and reset ('reset') signals.
Test Scenarios
Apply coin insertion, item selection, and error scenarios.
Validation Metrics
Check state transitions, outputs, and error handling.

10. Data Analysis
1
State Changes
Verify state changes for different inputs.
2
Output Consistency
Check outputs for consistency with expected behavior.
3
Discrepancies
Document and debug any inconsistencies.

11. Summary and Next Steps
This project demonstrates a modular approach to designing and simulating a vending machine using Verilog in Xilinx Vivado.
Simulation results will validate the project's objectives and provide insights for further improvements.