Clock relationships
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CLK1 and CLK2 refer to two clocks in a design. Logically exclusive clocks can be generated from the same source clock but divided or gated differently, allowing them to co-exist in a design with some defined phase relationship and potential setup/hold violations during timing analysis windows. Asynchronous clocks come from different sources and have no defined phase relationship but require signal integrity analysis due to their infinite window overlap.
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A SYSTEMATIC RISK ASSESSMENT APPROACH FOR SECURING THE SMART IRRIGATION SYSTEMS
Clock relationships
- 1. CLK1 CLK2 CLOCK RELATIONSHIPS AND DEFINITIONS Source of 2 clocks Can they co-exist in the design Phase relationship SI consideration SI window overlap for timing analysis Physically Exclusive Clocks Can be the same (Same port but functional clock and test clock e.g.) NO NO relationship (don’t co-exist) NO SI consideration NO SI window overlap Asynchronous Clocks Different (Different PLLs) YES NO relationship YES Infinite window overlap Logically Exclusive Clocks Can be the same (Divided and gated clocks) YES Can have some relationship YES Arrival Windows overlap Design