smallpt: Global Illumination in 99 lines of C++鍾誠 陳鍾誠
This document summarizes Kevin Beason's smallpt, a 99 line path tracer written in C++. It begins with an overview of global illumination and path tracing. It then walks through the key parts of smallpt, including ray and vector classes, sphere intersections, scene description, camera setup, the rendering equation, path tracing algorithm, and functions for diffuse reflection, specular reflection, refraction, and more. The document provides explanations of the algorithms and math concepts used in smallpt.
This document discusses the history and development of computer architecture from early machines like Babbage's Analytical Engine to the modern von Neumann architecture. It then describes the specific architecture of the Hack computer being built, including its instruction memory, data memory divided into areas for general data, screen, and keyboard, and the CPU that fetches and executes instructions. The goal is to build this computer from basic logic gates and chips following the levels of abstraction presented.
The document discusses machine language and its relationship to hardware and software. Machine language can be viewed as a programmer-oriented abstraction of the hardware platform that allows manipulating memory using a processor and registers. It has both binary and symbolic representations. The Hack computer is presented as an example machine with a 16-bit instruction set consisting of A-instructions to set registers and C-instructions to perform arithmetic and logical operations. Examples are provided of coding common programming constructs like conditionals and loops in the Hack machine language.
This document discusses sequential logic and how it differs from combinational logic. Sequential logic operates on both data and a clock signal, allowing it to store state information. It presents a hierarchy of memory elements starting with flip-flops, then binary cells, registers, RAM, and counters. Registers and RAM are built from arrays of flip-flops. Counters store and increment a value over time. All sequential chips use flip-flops and a clock to synchronize state changes.
The document discusses Boolean arithmetic and building basic computing components like adders and arithmetic logic units (ALUs) using logic gates. It introduces binary number representation and addition, as well as representing negative numbers. Half adders and full adders are presented as the basic building blocks for adding bits and numbers. An n-bit adder can add two n-bit numbers by chaining together full adders. The ALU is designed to perform basic arithmetic and logical operations on inputs based on control bits, and is a key component in central processing units. The document provides a high-level overview of representing and performing arithmetic at the digital circuit level.
The document discusses Boolean logic and functions. It introduces Boolean algebra and some basic Boolean functions like AND, OR, and NOT. It explains that every Boolean function can be expressed using only AND, OR, and NOT. The document then discusses implementing Boolean functions using logic gates like NAND gates. It provides an example of building an AND gate from NAND gates. Finally, it discusses a hardware simulator that can be used to test HDL programs implementing Boolean functions and logic gates.
This document discusses Boolean arithmetic and the design of an adder chip. It explains how half adders and full adders can be used to build an n-bit adder to add two binary numbers. The document also introduces the arithmetic logic unit (ALU) and how it can perform operations like addition, subtraction, AND, and OR using control bits and the logic of half and full adders. The ALU is a key component of the central processing unit (CPU) that allows computers to perform arithmetic and logical operations on data.
The document introduces the Nand2Tetris course which builds a modern computer from first principles. It starts with basic logic gates and progresses all the way to a high-level language. The course uses an abstraction-implementation paradigm, with each level providing abstract interfaces for the next. It covers topics like Boolean logic, machine language, assembly language, virtual machine implementation, compilers, and an operating system. The goal is to help students understand how computing systems work "under the hood".
16. 指令 CALL [0x30] 的執行過程
(1) PC=PC + 4; 在指令擷取之後 PC 從 28 變為 2C。
(2) LR = PC; 將 PC 存入到連結暫存器 LR 中。
(3) PC=PC + 30 記憶體
=CALL [0x30]2B 00 00 30
ALU
(加法運算)
暫存器
IR = 2B 00 00 30
(CALL [0x30])
PC = 00 00 00 2C
00 00 00 5C
(3)
LR = 00 00 00 2C
(2)
(1) 0028
002C
005C
圖 3.1 指令CALL [0x30] 的執行過程
17. 指令 RET 的執行過程
記憶體
0028 CALL [0x30]2B 00 00 30
PC=0070
ALU
(加法器…) 暫存器
IR = 2C 00 00 00
(RET)
PC =00 00 00 70
LR = 00 00 00 2C
將 LR 放回 PC
2C 00 00 00
PC=002C …
RET
…
圖 3.2 指令RET 的執行過程
18. 多層次的副程式呼叫
參數的傳遞方法– 使用堆疊
避免上下層函數用到同一個暫存器,所產生的覆蓋現象。
將 LR 儲存到堆疊中,以免在下一層 CALL 返回位址被覆蓋掉。
f1:
POP R2 取得堆疊中的參數
PUSH LR 保存 LR
ST R2, t
LD R3, pt
PUSH R3
CALL f2
ST R1, b
ADD R1, R1, R1
POP LR 恢復 LR
RET 返回
t: RESW 1
b: RESW 1
pt: WORD t
int f1(int t)
{
int b = f2(&t);
return b+b;
}
範例 3.12 的片段
32. 3.5 實務案例:IA32 的組合語言
IA32 是目前 IBM PC 上最常用的處理器
IBM PC 的組合語言相當複雜,尤其是輸出入部分
使用 BIOS 中斷進行輸出入
使用 DOS 中斷呼叫進行輸出入
使用 Windows 系統呼叫進行輸出入
為了避開輸出入的問題,在本節中, 我們將採用
C 與組合語言連結的方式
33. IA32 的組譯器
在 IA32 處理器上, 目前常見的組譯器有
微軟的 MASM (採用 Intel 語法)
GNU 的 as 或 gcc (採用 AT&T 語法)
開放原始碼的 NASM (採用 Intel 語法)
在本節中,我們將使用 GNU 的 gcc 為開發工具
您可以選用
Dev C++ 中的 gcc – (Dev C++ 為本書的主要示範平台)
Cygwin 中的 gcc
Linux 平台中的 gcc