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BIRLA INSTITUTE OF TECHNOLOGY & SCIENCE, PILANI, HYDERABAD CAMPUS
                                 INSTRUCTION DIVISION
                                First SEMESTER 2012 - 2013
                               COURSE HANDOUT (PART II)
                                                                              Date: 03/08/2012

In addition to Part I (General Handout for all courses appended to the timetable) this portion gives
further specific details regarding the course.

Course No                : EEE C415
Course Title             : Digital Signal Processing
Instructor-in-charge     : Prabhakara Rao
Instructors : Dr. S.K. Sahoo

1. Course Description:

    This course deals with the design of analog filters like Butterworth, Chebyshev, Elliptic.,
digital filter design for both IIR & FIR filters. Different filter structures for the realization of
digital filters will be discussed. Finite word length effects and Multirate DSP will be introduced.
DSP Processor architecture and implementation of DSP algorithms will be part of the course,
which will be emphasized upon.

2. Scope and Objective:

    The course aims at enumerating the theoretical and practical aspects of modern signal
processing in digital environment. It also aims at discussing application areas with particular
stress on speech and image data.

3. Text Book:
T 1: “Digital Signal Processing”, Sanjit K Mitra, TMH, Third Ed., 2006.
T 2: Digital Signal Processing Tripathi, Shikha and others Notes – EDD, 2007.

4. Reference Books:
    R1: “Digital Signal Processing : Principles, Algorithms and Application”, John G Proakis &
          D G Manolakis, PHI, 1998.
    R2 : “Digital Signal Processing: A Practical Approach, Second Edition”, Emmanuel C.
           Ifeachor and Barrie W. Jervis, Pearson education.
    R3 : “Digital Signal Processing”, Oppenhiem & Schafer, Pearson Education Asia, 2002.
    R4 : “Digital Signal Processors: Architecture, Programming and Applications”, B.
          Venkataramani & M Bhaskar, TMH, 2002.
    R5 : “Digital Signal Processing: Implementations using DSP Microprocessors with examples
           from TMS320C54x”, Avatar Singh & S. Srinivasan, Thomson,Brooks/cole, 2004.
    R6 : TI DSP Processor User Manuals

5. Course Plan:

  Lecture No.         Learning Objectives          Topics to be covered              Reference
       1             Overview of the course               Introduction                 -------
      2, 3          Overview of Programmable       Introduction to DSPs, DSP         R3/R4 / R5
                              DSPs                         arithmetic
      4, 5             DSP Architectures            General DSP architectural        R3/R4 / R5
                                                             aspects
6, 7                 DSP Architectures             Architecture of TMS           R3/R4 / R5
                                                                  320C54x
         8                   Addressing Modes               Addressing Modes             R3/R4 / R5
         9                  Programming DSPs                   Instruction Set           R3/R4 / R5
        10                       Exercises                  Example Programs             R3/R4 / R5
       11,12                Advanced Concepts               Pipelining in C54x           R3/R4 / R5
        13                    Advanced DSPs            Overview of TMS 320C67x           R3/R4 / R5
        14                  Analog filter design            Butterworth filters          4.4.1, 4.4.2
        15                  Analog filter design            Chebyshev filters               4.4.3
        16                  Analog Filter Design        Elliptic & Bessel Filters        4.4.4, 4.4.5
        17                  Analog filter design        Design of HP, BP and BS              4.5
                                                                    filters
        18                       Sampling                  Sampling lowpass &                 4.2, 4.3
                                                             bandpass signals
       19,20                   Digital filters              Representations in                7.1-7.4
                                                            transform domain
       21,22                Digital Filter design         IIR filter design: BLT              9
         23                    Digital Filters           Linear phase FIR filters            7.3
     24, 25,26              Digital Filter design           FIR Filter Design                 10
       27, 28             Digital filter structures     Realization of IIR filters         8.4-8.8
       29, 30             Digital filter structures     Realization of FIR filters         8.3, 8.9
       31, 32           Finite Word-Length Effects           IIR & FIR Filters                12
       33, 34                  Multi rate DSP          Decimators & Interpolators         13.1, 13.2
         35                    Multi rate DSP          Multistage implementation             13.3
         36                    Multi rate DSP          Polyphase implementation              13.4
     37, 38, 39            Multirate filterbanks           Digital filterbanks &              14
                                                            wavelet transform
        40                  Applications of DSP            Various applications                 15


6. Evaluation Scheme:

EC      Evaluation Component        Duration       Weightage      Date, Time & Venue              Nature of
No.                                  (min)           (%)                                         Component
 1                 Test I             60              25                21/09/12                 Open Book
                                                                     12.30-1.30 PM
 2                Test II               60            25                                         Closed Book
                                                                        2/11/2012
                                                                     12.30 - 1.30 PM
 3              Assignments            -----          10       To be announced in the class      Closed Book
 4             Comprehensive           180            40              2/12/2012 AN               Closed Book

7. Chamber Consultation Hours: To be announced in the class.
8. Make-up Policy:
Make Up for any component will be given only in genuine cases. In all cases prior intimation
must be given to IC.
9. Notices: Notices regarding the course will be displayed on the notice board of EEE.


                                                                              Instructor - in - charge
                                                                                      EEE C415

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Eee c415 digital signal processing

  • 1. BIRLA INSTITUTE OF TECHNOLOGY & SCIENCE, PILANI, HYDERABAD CAMPUS INSTRUCTION DIVISION First SEMESTER 2012 - 2013 COURSE HANDOUT (PART II) Date: 03/08/2012 In addition to Part I (General Handout for all courses appended to the timetable) this portion gives further specific details regarding the course. Course No : EEE C415 Course Title : Digital Signal Processing Instructor-in-charge : Prabhakara Rao Instructors : Dr. S.K. Sahoo 1. Course Description: This course deals with the design of analog filters like Butterworth, Chebyshev, Elliptic., digital filter design for both IIR & FIR filters. Different filter structures for the realization of digital filters will be discussed. Finite word length effects and Multirate DSP will be introduced. DSP Processor architecture and implementation of DSP algorithms will be part of the course, which will be emphasized upon. 2. Scope and Objective: The course aims at enumerating the theoretical and practical aspects of modern signal processing in digital environment. It also aims at discussing application areas with particular stress on speech and image data. 3. Text Book: T 1: “Digital Signal Processing”, Sanjit K Mitra, TMH, Third Ed., 2006. T 2: Digital Signal Processing Tripathi, Shikha and others Notes – EDD, 2007. 4. Reference Books: R1: “Digital Signal Processing : Principles, Algorithms and Application”, John G Proakis & D G Manolakis, PHI, 1998. R2 : “Digital Signal Processing: A Practical Approach, Second Edition”, Emmanuel C. Ifeachor and Barrie W. Jervis, Pearson education. R3 : “Digital Signal Processing”, Oppenhiem & Schafer, Pearson Education Asia, 2002. R4 : “Digital Signal Processors: Architecture, Programming and Applications”, B. Venkataramani & M Bhaskar, TMH, 2002. R5 : “Digital Signal Processing: Implementations using DSP Microprocessors with examples from TMS320C54x”, Avatar Singh & S. Srinivasan, Thomson,Brooks/cole, 2004. R6 : TI DSP Processor User Manuals 5. Course Plan: Lecture No. Learning Objectives Topics to be covered Reference 1 Overview of the course Introduction ------- 2, 3 Overview of Programmable Introduction to DSPs, DSP R3/R4 / R5 DSPs arithmetic 4, 5 DSP Architectures General DSP architectural R3/R4 / R5 aspects
  • 2. 6, 7 DSP Architectures Architecture of TMS R3/R4 / R5 320C54x 8 Addressing Modes Addressing Modes R3/R4 / R5 9 Programming DSPs Instruction Set R3/R4 / R5 10 Exercises Example Programs R3/R4 / R5 11,12 Advanced Concepts Pipelining in C54x R3/R4 / R5 13 Advanced DSPs Overview of TMS 320C67x R3/R4 / R5 14 Analog filter design Butterworth filters 4.4.1, 4.4.2 15 Analog filter design Chebyshev filters 4.4.3 16 Analog Filter Design Elliptic & Bessel Filters 4.4.4, 4.4.5 17 Analog filter design Design of HP, BP and BS 4.5 filters 18 Sampling Sampling lowpass & 4.2, 4.3 bandpass signals 19,20 Digital filters Representations in 7.1-7.4 transform domain 21,22 Digital Filter design IIR filter design: BLT 9 23 Digital Filters Linear phase FIR filters 7.3 24, 25,26 Digital Filter design FIR Filter Design 10 27, 28 Digital filter structures Realization of IIR filters 8.4-8.8 29, 30 Digital filter structures Realization of FIR filters 8.3, 8.9 31, 32 Finite Word-Length Effects IIR & FIR Filters 12 33, 34 Multi rate DSP Decimators & Interpolators 13.1, 13.2 35 Multi rate DSP Multistage implementation 13.3 36 Multi rate DSP Polyphase implementation 13.4 37, 38, 39 Multirate filterbanks Digital filterbanks & 14 wavelet transform 40 Applications of DSP Various applications 15 6. Evaluation Scheme: EC Evaluation Component Duration Weightage Date, Time & Venue Nature of No. (min) (%) Component 1 Test I 60 25 21/09/12 Open Book 12.30-1.30 PM 2 Test II 60 25 Closed Book 2/11/2012 12.30 - 1.30 PM 3 Assignments ----- 10 To be announced in the class Closed Book 4 Comprehensive 180 40 2/12/2012 AN Closed Book 7. Chamber Consultation Hours: To be announced in the class. 8. Make-up Policy: Make Up for any component will be given only in genuine cases. In all cases prior intimation must be given to IC. 9. Notices: Notices regarding the course will be displayed on the notice board of EEE. Instructor - in - charge EEE C415