VHDL

1. VHDL:
Functions and Procedures
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2. Subprograms
• FUNCTION
• PROCEDURE
• FUNCTIONs and PROCEDUREs have the same
basic purpose
– store commonly used pieces of code, so they can be
reused and shared
• VHDL allow FUNCTIONs and PROCEDUREs to be
overloaded
pieces of sequential VHDL code
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3. PROCESS and FUNCTION vs. PROCESS
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• FUNCTIONs and PROCEDUREs are mainly intended for
LIBRARY allocation
(although it is possible to locate them in the main code)
• PROCESSes are intended for immediate use in the main
code

4. FUNCTION vs. PROCEDURE
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• FUNCTION
– zero or more input parameters and a single return value
– The input parameters can only be constants (default) or
signals (variables are not allowed)
• PROCEDURE
– Any number of IN, OUT, and INOUT parameters which can
be constants, signals, variables
– The default for OUT and INOUT parameters is variable
• A FUNCTION is called as part of an expression, while a
PROCEDURE is a statement on its own

5. FUNCTION/PROCEDURE location
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6. FUNCTION
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7. FUNCTION: Example
Example of Function body:
The word CONSTANT
can be omitted
do not enter RANGE or
TO/DOWNTO
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8. Examples:
FUNCTION
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Function located
in the main
Function located
in a package

9. PROCEDURE
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10. PROCEDURE: example
Example of PROCEDURE body:
std_logic; SIGNAL b,c: IN std_logic;
std_logic_vector(7 downto 0);
NOT an issue with
PROCEDUREs
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11. STD_LOGIC;
Examples:
PROCEDURE
PROCEDURE located
in the main
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12. talarico@gonzaga.edu 12
STD_LOGIC;
Examples:
PROCEDURE
PROCEDURE located
in a PACKAGE

13. ASSERT
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Example: