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Nainala Vasanthakumar, K.Ramcharan / International Journal of Engineering Research and
                    Applications (IJERA) ISSN: 2248-9622 www.ijera.com
                        Vol. 2, Issue4, July-August 2012, pp.2203-2209

    Power Quality Improvement Using 3 Phase Cascaded H-Bridge
     Multi Level Inverter Under Unbalanced Voltage Conditions
                          Nainala Vasanthakumar 1, K.Ramcharan2
    1 P G Scholor, Department of EEE, BVC Engineering College, Odalarevu ,East Godavari(Dt); A.P, India.
  2Assistant Professor, Department of EEE, BVC Engineering College, Odalarevu ,East Godavari(Dt); A.P, India.


Abstract :
         A Multilevel Inverter(MLI) is a power
electronic device built to synthesize a desired A.C
voltage from several levels of DC voltages. Generally
unbalanced voltages will occur at supply side these
can be eliminated by using Multi level Inverter. In
this paper a closed loop Control system is designed
using PI controller in order to maintain load voltage
constant for under voltage and Over voltage
conditions and MATLAB simulations have been
carried out.
Keywords:- Cascaded H-Bridge Multi Level
Inverter(CHMLI),Power Quality Issues.

I.INTRODUCTION                                                        Fig.1 Conventional three phase 5 level
          Multilevel inverters have gained more                       cascaded MLI
attention in high power applications because it has
got many advantages [1-4]. It can realize high voltage     This paper investigates an approach where the
and high power output by using semiconductor               reference signal is modulated by the carrier wave
switches without the use of transformer and dynamic        resulting in multiple SPWM signals. These signals
voltage balance circuits. When the number of output        are then used to drive the „on‟ / „off‟ switches for
levels increases, harmonic content in the output           each level of the inverter.
voltage and current as well as electromagnetic
interference decreases.                                    II.CONTROL TECHNIQUES FOR
The basic concept of a multilevel inverter is to           MULTILEVEL INVERTER
achieve high power by using a series of power                        There are different control techniques
semiconductor switches with several lower dc               available for a CHB MLI [13, 15]. Among all those
voltage sources to perform the power conversion by         techniques, PWM control technique which produces
synthesizing a staircase voltage waveform [1,5]. To        less total harmonic distortion (THD) values is most
obtain a low distortion output voltage nearly              preferable. In PWM technique, modulated signal can
sinusoidal, a triggering signal should be generated to     be of pure sinusoidal, third harmonic injected signals
control the switching frequency of each power              and dead band signals. The carrier signal is a
semiconductor switch .In this paper the triggering         triangular wave. For generating Triggering pulses to
signals to multi level inverter (MLI) are designed by      MLI, pure sinusoidal wave as modulating signal and
using the Sine Pulse Width Modulation (SPWM)               multi carrier signal which is of triangular in shape
technique. A three phase cascaded H-bridge Multi           have been considered [10, 14, 15]. For a m-level
(five) Level Inverter has been taken. Fig.1 shows a        MLI, (m-1) carrier signals are required.
three-phase five-level cascaded Multi Level Inverter.
It requires a total of six D.C voltage sources.




                                                                                                2203 | P a g e
Nainala Vasanthakumar, K.Ramcharan / International Journal of Engineering Research and
                     Applications (IJERA) ISSN: 2248-9622 www.ijera.com
                         Vol. 2, Issue4, July-August 2012, pp.2203-2209

                                                          (triangular wave)
                                                          Fc =Carrier Frequency, Fr=Reference Frequency




                                                                Fig.3 Classification of Sinusoidal PWM

                                                          Modes of Operation
  Fig.2 Control techniques for a cascaded H-bridge            For generating triggering pulses in Bipolar mode,
                        MLI                               four carrier signals of triangular in nature and one
                                                          sine wave are used. In the case of Unipolar mode of
Sinusoidal PWM                                            operation, two reference sine waves and two carrier
         For generation of triggering pulses to the       signals (level-1)/2 which are triangular in nature are
                                                          used to generate the pulses to MLI[6,15]. For
MLI, carrier signals are constructed for different
                                                          Unipolar mode of operation the formulae has been
modulation indices like APOD, POD, PD, PS and
                                                          changed to Ma= (Am/ ((m-1)/2*Ac),
Hybrid control techniques. Output phase voltage has            Mf= Fc /Fr.
been measured using all the techniques. THD               Phase shifted carrier control technique (PS)
analysis for the PS control techniques in Bipolar         .
mode of operation have been presented in this paper.
Multilevel sinusoidal PWM can be classified as
shown in Fig.3 [14-19].
Multi carrier PWM techniques have sinusoidal signal
as reference wave and triangular as carrier signals [6-
7].
Amplitude
           Modulat
           ion
           Ma=Am/(
           (m-
           1)*Ac).
Frequency modulation
           Mf=FC/Fr                                       Fig.4 Carrier arrangement for Bipolar mode in PS
Here Am =Amplitude of modulating wave                     technique
(sin wave) Ac=Amplitude of carrier wave
                                                                                               2204 | P a g e
Nainala Vasanthakumar, K.Ramcharan / International Journal of Engineering Research and
                    Applications (IJERA) ISSN: 2248-9622 www.ijera.com
                        Vol. 2, Issue4, July-August 2012, pp.2203-2209

For a five level MLI, in PS technique the carrier
signals which are phase shifted by 90 degrees (360/4)
and the reference signal is of sinusoidal is taken and
shown in Fig.4.

III. POWER QUALITY
          Power Quality is the concept of powering
and grounding sensitive equipment in a matter that is
suitable to the operation of that equipment according
to IEEE Std 1100.
Power quality is mainly concerned with deviations of
the voltage from its ideal waveform (voltage quality)
and deviations of the current from its ideal waveform
(current quality).Power quality phenomena can be
divided into two types, they are 1)Variations
2)Events.
Voltage and Current variations are relatively small
deviations of voltage or current characteristics around   Fig.5 Voltage magnitude events as used in IEEE Std.l
their nominal or ideal values. The two basic examples     159-1995
are voltage magnitude and frequency.
Events are phenomena which only happen every once         Under Voltage
in a while. An interruption of the supply voltage                  Under voltages of various duration are
[IEEE Std.1159] is the best-known example.                known under different names. Short duration under
impedance, fault distance, system characteristics         voltages are called ―voltage sags‖ or ―voltage dips‖.
(grounded or ungrounded) and fault resistance. The        Long duration under voltage is normally simply
duration of the sag depends on the time taken by the      referred to as ―under voltage‖. Voltage sag is a
circuit protection to clear the fault. High speed         reduction in the supply voltage magnitude followed
tripping is desired to limit the duration of sags.        by a voltage recovery after a short period of time.
                                                          When a voltage magnitude reduction of finite
Over Voltage                                              duration can actually be called a voltage sag.
         Just like with under voltage, overvoltage
events are given different names based on their                    For the IEEE voltage drop is only a sag if
duration. Over voltages of very short duration, and       the during sag voltage is between 10% and 90% of
high magnitude, are called ―Transient Over                the nominal voltage. Voltage sags are mostly caused
Voltages‖, ―Voltage Spikes,‖ or sometimes ―Voltage        by short circuit faults in the system and by starting of
Surges.‖ Over Voltages with a duration between            large motors.
about 1 cycle and 1 minute. The latter event is more      Voltage sag is generally characterized by depth and
correctly called ―Voltage Swell‖ or temporary power       duration. The depth of the sag depends on the system
frequency overvoltage. ―Longer‖ duration over
voltages are simply referred to as ―Over Voltages.‖
Long and Short over voltages originate from,

lightning strokes, switching operations, sudden load
reduction, single phase short circuits, and
nonlinearities. A resonance between the nonlinear
magnetizing reactance of a transformer and a
capacitance (either in the form of a capacitor bank or
the capacitance of an underground cable) can lead to
a large overvoltage of long duration. This
phenomenon is called Ferro resonance, and it can
lead to serious damage to power system equipment.


                                                          Fig. 6 Closed Loop Block Diagram

                                                                                                2205 | P a g e
Nainala Vasanthakumar, K.Ramcharan / International Journal of Engineering Research and
                     Applications (IJERA) ISSN: 2248-9622 www.ijera.com
                         Vol. 2, Issue4, July-August 2012, pp.2203-2209

In this paper the three phase AC Voltage Supply is
taken directly and is given to three phase controlled
rectifier which converts AC supply to controlled
pulsated DC Voltage and this is given to Low pass
filter. Low pass filter is a device which converts
Pulsated DC voltage to Pure DC Voltage and this
pure DC Voltage is given as a input to Cascaded H-
bridge 5 level Multilevel Inverter and the output of
MLI is given to Load.

In closed loop Control the supply voltages and load
voltages are both compared and error value is given
to PI Controller. Output of PI controller is imposed
on the phase shifted carrier so as to get pulses. These
pulses are given to MLI for each phase. Here we are
using three PI controllers for three phase MLI. The
desired voltage at the load bus is maintained at 1 pu
.To regulate the load-bus voltage, a PI controller is
employed that contains a feedback signal derived
from the voltage at the load bus, V.
Zc = kpe + ki      ,


Kp= Proportional constant, Ki= Integral constant, e =
Error constant

Design of Filter
         Here LC Filter is designed and LC Filter is
the combination of two filters provides a lower ripple
than is possible with either L or C alone. As it is
known, in an inductor filter, ripple increases with RL
but decreases in a capacitor filter. The combination of
L and C filter makes the ripple independent of RL.

                  Here C =


                       VRF =                ,


where VRF is Voltage Ripple Factor

IV.SIMULATION STUDIES




                                                          Fig 9 Output Phase Voltage Waveforms of MLI


                                                                                           2206 | P a g e
Nainala Vasanthakumar, K.Ramcharan / International Journal of Engineering Research and
                          Applications (IJERA) ISSN: 2248-9622 www.ijera.com
                              Vol. 2, Issue4, July-August 2012, pp.2203-2209




 Fig.11 Open loop output voltage(2000V) waveform at rated voltage    Fig.14 Closed loop Simulink diagram of
                                                                            Cascade H-Bridge 5 Level MLI




Fig. 12 Open loop Output Voltage when Under Voltage(1600V)
                    is created
                                                         Fig 15.Closed loop output voltage(2000V) waveform at rated voltage

                                                                                                         2207 | P a g e
Nainala Vasanthakumar, K.Ramcharan / International Journal of Engineering Research and
                          Applications (IJERA) ISSN: 2248-9622 www.ijera.com
                              Vol. 2, Issue4, July-August 2012, pp.2203-2209




Fig. 13 Open loop Output Voltage when Over Voltage(2500V)
is created                                                               Fig. 16 Closed loop Output Voltage when Under Voltage is created


                                                                             S.No              Parameter                  Value
                                                                                     Amplitude Modulation
                                                                               1                                          0.83
                                                                                     Index(Ma)
                                                                               2     Number Of Levels(M)                   5
                                                                                     Reference Wave
                                                                               3                                          2V
                                                                                     Amplitude(Am)
                                                                               4     Frequency                            50Hz
                                                                               5     Carrier Wave Amplitude(Ac)           0.6V
                                                                                     Frequency Modulation
                                                                               6                                           20
                                                                                     Index(Mf)
                                                                                                                         1KHz
                                                                               7     Carrier Frequency(Fc)
                                                                                                                      10%(Assume)
                                                                               8     Voltage Ripple Factor(VRF)

                                                                               9     Filter Capacitor (C)               1054.2µF

               Fig. 17 Closed loop Output Voltage when Over Voltage is        10     Filter Inductance(L)               13.72mH
               created



      V.CONCLUSION
               In this paper three phase cascaded H-Bridge                     2.   ―Multilevelinverters:     A     survey   Of
      multilevel inverter is simulated and observed under                           topologies, controls, and applications‖,
      various unbalanced voltage conditions like Under                              Industrial Electronics, IEEE Transactions,
      Voltage and Over Voltage. In the open loop system                             Vol. 49, issue:4, pp. 724-738, Aug 2002.
      Under Voltage and Over Voltage were introduced at
      the Supply side, and the waveforms of those were                         3.   Holmes, D.G, McGrath, B.P. ―Multicarrier
      observed under unbalanced conditions.                                         PWM strategies for multilevel inverters‖
      In the closed loop system with the help of PI                                 Industrial Electronics, IEEE Transactions,
      Controller the load voltage is maintained constant for                        Vol. 49, issue:4, pp.858-867,Aug 2002.
      unbalanced voltage conditions and these can be                           4.   Yan Deng, Hongyan Wang, Chao Zhang,
      observed from the above simulations.                                          Lei Hu and Xiangning He, ―Multilevel
                                                                                    PWM Methods Based On Control Degrees
      REFERENCES                                                                    Of Freedom Combination And Its
          1.     Fang Zheng Peng,                Jih-Sheng       Lai,               Theoretical Analysis‖, IEEE IAS 2005
                 and Rodriguez J.
                                                                                                                  2208 | P a g e
Nainala Vasanthakumar, K.Ramcharan / International Journal of Engineering Research and
                 Applications (IJERA) ISSN: 2248-9622 www.ijera.com
                     Vol. 2, Issue4, July-August 2012, pp.2203-2209

     Conference record no.:0-7803-9208-6/05,        15. Ge Baoming,and Fang Zheng Peng,‖An
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6.   ―Multilevel     voltage    source-converter    17. Fang Zheng Peng, Jih-Sheng Lai, John W.
     topologies for industrial medium-voltage           McKeever, and James VanCoevering.―A
     drives,‖ IEEE Trans. Ind.Electron., vol. 54,       multilevel voltage-source inverter with
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8.   Power Electronics Handbook, 2nd Edition        18. Alan Joseph, et al. ―A 24-pulse rectifier
     Elsevier, 2007, ISBN 978-0-12- 088479-7,           cascaded multilevel inverter with minimum
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                                                        Fourtieth IAS Annual Meeting ,vol.1, Oct.
9.   Samir Kouro, Student Member, IEEE, Pablo           2005, pp.115-120.
     Lezana, Member, IEEE,Mauricio Angulo,
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     Inverters ‖.                                       Trans.Power     Electronics,    vol.15,no.6,
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10. Panagiotis Panagis, Fotis Stergiopoulos,
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    Manias―Comparison of State of the Art               Cunnyngham, and John N.Chiasson.
    Multilevel Inverters‖. 978-1-4244-1668-             ―Charge balance control schemes for
    4/08/2008 IEEE                                      cascade multilevel converter in hybrid
                                                        electric vehicles,‖ IEEE Trans. Industrial
11. A 5-Level Cascaded Hybrid Multilevel                Electronics,vol. 49, no.5, pp.1058-1064,
    Inverter for Interfacing with Renewable             Oct. 2002.
    Energy Resources‖ Surin Khomfoi1,
    Chatrchai Aimsaard 978-1-4244-3388-
    9/09/2009 IEEE

12. ―Optimized Hybrid Phase Disposition PWM
    Control Method for Multilevel Inverter‖
    C.Govindaraju and Dr.K.Baskaran

13. International Journal of Recent Trends in
    Engineering, Vol 1, No. 3, May 2009 49

14. ―A modular power electronic transformer
    based on a cascaded H-bridge multilevel
    converter‖ H. Iman-Einia,b, Sh. Farhangia,
    J.-L. Schanenb, M. Khakbazan-Fardc H.
    Iman-Eini                               et
    http://www.software995.com/al. / Electric
    Power Systems Research 79 (2009) 1625–
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                                                                                   2209 | P a g e

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Nk2422032209

  • 1. Nainala Vasanthakumar, K.Ramcharan / International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622 www.ijera.com Vol. 2, Issue4, July-August 2012, pp.2203-2209 Power Quality Improvement Using 3 Phase Cascaded H-Bridge Multi Level Inverter Under Unbalanced Voltage Conditions Nainala Vasanthakumar 1, K.Ramcharan2 1 P G Scholor, Department of EEE, BVC Engineering College, Odalarevu ,East Godavari(Dt); A.P, India. 2Assistant Professor, Department of EEE, BVC Engineering College, Odalarevu ,East Godavari(Dt); A.P, India. Abstract : A Multilevel Inverter(MLI) is a power electronic device built to synthesize a desired A.C voltage from several levels of DC voltages. Generally unbalanced voltages will occur at supply side these can be eliminated by using Multi level Inverter. In this paper a closed loop Control system is designed using PI controller in order to maintain load voltage constant for under voltage and Over voltage conditions and MATLAB simulations have been carried out. Keywords:- Cascaded H-Bridge Multi Level Inverter(CHMLI),Power Quality Issues. I.INTRODUCTION Fig.1 Conventional three phase 5 level Multilevel inverters have gained more cascaded MLI attention in high power applications because it has got many advantages [1-4]. It can realize high voltage This paper investigates an approach where the and high power output by using semiconductor reference signal is modulated by the carrier wave switches without the use of transformer and dynamic resulting in multiple SPWM signals. These signals voltage balance circuits. When the number of output are then used to drive the „on‟ / „off‟ switches for levels increases, harmonic content in the output each level of the inverter. voltage and current as well as electromagnetic interference decreases. II.CONTROL TECHNIQUES FOR The basic concept of a multilevel inverter is to MULTILEVEL INVERTER achieve high power by using a series of power There are different control techniques semiconductor switches with several lower dc available for a CHB MLI [13, 15]. Among all those voltage sources to perform the power conversion by techniques, PWM control technique which produces synthesizing a staircase voltage waveform [1,5]. To less total harmonic distortion (THD) values is most obtain a low distortion output voltage nearly preferable. In PWM technique, modulated signal can sinusoidal, a triggering signal should be generated to be of pure sinusoidal, third harmonic injected signals control the switching frequency of each power and dead band signals. The carrier signal is a semiconductor switch .In this paper the triggering triangular wave. For generating Triggering pulses to signals to multi level inverter (MLI) are designed by MLI, pure sinusoidal wave as modulating signal and using the Sine Pulse Width Modulation (SPWM) multi carrier signal which is of triangular in shape technique. A three phase cascaded H-bridge Multi have been considered [10, 14, 15]. For a m-level (five) Level Inverter has been taken. Fig.1 shows a MLI, (m-1) carrier signals are required. three-phase five-level cascaded Multi Level Inverter. It requires a total of six D.C voltage sources. 2203 | P a g e
  • 2. Nainala Vasanthakumar, K.Ramcharan / International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622 www.ijera.com Vol. 2, Issue4, July-August 2012, pp.2203-2209 (triangular wave) Fc =Carrier Frequency, Fr=Reference Frequency Fig.3 Classification of Sinusoidal PWM Modes of Operation Fig.2 Control techniques for a cascaded H-bridge For generating triggering pulses in Bipolar mode, MLI four carrier signals of triangular in nature and one sine wave are used. In the case of Unipolar mode of Sinusoidal PWM operation, two reference sine waves and two carrier For generation of triggering pulses to the signals (level-1)/2 which are triangular in nature are used to generate the pulses to MLI[6,15]. For MLI, carrier signals are constructed for different Unipolar mode of operation the formulae has been modulation indices like APOD, POD, PD, PS and changed to Ma= (Am/ ((m-1)/2*Ac), Hybrid control techniques. Output phase voltage has Mf= Fc /Fr. been measured using all the techniques. THD Phase shifted carrier control technique (PS) analysis for the PS control techniques in Bipolar . mode of operation have been presented in this paper. Multilevel sinusoidal PWM can be classified as shown in Fig.3 [14-19]. Multi carrier PWM techniques have sinusoidal signal as reference wave and triangular as carrier signals [6- 7]. Amplitude Modulat ion Ma=Am/( (m- 1)*Ac). Frequency modulation Mf=FC/Fr Fig.4 Carrier arrangement for Bipolar mode in PS Here Am =Amplitude of modulating wave technique (sin wave) Ac=Amplitude of carrier wave 2204 | P a g e
  • 3. Nainala Vasanthakumar, K.Ramcharan / International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622 www.ijera.com Vol. 2, Issue4, July-August 2012, pp.2203-2209 For a five level MLI, in PS technique the carrier signals which are phase shifted by 90 degrees (360/4) and the reference signal is of sinusoidal is taken and shown in Fig.4. III. POWER QUALITY Power Quality is the concept of powering and grounding sensitive equipment in a matter that is suitable to the operation of that equipment according to IEEE Std 1100. Power quality is mainly concerned with deviations of the voltage from its ideal waveform (voltage quality) and deviations of the current from its ideal waveform (current quality).Power quality phenomena can be divided into two types, they are 1)Variations 2)Events. Voltage and Current variations are relatively small deviations of voltage or current characteristics around Fig.5 Voltage magnitude events as used in IEEE Std.l their nominal or ideal values. The two basic examples 159-1995 are voltage magnitude and frequency. Events are phenomena which only happen every once Under Voltage in a while. An interruption of the supply voltage Under voltages of various duration are [IEEE Std.1159] is the best-known example. known under different names. Short duration under impedance, fault distance, system characteristics voltages are called ―voltage sags‖ or ―voltage dips‖. (grounded or ungrounded) and fault resistance. The Long duration under voltage is normally simply duration of the sag depends on the time taken by the referred to as ―under voltage‖. Voltage sag is a circuit protection to clear the fault. High speed reduction in the supply voltage magnitude followed tripping is desired to limit the duration of sags. by a voltage recovery after a short period of time. When a voltage magnitude reduction of finite Over Voltage duration can actually be called a voltage sag. Just like with under voltage, overvoltage events are given different names based on their For the IEEE voltage drop is only a sag if duration. Over voltages of very short duration, and the during sag voltage is between 10% and 90% of high magnitude, are called ―Transient Over the nominal voltage. Voltage sags are mostly caused Voltages‖, ―Voltage Spikes,‖ or sometimes ―Voltage by short circuit faults in the system and by starting of Surges.‖ Over Voltages with a duration between large motors. about 1 cycle and 1 minute. The latter event is more Voltage sag is generally characterized by depth and correctly called ―Voltage Swell‖ or temporary power duration. The depth of the sag depends on the system frequency overvoltage. ―Longer‖ duration over voltages are simply referred to as ―Over Voltages.‖ Long and Short over voltages originate from, lightning strokes, switching operations, sudden load reduction, single phase short circuits, and nonlinearities. A resonance between the nonlinear magnetizing reactance of a transformer and a capacitance (either in the form of a capacitor bank or the capacitance of an underground cable) can lead to a large overvoltage of long duration. This phenomenon is called Ferro resonance, and it can lead to serious damage to power system equipment. Fig. 6 Closed Loop Block Diagram 2205 | P a g e
  • 4. Nainala Vasanthakumar, K.Ramcharan / International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622 www.ijera.com Vol. 2, Issue4, July-August 2012, pp.2203-2209 In this paper the three phase AC Voltage Supply is taken directly and is given to three phase controlled rectifier which converts AC supply to controlled pulsated DC Voltage and this is given to Low pass filter. Low pass filter is a device which converts Pulsated DC voltage to Pure DC Voltage and this pure DC Voltage is given as a input to Cascaded H- bridge 5 level Multilevel Inverter and the output of MLI is given to Load. In closed loop Control the supply voltages and load voltages are both compared and error value is given to PI Controller. Output of PI controller is imposed on the phase shifted carrier so as to get pulses. These pulses are given to MLI for each phase. Here we are using three PI controllers for three phase MLI. The desired voltage at the load bus is maintained at 1 pu .To regulate the load-bus voltage, a PI controller is employed that contains a feedback signal derived from the voltage at the load bus, V. Zc = kpe + ki , Kp= Proportional constant, Ki= Integral constant, e = Error constant Design of Filter Here LC Filter is designed and LC Filter is the combination of two filters provides a lower ripple than is possible with either L or C alone. As it is known, in an inductor filter, ripple increases with RL but decreases in a capacitor filter. The combination of L and C filter makes the ripple independent of RL. Here C = VRF = , where VRF is Voltage Ripple Factor IV.SIMULATION STUDIES Fig 9 Output Phase Voltage Waveforms of MLI 2206 | P a g e
  • 5. Nainala Vasanthakumar, K.Ramcharan / International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622 www.ijera.com Vol. 2, Issue4, July-August 2012, pp.2203-2209 Fig.11 Open loop output voltage(2000V) waveform at rated voltage Fig.14 Closed loop Simulink diagram of Cascade H-Bridge 5 Level MLI Fig. 12 Open loop Output Voltage when Under Voltage(1600V) is created Fig 15.Closed loop output voltage(2000V) waveform at rated voltage 2207 | P a g e
  • 6. Nainala Vasanthakumar, K.Ramcharan / International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622 www.ijera.com Vol. 2, Issue4, July-August 2012, pp.2203-2209 Fig. 13 Open loop Output Voltage when Over Voltage(2500V) is created Fig. 16 Closed loop Output Voltage when Under Voltage is created S.No Parameter Value Amplitude Modulation 1 0.83 Index(Ma) 2 Number Of Levels(M) 5 Reference Wave 3 2V Amplitude(Am) 4 Frequency 50Hz 5 Carrier Wave Amplitude(Ac) 0.6V Frequency Modulation 6 20 Index(Mf) 1KHz 7 Carrier Frequency(Fc) 10%(Assume) 8 Voltage Ripple Factor(VRF) 9 Filter Capacitor (C) 1054.2µF Fig. 17 Closed loop Output Voltage when Over Voltage is 10 Filter Inductance(L) 13.72mH created V.CONCLUSION In this paper three phase cascaded H-Bridge 2. ―Multilevelinverters: A survey Of multilevel inverter is simulated and observed under topologies, controls, and applications‖, various unbalanced voltage conditions like Under Industrial Electronics, IEEE Transactions, Voltage and Over Voltage. In the open loop system Vol. 49, issue:4, pp. 724-738, Aug 2002. Under Voltage and Over Voltage were introduced at the Supply side, and the waveforms of those were 3. Holmes, D.G, McGrath, B.P. ―Multicarrier observed under unbalanced conditions. PWM strategies for multilevel inverters‖ In the closed loop system with the help of PI Industrial Electronics, IEEE Transactions, Controller the load voltage is maintained constant for Vol. 49, issue:4, pp.858-867,Aug 2002. unbalanced voltage conditions and these can be 4. Yan Deng, Hongyan Wang, Chao Zhang, observed from the above simulations. Lei Hu and Xiangning He, ―Multilevel PWM Methods Based On Control Degrees REFERENCES Of Freedom Combination And Its 1. Fang Zheng Peng, Jih-Sheng Lai, Theoretical Analysis‖, IEEE IAS 2005 and Rodriguez J. 2208 | P a g e
  • 7. Nainala Vasanthakumar, K.Ramcharan / International Journal of Engineering Research and Applications (IJERA) ISSN: 2248-9622 www.ijera.com Vol. 2, Issue4, July-August 2012, pp.2203-2209 Conference record no.:0-7803-9208-6/05, 15. Ge Baoming,and Fang Zheng Peng,‖An pp.1692 – 1699, 2005. Effective Control Technique for Medium- Voltage High Power Induction Motor 5. J. Rodriguez, B. Wu, S. Bernet, J. Pontt, and S. Kouro, 16. Drives‖, 978-1-4244-1766-7/08-2008 IEEE. 6. ―Multilevel voltage source-converter 17. Fang Zheng Peng, Jih-Sheng Lai, John W. topologies for industrial medium-voltage McKeever, and James VanCoevering.―A drives,‖ IEEE Trans. Ind.Electron., vol. 54, multilevel voltage-source inverter with no. 6, pp. 2930–2945, Dec. 2007. separate dc sources for static var generation,‖ IEEE Trans. Industry 7. S. Khomfoi, L. M. Tolbert, ―Multilevel Applications,vol.32, no.5, pp.1130-1138, Power Converters,‖ Sept.1996. 8. Power Electronics Handbook, 2nd Edition 18. Alan Joseph, et al. ―A 24-pulse rectifier Elsevier, 2007, ISBN 978-0-12- 088479-7, cascaded multilevel inverter with minimum Chapter 17, pp. 451-482. number of transformer windings,‖ IEEE Fourtieth IAS Annual Meeting ,vol.1, Oct. 9. Samir Kouro, Student Member, IEEE, Pablo 2005, pp.115-120. Lezana, Member, IEEE,Mauricio Angulo, and Jose Rodriguez, Senior Member, IEEE 19. D. A. Rendusara, E. Cengelci,, P. N. Enjeti, IEEE Transactions on Power Electronics, V. R. Stefanovic, and J. W.Gray. ―Analysis Vol. 23, No. 1, January 2008 of common mode voltage—neutral shift in ―MulicarrierPWM With DC-Link Ripple medium voltage PWM adjustable speed Feed forward Compensation for Multilevel drive (MV-ASD) systems,‖ IEEE Inverters ‖. Trans.Power Electronics, vol.15,no.6, pp.1124-1133, Nov. 2000. 10. Panagiotis Panagis, Fotis Stergiopoulos, Pantelis Marabeas and Stefanos 20. Leon M. Tolbert, Fang Zheng Peng, Tim Manias―Comparison of State of the Art Cunnyngham, and John N.Chiasson. Multilevel Inverters‖. 978-1-4244-1668- ―Charge balance control schemes for 4/08/2008 IEEE cascade multilevel converter in hybrid electric vehicles,‖ IEEE Trans. Industrial 11. A 5-Level Cascaded Hybrid Multilevel Electronics,vol. 49, no.5, pp.1058-1064, Inverter for Interfacing with Renewable Oct. 2002. Energy Resources‖ Surin Khomfoi1, Chatrchai Aimsaard 978-1-4244-3388- 9/09/2009 IEEE 12. ―Optimized Hybrid Phase Disposition PWM Control Method for Multilevel Inverter‖ C.Govindaraju and Dr.K.Baskaran 13. International Journal of Recent Trends in Engineering, Vol 1, No. 3, May 2009 49 14. ―A modular power electronic transformer based on a cascaded H-bridge multilevel converter‖ H. Iman-Einia,b, Sh. Farhangia, J.-L. Schanenb, M. Khakbazan-Fardc H. Iman-Eini et http://www.software995.com/al. / Electric Power Systems Research 79 (2009) 1625– 1637. 2209 | P a g e