Figure 9-15 Block Diagram for a single-Cycle Computer Manually simulate the single-cycle computer in Figure 9-15 forthe following sequence of instructions, assuming that each register initially contains contents equal to its index (i.e. RO contains 0: R1 contains 1, and so on): SUB R7, R6, R5 ADD R4, R3, R2 ADD R1, RO, R1 SUB R2, R3, R2 ADD R2, R4, R2 ST R6, R2 MOVA R2, R6 LDI R6, 7 ADI R3, R2, 1 Give (a) the binary value of the instruction on the current line of the results and (b) the contents of any register changed by the instruction, orthe location and contents of any memory location changed by the instruction on the next line of the results. The results are positioned in this fashion because the new values do not appear in a rejgs^e^ or memory, due to the execution of an instruction, until after a positive clock edge has occurred.

1. Figure 9-15 Block Diagramfor a single-Cycle Computer Manuallysimulate the single-cycle computer inFigure 9-15 forthe followingsequence of
instructions, assumingthat eachregister initiallycontains contents equalto its index(i.e. RO contains 0:R1 contains 1, and so on):SUBR7, R6,
R5 ADDR4, R3, R2 ADDR1, RO, R1 SUBR2, R3, R2 ADDR2, R4, R2 STR6, R2 MOVAR2, R6 LDI R6, 7 ADI R3, R2, 1 Give (a) the
binaryvalue ofthe instructiononthe current line ofthe results and (b) the contents ofanyregister changed bythe instruction, orthe locationand
contents ofanymemorylocationchanged bythe instructiononthe next line ofthe results. The results are positioned inthis fashionbecause the new
values do not appear ina rejgs^e^ or memory, due to the executionofaninstruction, untilafter a positive clock edge has occurred.