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Introducing the i.MX 93:
Your “Go-To” Processor
for Embedded Vision
Srikanth Jagannathan
Senior Product Manager
NXP Semiconductors
• Introduction to NXP application processors
• Introduction to i.MX 93
• Architecture
• Features
• Target applications
• i.MX 93 machine vision features
• Machine vision software enablement flow and demo
Outline
2
© 2023 NXP Semiconductors
FUNCTIONAL INTEGRATION
i.MX RT CROSSOVER MCUS
CORTEX-M CORES
CORTEX®-M
CORTEX®-M
TRADITIONAL KINETIS AND LPC MCUs
CORTEX®-M
Embedded Flash I/Os
i.MX & LAYERSCAPE APP PROCESSORS
HETEROGENEOUS
DOMAIN COMPUTING
CORTEX®-M
CORTEX®-A
BROAD CONNECTIVITY PORTFOLIO
PERFORMANCE
Wi-Fi TSN end nodes
TSN switch
Wi-Fi
BLE
Zigbee
Thread
TSN end nodes
TSN switch
Wi-Fi
BLE
Zigbee
Thread
BLE
Zigbee
Thread
Scalable Compute Platforms
3
© 2023 NXP Semiconductors
i.MX 6
• 12 product families
• Offers software and
pin-pin compatibility
between families for
easy compute
scalability
• Arm® v7-A processors
i.MX 8 Family
Advanced Graphics, Vision & Performance
i.MX 8M Family
i.MX 7 Family
A5
3
M
4
A
7
i.MX 93 Applications Processors Family
4
© 2023 NXP Semiconductors
i.MX 8X Family
Safety certifiable & Efficient Performance
i.MX 93 Family
General Purpose Edge Computing
A55 M33 NPU
Arm® v8.2-A
(32-bit/64-bit)
Software
Compatible
Future i.MX 9 Families
Industrial, IoT & Automotive Edge
i.MX 95 Family
i.MX 9xx Family
i.MX 9xx Family
General Purpose Edge Computing
i.MX 8ULP Family
Ultra Low Power with Graphics
Flexible Efficient Connectivity
Reliable Processors for Long-life Platforms
• NXP's Product Longevity program goal is to ensure stable supply of products for automotive and
industrial designs
2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039
NXP i.MX 93 Series Application Processor Families are part of the NXP 15-year Product Longevity Program
Qualification Level Characteristics Temperature Range
Commercial or Consumer SoC is 50% on for 5-year life Typically: 0°C to +95°C Tj
Industrial (Longest operating life) SoC is 100% on for 10-year life
Typically: -40°C to +105°C Tj
Extended: -40°C to +125°C Tj
Automotive SoC is 10% on for 15-year life Typically: -40°C to +125°C Tj
• NXP's Product Qualification program considers conditions experienced by the processor when
running in customer application
© 2023 NXP Semiconductors 5
SOFTWARE DEVELOPMENT KITS TURN-KEY SOLUTIONS
FIELD APPLICATIONS ENGINEERS & CUSTOMER SUPPORT TEAMS
HIGH PERFORMANCE – FROM SINGLE TO MANY CORE CONFIGURATIONS
STREAMING
MEDIA
RICH 2D & 3D
GRAPHICS
ADVANCED
AUDIO
VOICE
PROCESSING
TOUCH
SENSING
VISION
EDGELOCK®
SECURE ENCLAVE
i.MX 93
Applications
Processors Family
i.MX 93 Family – Differentiated Features
6
© 2023 NXP Semiconductors
i.MX 93 Microprocessor with ML & Vision Engines
7
© 2023 NXP Semiconductors
1x Cortex-M33
@ 250 MHz
• Keyword detection
• Anomaly detection
2x Arm® Cortex ® A55
@ 1.7 GHz
• Speech command
recognition
• Object detection and
classification
• Gesture recognition
1x Arm® Ethos-U65®
@ 1 GHz
• Speech command
recognition
• Object detection
and classification
• Gesture recognition
www.nxp.com/imx93
i.MX 93
System Clock Main CPU
Low-power Real-time Domain
External DRAM
Flex Domain
Memory Access,
Watchdog, Timers,
Temperature Sensors
Arm Cortex-M33
With 256KB TCM
Crypto Functions Tamper Detection Secure Clock
EdgeLock® Secure Enclave
System Control Low Power Security MCU Connectivity and I/O
Connectivity and I/O
ML and Multimedia
System Control
Memory
UARTs, I2Cs, CAN
Audio, microphone
Secure Boot Key Storage RNG
Memory Access,
Watchdog, Timers,
SDIO, eMMC,
Octal SPI Flash,
640 kB OCRAM
Camera: MIPI-CSI
Arm Ethos-U65 NPU
Display: MIPI-DSI,
LVDS, DPI, Display
Controller, 2D GPU
UARTs, I2Cs, CAN,
SPIs, Flex Ios
4-channel ADC
2x 1Gb Ethernet
2x USB 2.0
x16 LPDDR4X or
LPDDR4 (Inline ECC)
2x Cortex-A55
512MB L3 cache
PLLs
• Keys features used in vision applications
• Camera interface: MIPI-CSI
• Other Interfaces: USB, Ethernet, Wi-Fi connectivity and other low-speed interfaces (SPI, UARTs etc)
• Processing: A55, NPU, M33
i.MX 93 Family: Vision Applications Across Segments
Industrial Automation Smart Home Smart City Automotive
• Industrial Machine vision
• Industrial scanning/printing
• Smart doorbell
• Smart lock
• Smart home hub/ Hue Bridge
• Smart lighting
• Traffic control
• Driver Monitoring System (DMS)
• Object Monitoring System (OMS)
8
© 2023 NXP Semiconductors
9
AL/ML
NPU (Neural ProcessingUnit)
BRINGING MCU-CLASS
ML EFFICIENCY TO THE CORTEX-A WORLD
Gesture
Recognition
Object
Segmentation
Speaker
Recognition
Voice
Experience
Object
Detection
Facial
Recognition
Ethos-U65
microNPU
System DRAM
Cortex-M
processor
System SRAM
Cortex-A
processor
System bus
Expanding Edge ML with ARM® Ethos™-U65
• High efficiency and small memory footprint
• HW acceleration for high compute NN + Cortex-M for other
operations
• Model compression and on-the-fly weight decompression
• Comprehensive software and tools with NXP’s eIQ® ML
Software Development Environment
© 2023 NXP Semiconductors 10
AXI-BUS
DDR
Cortex-A55
Cortex-
M33
Ethos-U65 SRAM MU
M33 Interconnect
Ethos-U system
• The Ethos-U system includes Cortex-
M, Ethos-U65, SRAM and Messaging
Unit (MU).
• Ethos-U65 is controlled by Cortex-M.
Cortex-A has no direct access with
Ethos-U NPU.
• Communication between CPUs is
through DDR memory and the MU.
• Ethos-U NPU can access both DDR
and SRAM over embedded DMA
interface.
• Model weights, bias, input and output
feature maps are stored in DDR
• SRAM size is 384 KB
Ethos-U65 Hardware Architecture
11
© 2023 NXP Semiconductors
Ethos-U65 Software Architecture
12
• TensorFlow Lite (TFLite) interpreter or
Inference API to run the model on NPU:
• TFLite interpreter: NPU optimized operations
on NPU, all other operations on Cortex-A55.
• Inference API: all operations not supported
by NPU will be fallback to Cortex-M core.
• Requires precompiling a model to be able to run
on the NPU
• Non-compiled model will run on Cortex-A55
core only.
• Users can compile models using the Arm
Vela compiler or NXP eIQ Portal.
Compiled
Model
TFLite Interpreter
CPU kernel
XNNPACK
delegate
Ethos-U65
kernel
RPMSG
Cortex-A55 CPU (With NEON)
Inference API
Compiled model
Linux on Cortex-
A55
Tensorflow
Std lib
NXP
All other operations NPU optimized
operations
Running
a TFLite
Model on
i.MX 93
Inference
Driver
RPMSG
Lite
Ethos-U65
Runner
NN Kernel CMSIS-NN
Cortex-M33 Ethos-U65 NPU
Ethos-U SW on Cortex-M
TFLite-Micro
Ethos-U65
Driver
Ethos-U65
kernel
Ethos-U
Kernel
Compiled Model
© 2023 NXP Semiconductors
Vela compiler
Vela
• ARM Vela compiler tool converts a quantized TFLite model and exports it to an
optimized version that can be run on the Ethos-U65 NPU (Vela model).
• Conversion is one way: TFLite  Vela model only
• Converts TFLite operators to custom operators that can run on the NPU
• Unsupported TFLite operators will run on CPU
• Additionally, tool compresses model to reduce model size (~70%) and SRAM size (~90%)
• Tool is free to download and open-source: https://github.com/nxp-imx/ethos-u-vela
The ARM Vela Compiler
13
© 2023 NXP Semiconductors
Vela
Model
Method 1: Use eIQ Portal’s Model Viewer Method 2: Use the Command Line Tool
$ git clone https://github.com/nxp-imx/ethos-u-vela.git
$ cd ethos-u-vela
$ git checkout lf-5.15.71_2.2.0
$ pip3 install .
$ vela mobilenet_v1_1.0_224_pb_int8.tflite
Both methods create a Vela model file
that can be used on the i.MX 93’s NPU
Compiling a Model for i.MX 93 SoC
14
© 2023 NXP Semiconductors
NPU Performance Increase for Quantized Models
15
© 2023 NXP Semiconductors
• Measured inference/sec on
i.MX 93 with NPU and Cortex
A55 running at 1 GHz
Machine Vision
Software Enablement
16
eIQ ML SW Development Environment
17
© 2023 NXP Semiconductors
Embedded
Developers
ML Experts
Data
Scientists
Bring Your Own Model Workflow
Bring Your Own Data Workflow
Data Curation Model Selection Model Training,
Optimization,
Quantization
Model Validation
eIQ
Toolkit
eIQ Marketplace
Solutions and
Services from NXP
and NXP
Eco-System
Partners
• ML Applications
• Optimized Models
• Optimization Tools
and Modules
• Development tools
• Datasets
• Training
• Sensor solutions
eIQ
Portal
eIQ ML SW Development Environment
18
© 2023 NXP Semiconductors
Embedded
Developers
ML Experts
Data
Scientists Bring Your Own Model Workflow
Bring Your Own Data Workflow
i.MX Applications Processors
Arm Cortex-A/M, GPU, DSP, NPU
eIQ inference with…
i.MX RT MCU device
with Arm® Cortex®-M, DSP
Arm NN
ONNX
Runtime
DeepViewRT™
FACE
RECOGNITION
COMPLEX
DIAGNOSIS
VOICE
RECOGNITION
MULTI-OBJECT
CLASSIFICATION
ANOMALY
DETECTION
Applications running on NXP EdgeVerse processors
eIQ
inference
Data Curation Model Selection Model Training,
Optimization, Quantization
Model Validation
TFLite DeepViewRT™
eIQ
Toolkit
eIQ Marketplace
TFLite-Micro Glow
Solutions and Services
from NXP and NXP
Eco-System Partners
• ML Applications
• Optimized Models
• Optimization Tools and
Modules
• Development tools
• Datasets
• Training
• Sensor solutions
• ….
https://www.nxp.com/eiq
eIQ
Portal
NXP eIQ® ML Software Development Environment
Arm® Cortex®-A
i.MX 93
i.MX 8M Plus
i.MX 8M
i.MX 8M Nano
i.MX 8M Nano UL
i.MX 8M Mini
NPU
i.MX 93
i.MX 8M Plus
DSP
i.MX 8M Plus
Inference Engines and Libraries for Neural Network Model Deployment
GPU
i.MX 8M Plus
i.MX 8M
i.MX 8M Nano
Applications Processor Compute Engines
i.MX RT600
DSP
i.MX RT600
Microcontroller Compute Engines
i.MX RT1050
i.MX RT1060
i.MX RT1064
i.MX RT1160
i.MX RT1170
Arm® Cortex®-M
* Planned
• Additional support for devices not listed can be available or requested
for Microcontrollers
eIQ ML SDE Inference Engine Options
© 2023 NXP Semiconductors 19
20
Machine Vision
Use Case & Demos
Sample Enablement Flow Video and Demo
© 2023 NXP Semiconductors
Detects movement
of car driver to
estimate alertness
to drive
21
• NXP just launched the i.MX 93 applications processor family - first in next
generation i.MX 9 series
• i.MX 93 enables customers to develop cost-optimal solution for low-/mid-end
vision applications using following features
• Hardware: NPU, MIPI-CSI interface
• Software: eIQTM toolkit
• Enablement: plethora of reference demos targeting machine vision application
• Please email Srikanth.Jagannathan@nxp.com and Ali.Ors@nxp.com for any
questions related to i.MX 93 samples/EVKs/eIQTM/ML Demos etc.
Summary
22
© 2023 NXP Semiconductors
• i.MX 93 product page: www.nxp.com/imx93
• i.MX 93 evaluation kit (EVK) page: www.nxp.com/imx93evk
• eIQTM page www.nxp.com/EIQ
• Please visit NXP booth for more demos and discussion
Resources
23
© 2023 NXP Semiconductors
24
Thank You

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“Introducing the i.MX 93: Your “Go-to” Processor for Embedded Vision,” a Presentation from NXP Semiconductors

  • 1. Introducing the i.MX 93: Your “Go-To” Processor for Embedded Vision Srikanth Jagannathan Senior Product Manager NXP Semiconductors
  • 2. • Introduction to NXP application processors • Introduction to i.MX 93 • Architecture • Features • Target applications • i.MX 93 machine vision features • Machine vision software enablement flow and demo Outline 2 © 2023 NXP Semiconductors
  • 3. FUNCTIONAL INTEGRATION i.MX RT CROSSOVER MCUS CORTEX-M CORES CORTEX®-M CORTEX®-M TRADITIONAL KINETIS AND LPC MCUs CORTEX®-M Embedded Flash I/Os i.MX & LAYERSCAPE APP PROCESSORS HETEROGENEOUS DOMAIN COMPUTING CORTEX®-M CORTEX®-A BROAD CONNECTIVITY PORTFOLIO PERFORMANCE Wi-Fi TSN end nodes TSN switch Wi-Fi BLE Zigbee Thread TSN end nodes TSN switch Wi-Fi BLE Zigbee Thread BLE Zigbee Thread Scalable Compute Platforms 3 © 2023 NXP Semiconductors
  • 4. i.MX 6 • 12 product families • Offers software and pin-pin compatibility between families for easy compute scalability • Arm® v7-A processors i.MX 8 Family Advanced Graphics, Vision & Performance i.MX 8M Family i.MX 7 Family A5 3 M 4 A 7 i.MX 93 Applications Processors Family 4 © 2023 NXP Semiconductors i.MX 8X Family Safety certifiable & Efficient Performance i.MX 93 Family General Purpose Edge Computing A55 M33 NPU Arm® v8.2-A (32-bit/64-bit) Software Compatible Future i.MX 9 Families Industrial, IoT & Automotive Edge i.MX 95 Family i.MX 9xx Family i.MX 9xx Family General Purpose Edge Computing i.MX 8ULP Family Ultra Low Power with Graphics Flexible Efficient Connectivity
  • 5. Reliable Processors for Long-life Platforms • NXP's Product Longevity program goal is to ensure stable supply of products for automotive and industrial designs 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 NXP i.MX 93 Series Application Processor Families are part of the NXP 15-year Product Longevity Program Qualification Level Characteristics Temperature Range Commercial or Consumer SoC is 50% on for 5-year life Typically: 0°C to +95°C Tj Industrial (Longest operating life) SoC is 100% on for 10-year life Typically: -40°C to +105°C Tj Extended: -40°C to +125°C Tj Automotive SoC is 10% on for 15-year life Typically: -40°C to +125°C Tj • NXP's Product Qualification program considers conditions experienced by the processor when running in customer application © 2023 NXP Semiconductors 5
  • 6. SOFTWARE DEVELOPMENT KITS TURN-KEY SOLUTIONS FIELD APPLICATIONS ENGINEERS & CUSTOMER SUPPORT TEAMS HIGH PERFORMANCE – FROM SINGLE TO MANY CORE CONFIGURATIONS STREAMING MEDIA RICH 2D & 3D GRAPHICS ADVANCED AUDIO VOICE PROCESSING TOUCH SENSING VISION EDGELOCK® SECURE ENCLAVE i.MX 93 Applications Processors Family i.MX 93 Family – Differentiated Features 6 © 2023 NXP Semiconductors
  • 7. i.MX 93 Microprocessor with ML & Vision Engines 7 © 2023 NXP Semiconductors 1x Cortex-M33 @ 250 MHz • Keyword detection • Anomaly detection 2x Arm® Cortex ® A55 @ 1.7 GHz • Speech command recognition • Object detection and classification • Gesture recognition 1x Arm® Ethos-U65® @ 1 GHz • Speech command recognition • Object detection and classification • Gesture recognition www.nxp.com/imx93 i.MX 93 System Clock Main CPU Low-power Real-time Domain External DRAM Flex Domain Memory Access, Watchdog, Timers, Temperature Sensors Arm Cortex-M33 With 256KB TCM Crypto Functions Tamper Detection Secure Clock EdgeLock® Secure Enclave System Control Low Power Security MCU Connectivity and I/O Connectivity and I/O ML and Multimedia System Control Memory UARTs, I2Cs, CAN Audio, microphone Secure Boot Key Storage RNG Memory Access, Watchdog, Timers, SDIO, eMMC, Octal SPI Flash, 640 kB OCRAM Camera: MIPI-CSI Arm Ethos-U65 NPU Display: MIPI-DSI, LVDS, DPI, Display Controller, 2D GPU UARTs, I2Cs, CAN, SPIs, Flex Ios 4-channel ADC 2x 1Gb Ethernet 2x USB 2.0 x16 LPDDR4X or LPDDR4 (Inline ECC) 2x Cortex-A55 512MB L3 cache PLLs
  • 8. • Keys features used in vision applications • Camera interface: MIPI-CSI • Other Interfaces: USB, Ethernet, Wi-Fi connectivity and other low-speed interfaces (SPI, UARTs etc) • Processing: A55, NPU, M33 i.MX 93 Family: Vision Applications Across Segments Industrial Automation Smart Home Smart City Automotive • Industrial Machine vision • Industrial scanning/printing • Smart doorbell • Smart lock • Smart home hub/ Hue Bridge • Smart lighting • Traffic control • Driver Monitoring System (DMS) • Object Monitoring System (OMS) 8 © 2023 NXP Semiconductors
  • 10. BRINGING MCU-CLASS ML EFFICIENCY TO THE CORTEX-A WORLD Gesture Recognition Object Segmentation Speaker Recognition Voice Experience Object Detection Facial Recognition Ethos-U65 microNPU System DRAM Cortex-M processor System SRAM Cortex-A processor System bus Expanding Edge ML with ARM® Ethos™-U65 • High efficiency and small memory footprint • HW acceleration for high compute NN + Cortex-M for other operations • Model compression and on-the-fly weight decompression • Comprehensive software and tools with NXP’s eIQ® ML Software Development Environment © 2023 NXP Semiconductors 10
  • 11. AXI-BUS DDR Cortex-A55 Cortex- M33 Ethos-U65 SRAM MU M33 Interconnect Ethos-U system • The Ethos-U system includes Cortex- M, Ethos-U65, SRAM and Messaging Unit (MU). • Ethos-U65 is controlled by Cortex-M. Cortex-A has no direct access with Ethos-U NPU. • Communication between CPUs is through DDR memory and the MU. • Ethos-U NPU can access both DDR and SRAM over embedded DMA interface. • Model weights, bias, input and output feature maps are stored in DDR • SRAM size is 384 KB Ethos-U65 Hardware Architecture 11 © 2023 NXP Semiconductors
  • 12. Ethos-U65 Software Architecture 12 • TensorFlow Lite (TFLite) interpreter or Inference API to run the model on NPU: • TFLite interpreter: NPU optimized operations on NPU, all other operations on Cortex-A55. • Inference API: all operations not supported by NPU will be fallback to Cortex-M core. • Requires precompiling a model to be able to run on the NPU • Non-compiled model will run on Cortex-A55 core only. • Users can compile models using the Arm Vela compiler or NXP eIQ Portal. Compiled Model TFLite Interpreter CPU kernel XNNPACK delegate Ethos-U65 kernel RPMSG Cortex-A55 CPU (With NEON) Inference API Compiled model Linux on Cortex- A55 Tensorflow Std lib NXP All other operations NPU optimized operations Running a TFLite Model on i.MX 93 Inference Driver RPMSG Lite Ethos-U65 Runner NN Kernel CMSIS-NN Cortex-M33 Ethos-U65 NPU Ethos-U SW on Cortex-M TFLite-Micro Ethos-U65 Driver Ethos-U65 kernel Ethos-U Kernel Compiled Model © 2023 NXP Semiconductors
  • 13. Vela compiler Vela • ARM Vela compiler tool converts a quantized TFLite model and exports it to an optimized version that can be run on the Ethos-U65 NPU (Vela model). • Conversion is one way: TFLite  Vela model only • Converts TFLite operators to custom operators that can run on the NPU • Unsupported TFLite operators will run on CPU • Additionally, tool compresses model to reduce model size (~70%) and SRAM size (~90%) • Tool is free to download and open-source: https://github.com/nxp-imx/ethos-u-vela The ARM Vela Compiler 13 © 2023 NXP Semiconductors Vela Model
  • 14. Method 1: Use eIQ Portal’s Model Viewer Method 2: Use the Command Line Tool $ git clone https://github.com/nxp-imx/ethos-u-vela.git $ cd ethos-u-vela $ git checkout lf-5.15.71_2.2.0 $ pip3 install . $ vela mobilenet_v1_1.0_224_pb_int8.tflite Both methods create a Vela model file that can be used on the i.MX 93’s NPU Compiling a Model for i.MX 93 SoC 14 © 2023 NXP Semiconductors
  • 15. NPU Performance Increase for Quantized Models 15 © 2023 NXP Semiconductors • Measured inference/sec on i.MX 93 with NPU and Cortex A55 running at 1 GHz
  • 17. eIQ ML SW Development Environment 17 © 2023 NXP Semiconductors Embedded Developers ML Experts Data Scientists Bring Your Own Model Workflow Bring Your Own Data Workflow Data Curation Model Selection Model Training, Optimization, Quantization Model Validation eIQ Toolkit eIQ Marketplace Solutions and Services from NXP and NXP Eco-System Partners • ML Applications • Optimized Models • Optimization Tools and Modules • Development tools • Datasets • Training • Sensor solutions eIQ Portal
  • 18. eIQ ML SW Development Environment 18 © 2023 NXP Semiconductors Embedded Developers ML Experts Data Scientists Bring Your Own Model Workflow Bring Your Own Data Workflow i.MX Applications Processors Arm Cortex-A/M, GPU, DSP, NPU eIQ inference with… i.MX RT MCU device with Arm® Cortex®-M, DSP Arm NN ONNX Runtime DeepViewRT™ FACE RECOGNITION COMPLEX DIAGNOSIS VOICE RECOGNITION MULTI-OBJECT CLASSIFICATION ANOMALY DETECTION Applications running on NXP EdgeVerse processors eIQ inference Data Curation Model Selection Model Training, Optimization, Quantization Model Validation TFLite DeepViewRT™ eIQ Toolkit eIQ Marketplace TFLite-Micro Glow Solutions and Services from NXP and NXP Eco-System Partners • ML Applications • Optimized Models • Optimization Tools and Modules • Development tools • Datasets • Training • Sensor solutions • …. https://www.nxp.com/eiq eIQ Portal
  • 19. NXP eIQ® ML Software Development Environment Arm® Cortex®-A i.MX 93 i.MX 8M Plus i.MX 8M i.MX 8M Nano i.MX 8M Nano UL i.MX 8M Mini NPU i.MX 93 i.MX 8M Plus DSP i.MX 8M Plus Inference Engines and Libraries for Neural Network Model Deployment GPU i.MX 8M Plus i.MX 8M i.MX 8M Nano Applications Processor Compute Engines i.MX RT600 DSP i.MX RT600 Microcontroller Compute Engines i.MX RT1050 i.MX RT1060 i.MX RT1064 i.MX RT1160 i.MX RT1170 Arm® Cortex®-M * Planned • Additional support for devices not listed can be available or requested for Microcontrollers eIQ ML SDE Inference Engine Options © 2023 NXP Semiconductors 19
  • 21. Sample Enablement Flow Video and Demo © 2023 NXP Semiconductors Detects movement of car driver to estimate alertness to drive 21
  • 22. • NXP just launched the i.MX 93 applications processor family - first in next generation i.MX 9 series • i.MX 93 enables customers to develop cost-optimal solution for low-/mid-end vision applications using following features • Hardware: NPU, MIPI-CSI interface • Software: eIQTM toolkit • Enablement: plethora of reference demos targeting machine vision application • Please email Srikanth.Jagannathan@nxp.com and Ali.Ors@nxp.com for any questions related to i.MX 93 samples/EVKs/eIQTM/ML Demos etc. Summary 22 © 2023 NXP Semiconductors
  • 23. • i.MX 93 product page: www.nxp.com/imx93 • i.MX 93 evaluation kit (EVK) page: www.nxp.com/imx93evk • eIQTM page www.nxp.com/EIQ • Please visit NXP booth for more demos and discussion Resources 23 © 2023 NXP Semiconductors