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1. BOARD LEVEL ASSEMBLY AND RELIABILITY CONSIDERATIONS
FOR QFN TYPE PACKAGES
Ahmer Syed and WonJoon Kang
Amkor Technology, Inc.
1900 S. Price Road
Chandler, Arizona
ABSTRACT
There is a strong interest in understanding the surface mount
assembly requirements of QFN (Quad Flat No-Lead) type
packages due to their rapid industry acceptance. Board level
reliability is also of great concern as this is a package
without compliant leads. This paper provides guidelines in
board design and surface mount of this package based on
extensive surface mount experiments. Board level reliability
data has also been generated for accelerated temperature
cycling test conditions and is presented here. The data is
generated for different material sets, various body/die sizes,
temperature cycle conditions and board thickness. The data
shows reliable surface mount process is achievable and the
package is very reliable for most applications.
Key words: QFN, MLF, Surface mount assembly, board
level reliability, solder joint reliability.
INTRODUCTION
During the last couple of years the introduction of QFN
(Quad Flat No -lead) package has taken the industry by
storm due to its superb electrical and thermal performance
characteristics. Amkor Technology markets this package as
MicroLeadFrame ™ (MLF) and has recently shipped 1
billionth package of this type.
The MicroLeadFrame™ package (MLF) is a near CSP
plastic encapsulated package with a copper leadframe
substrate. This is a leadless package where electrical
contact to the PCB is made by soldering the lands on the
bottom surface of the package to the PCB, instead of the
conventional formed perimeter leads. Amkor’s
ExposedPad™ technology enhances the thermal and
electrical properties of the package. The exposed die attach
paddle on the bottom efficiently conducts heat to the PCB
and provides a stable ground through down bonds and
electrical connections through conductive die attach
material. The design of the MLF package also allows for
flexibility. Its enhanced electrical performance enables the
standard 2 GHz operating frequency to be increased up to
10 GHz with some design considerations. The small size
and weight with excellent thermal and electrical
performance make the MLF package an ideal choice for
handheld portable applications such as cell phones and
PDAs or any other application where size, weight and
package performance are required.
(a) (b) (c)
Figure 1. MLF Package Photo and Cross Section Drawings.
(a) Punch Singulated, (b) Saw Singulated, Full Lead
(c) Saw Singulated, Lead Pullback
The MLF package comes in two formats: punch singulated,
and saw singulated. While punch singulated packages are
individually punched from molded strip during final
assembly, the saw singulated package are assembled in
array format and separated into individual components
during the final sawing operation. The saw singulated
package is further divided into two options: Full Lead
package, and Lead Pullback package. The full lead package
has the whole thickness of the lead exposed on the package
sides. On the other hand, the lead pullback package has a
bottom half etch leadframe, resulting in only the top half of
the lead thickness exposed to the sides of the package.
Figure 1 shows the differences in these package
configurations.
As shown in Figure 1, the lands on the package bottom side
are rectangular in shape with rounded edge on the inside.
Since the package does not have any solder balls, package to
board electrical connections are achieved by printing the
solder paste on the board and reflow soldering after
component placement. In order to form reliable solder joint,
special attention is needed in designing the board pad
pattern. Similarly, the surface mount process for this
package is complicated due to presence of large exposed
pad on bottom side of the package. Attention is required for
proper stencil design, paste printing, and reflow profiling.
The package design as well as board and test conditions also
impact the board level reliability of this package. This paper
deals with all of these aspects and provides guidelines and
data to achieve a reliable solution for a particular
application.

2. BOARD DESIGN CONSIDERATIONS
Typically the PCB pad pattern for an existing package is
designed based on guidelines developed within a company
or by following industry standards such as IPC-SM-782.
Since MLF is a new package type and the industry
guidelines have not yet been developed for PCB pad pattern
design, the development of proper design may require some
experimental trials. Amkor has used IPC’s methodology [1],
with constraints added to accommodate the exposed die
paddle, in designing the pad pattern. The pad pattern
developed includes considerations for lead and package
tolerances.
Figure 2 shows the cross-sectional views of full lead and
lead pullback package options for saw singulated packages.
These options are also commonly referred to as Full
Connecting Bar (FCB) and Half Etch Connecting Bar
(HECB) designs. Notice that in full lead option the
peripheral leads are extended all the way to package edges
on the bottom side of the package. In case of lead pullback,
the end of the leads are etched resulting in lands that are
embedded in the mold compound except for the bottom
side. To increase the length of the exposed leads on bottom,
the leads are also ectended toward the center by 0.1mm
nominal. The cross-sectional view is shown in Figure 2,
comparing the two options.
Full Connecting Bar (FCB) Design
0.4mm Nominal Lead Length
Full Connecting Bar (FCB) Design
0.6mm Nominal Lead Length
Half Etch Connecting Bar (HECB) Design
0.4mm Nominal Lead Length
Half Etch Connecting Bar (HECB) Design
0.4mm Nominal Lead Length
Superimposed FCB and HECB Design
FCB
HECB
FCB
HECB
Full Connecting Bar (FCB) Design
0.4mm Nominal Lead Length
Full Connecting Bar (FCB) Design
0.6mm Nominal Lead Length
Half Etch Connecting Bar (HECB) Design
0.4mm Nominal Lead Length
Half Etch Connecting Bar (HECB) Design
0.4mm Nominal Lead Length
Superimposed FCB and HECB Design
FCB
HECB
FCB
HECB
FCB
HECB
FCB
HECB
Figure 2. Full vs. Half Etch Connecting Bar Design.
Figure 3 shows the bottom and side views of full lead
option, indicating the dimensions needed to design the pad
pattern for PCB. Although, the leads are pulled back in the
HECB design, the PCB pad pattern does not need to be
changed for these options. Since most packages are square
with dimension D equal to dimension E and the leads are
along the E direction for dual packages, the side view
dimensions (D, S, D2, & L) are used to determine the land
length on the PCB.
The PCB pad pattern dimensions needed for the footprint
design are shown in Figure 4. In the figure, the dimensions
ZDmax and GDmin (and ZEmax and GEmin) are the outside to
outside and inside to inside pad dimensions, respectively.
The dimension X and Y indicate the width and the length of
the pad, respectively. Two additional clearances CLL and
CPL are also defined to avoid solder bridging. While CLL
defines the minimum distance between land to land for the
corner joints on adjacent sides, CPL defines the minimum
distance between the inner tip of the peripheral lands and
the outer edge of the thermal pad.
D
D2
E E2SE
b
L
e
SD
D
S
D2
L
Figure 3. MLF (full lead design) component dimensions
needed for PCB land pattern design.
ZDmax
D2’
ZEmax E2’
GEmin
GDmin
CLL
ADmax
AEmax
CPL
Y
X
Figure 4. PCB Pad Pattern Dimensions for footprint design.
The development of pad pattern for MLF requires tolerance
analysis with consideration of a) component tolerances, b)
PCB fabrication tolerances, and c) the accuracy of the
equipment used for placing the component. IPC has
established a procedure for such an analysis [1], which has
been used to determine the recommended pad patterns for
various MLF packages. The complete details of the
methodology and recommended pad patterns are
documented in an application notes [2] for this package
which can be downloaded from www.amkor.com. The
details are not repeated here due to space limitations.
SURFACE MOUNT PROCES S CONSIDERATIONS
Because of the small lead surface area and the sole reliance
on printed solder paste on the PCB surface, care must be

3. taken to form reliable solder joints for MLF packages. This
is further complicated by the large thermal pad underneath
the package and its proximity to the inner edges of the leads.
Although the pad pattern design suggested above might help
in eliminating some of the surface mounting problems,
special considerations are needed in stencil design and paste
printing for both perimeter and thermal pads. Since surface
mount process varies from company to company, careful
process development is recommended. The following
provides some guidelines for stencil design based on
Amkor’s experience in surface mounting MLF packages.
Stencil Design for Perimeter Pads
The optimum and reliable solder joints on the perimeter
pads should have about 50 to 75 microns (2 to 3 mils)
standoff height. The first step in achieving good standoff is
the solder paste stencil design for perimeter pads. The
stencil aperture opening should be so designed that
maximum paste release is achieved. This is typically
accomplished by considering the following two ratios:
Area Ratio = Area of Aperture Opening / Area of Aperture
Wall, and
Aspect Ratio = Aperture width / Stencil Thickness
For rectangular aperture openings, as required for this
package, these ratios are given as
Area Ratio = LW/2T(L+W), and
Aspect Ratio = W/T
Where L and W are the aperture length and width, and T is
stencil thickness. For optimum paste release the area and
aspect ratios should be greater than 0.66 and 1.5,
respectively.
It is recommended that the stencil aperture should be 1:1 to
PCB pad sizes as both area and aspect ratio targets are easily
achieved by this aperture. The stencil should be laser cut
and electro polished. The polishing helps in smoothing the
stencil walls resulting in better paste release. It is also
recommended that the stencil aperture tolerances should be
tightly controlled, especially for 0.4 and 0.5mm pitch
devices, as these tolerances can effectively reduce the
aperture size. Since not enough space is available
underneath the part once soldered to the board, it is
recommended that “No Clean”, Type 3 paste be used for
mounting MLF packages. Nitrogen purge is also
recommended during reflow.
Stencil Design for Thermal Pad
In order to effectively remove the heat from the package and
to enhance electrical performance the die paddle needs to be
soldered to the PCB thermal pad, preferably with minimum
voids. However, eliminating voids may not be possible
because of presence of thermal vias and the large size of the
thermal pad for larger size packages. Also, out gassing
occurs during reflow soldering, which may cause defects
(splatter, solder balling) if the solder paste coverage is too
large. It is, therefore, recommended that smaller multiple
openings in stencil should be used instead of one big
opening for printing solder paste on the thermal pad region.
This will typically result in 50 to 80% solder paste coverage.
Shown in Figure 6 are some of the ways to achieve these
levels of coverage.
1.5mm dia. Circles
@ 1.6 mm Pitch
Coverage: 37%
1.0mm dia. Circles
@ 1.2 mm Pitch
Coverage: 50%
1.35x1.35mm squares
@ 1.5 mm Pitch
Coverage: 81%
1.35x1.35 mm Squares
@ 1.65 mm Pitch
Coverage: 68%
1.5mm dia. Circles
@ 1.6 mm Pitch
Coverage: 37%
1.5mm dia. Circles
@ 1.6 mm Pitch
Coverage: 37%
1.0mm dia. Circles
@ 1.2 mm Pitch
Coverage: 50%
1.0mm dia. Circles
@ 1.2 mm Pitch
Coverage: 50%
1.35x1.35mm squares
@ 1.5 mm Pitch
Coverage: 81%
1.35x1.35mm squares
@ 1.5 mm Pitch
Coverage: 81%
1.35x1.35 mm Squares
@ 1.65 mm Pitch
Coverage: 68%
1.35x1.35 mm Squares
@ 1.65 mm Pitch
Coverage: 68%
Figure 5. Thermal Pad Stencil Designs for 7x7 and
10x10mm MLF Packages.
Via types and solder voiding
As the MLF package incorporates a large center pad,
controlling solder voiding within this region can be difficult.
Small voids with greater than 50% solder coverage under
the exposed pad do not result in thermal or board level
performance degradation in general. However, voids within
solder joints under the exposed pad can have an adverse
effect on high speed and RF applications as well as on
thermal performance if the maximum size for a void is
greater than via pitch in the thermal pad area.
In order to control these voids, solder masking may be
required for thermal vias to prevent solder wicking inside
the via during reflow. This wicking displaces the solder
away from the interface between the package die paddle and
thermal pad on the PCB. There are different methods
employed within the industry to avoid such wicking, such as
“via tenting” (from top or bottom side) using dry film solder
mask, “via plugging” with liquid photo-imagible (LPI)
solder mask from the bottom side, or “via encroaching”.
These options are depicted in Figure 6. In case of via
tenting, the solder mask diameter should be 100 microns
larger than via diameter.
All of these options have pros and cons when mounting
MLF package on the board. While via tenting from top side
may result in smaller voids, the presence of solder mask on
the top side of the board may hinder proper paste printing.
On the other hand, both via tenting from bottom or via
plugging from bottom may result in larger voids due to out-
gassing, covering more than two vias. Finally, encroached
vias allow the solder to wick inside the vias and reduce the
size of the voids. But this also results in lower standoff of
the package, which is controlled by the solder underneath
the exposed pad. Figure 7 shows representative x-ray
pictures of MLF packages mounted on boards with different
via treatments.

4. (a) (b) (c) (d)
Figure 6. Solder mask options for thermal vias: (a) via
tenting from top, (b) via tenting from bottom, (c) via
plugging from bottom, and (d) via encroached from bottom.
Figure 1B11- U10 Figure 1B11- U22
(a) (b) (c) (d)
Figure 7. Voids in Thermal Pad Solder Joint for (a) vias
tented from top, (b) vias tented from bottom, (c) via
plugged from bottom, and (d) via encroached from bottom
surface of the PCB.
Encroached via, depending on the board thickness and
amount of solder printed underneath the exposed pad, may
also result in solder protruding from the other side of the
board, as shown in Figure 8. Note that the vias are not
completely filled with solder, suggesting that solder wets
down the via walls until the ends are plugged. This
protrusion is a function of PCB thickness, amount of paste
coverage in the thermal pad region, and the surface finish of
the PCB. Amkor’s experience is that this protrusion can be
avoided by using lower volume of solder paste and reflow
peak temperature of less than 215o
C. If solder protrusion
cannot be avoided, the MLF components may have to be
assembled on the top side (or final pass) assembly, as the
protruded solder will impede acceptable solder paste
printing on the other side of the PCB.
Figure 8. Solder protrusion from the bottom side of PCB
for encroached vias.
Reflow profile and peak temperature also have a strong
influence on void formation. Amkor has conducted
experiments with different reflow profiles (ramp -to-peak vs.
ramp-hold-ramp), peak reflow temperature, and time above
liquidus using Alpha Metal’s UP78 solder paste. Generally,
it is found that the voids in the thermal pad region for
plugged vias reduce as the peak reflow temperature is
increased from 210 o
C to 215 – 220 o
C. For encroached vias,
it is found that the solder extrusion from the bottom side of
the board reduces as the reflow temperature is reduced.
Solder joint standoff height
The solder joint standoff is a direct function of amount of
paste coverage on the thermal pad and the type of vias used
for MLFs with exposed pad at the bottom. Board mounting
studies by Amkor in partnership with customers have
clearly shown that the package standoff increases by
increasing the paste coverage and by using plugged vias in
the thermal pad region. This is shown in Figure 9 below.
The standoff height varies by the amount of solder that wets
or flows into the PTH via. The encroached via provides an
easy path for solder to flow into the PTH and decreases
package standoff height while the plugged via impedes the
flow of solder into via due to the plugged via closed barrel
end. In addition, the number of vias and their finished hole
sizes will also influence the standoff height for encroached
via design. The standoff height is also affected by the type
and reactivity of solder paste used during assembly, PCB
thickness and surface finish, and reflow profile.
To achieve 50 micron thick solder joints, which help in
improving the board level reliability, it is recommended that
that the solder paste coverage be at least 50% for plugged
vias and 75% for encroached via types.
0
0.5
1
1.5
2
2.5
3
3.5
PLUGGED
VIA @ 37%
PASTE
COVERAGE
PLUGGED
VIA @ 67%
PASTE
Coverage
ENCROACH
VIA @ 37%
PASTE
Coverage
ENCROACH
VIA @ 67
% Paste
Coverage
PLUGGED
VIA @ 50%
PASTE
Coverage
PLUGGED
VIA @ 81%
PASTE
Coverage
ENCROACH
VIA @ 50%
PASTE
Coverage
ENCROACH
VIA @ 81%
PASTE
Coverage
48I/O 48I/O 48I/O 48I/O 68I/O 68I/O 68I/O 68I/O
StandoffHeight(mils)
Figure 9. Standoff height as a function of Via type and
paste coverage.
BOARD LEVEL RELIABILITY CONSIDERATIONS
Since MLF is a leadless package, reliability of solder joints
is one of the major concerns for this package. The board
level reliability is affected by material and design
parameters of the package itself as well as by the board
design and thickness. Amkor has generated extensive data to
evaluate the board level reliability both for temperature
cycling and drop conditions. Multiple package sizes were
tested to investigate the effect of package design and
material parameters, board parameters, and temperature
cycle condition. All tests were conducted with exposed pad
of the packages soldered to the test board, unless
specifically mentioned otherwise. The data presented below
was generated using three different test conditions:
1. TC1: -40 to 125o
C, 1 cycle/hour, 15 minutes ramps
and dwells
2. TC2: -55 to 125o
C, 2 cycles/hour, 2 minutes ramps,
13 minutes dwells

5. 3. TC3: 0 to 100 o
C, 2 cycles/hour, 10 minutes ramps,
5 minutes dwells
The footprints of all test boards were designed according to
the calculations described in the application notes [2]. All
packages had daisy chain leadframe and dummy silicon die
inside the package to simulate the mechanical and material
construction of a real package. The test boards had
alternating daisy chains so a complete net was formed once
the package was attached to the board. The electrical
continuity of these nets was monitored through out the test
to detect opens as soon as they occur. The nets were
scanned and electrical resistance was measured every 2
minutes. A resistance value beyond 500 ohms threshold was
considered as open. Any such open was confirmed by 15
additional opens within 10% of the time of first open. The
opens were manually confirmed also before declaring the
net as failed.
Effect of Package Material and Design
Mold Compound Material: Selecting the proper mold
compound was one of the main tasks in developing this
package. The selection was primarily based on two criteria:
1. The selected mold compound must result in
meeting the minimum package level reliability
requirements, i.e., moisture sensitivity level, and
2. The selected mold compound must result in
acceptable package to board attachment reliability.
To meet these requirements actual tests were conducted for
both package level and board level reliability. The package
selected for this evaluation was 7 x 7 mm in size with 48
lead (12 leads on each side) at 0.5mm pitch and 3.8 x 3.8
mm dummy die inside. The packages were mounted on a
1.6mm thick, 4 layer FR-4 board with OSP surface finish.
The board level reliability was evaluated under TC2
condition.
Table 1. Mold Compound Material properties (supplier
data) and BLR Result Summary
Mold
Compound
alpha 1
(ppm/o
C)
alpha 2
(ppm/o
C)
Tg (o
C)
Modulus
(kg/mm2
)
Cycles
Completed
# of
Failures
1st
Failure
Mean Life
EMC1 7 25 125 2650 1846 29 649 978
EMC2 7 33 120 2710 4100 29 2166 3150
EMC3 8 35 130 2650 5012 22 1219 2384
EMC4 9 35 150 2800 5012 22 2700 3822
EMC5 10 42 135 2400 5657 12 3747 5320
EMC6 11 45 135 2400 5012 12 3578 4708
EMC7 12 49 130 1900 5012 3 4218 NA
EMC8 14 43 185 1800 5657 24 3684 5090
Table 1 above provides the material properties as well as the
summary of failure data. As expected, the data revealed that
the board level reliability is directly dependent on the CTE
of the mold compound. The compounds with lower CTE
values performed worse than the ones with CTE value
closer to the board CTE (around 17 ppm/ o
C). Also, the
compounds with lower CTE generally have higher modulus,
resulting in a stiffer package. Based on the results above as
well as the results from package level reliability (MSL
evaluations), EMC7 was selected as the mold compound of
choice for this package.
Die Size: The die size inside the package can have a
significant effect on the board level reliability of the
package. To quantify this affect, a number of board level
tests were conducted on 7 x 7mm-48 lead, 10x10mm-68,
and 12x12mm-100 lead packages. The tests were run using
two test conditions (TC1 and TC2) and two board thickness’
(0.8 and 1.6mm). Table 2 provides the summary of package,
board, and temperature cycle condition used for these
evaluations.
Figure 10 shows a plot of first failure point Vs Die to
Package size ratio. The data is normalized for the same test
condition and board thickness using the acceleration factor
multipliers for these variables. These acceleration factors
are presented in a later section of this paper. The plot shown
is for first failure based on sample size of 30, as not enough
failures were observed to calculate the mean life for small
die/package ratio. The plot also shows the best fit to this
data as well as the fitted equation.
It is clear that the board level reliability is dependent on this
ratio, not the actual die and package size. The life can be
very low if die/package size ratio is very high, but increases
non-linearly for lower values of die to package ratio.
Table 2: Test matrix for die size effect evaluation.
Package Size 7mm -48 7mm-48 7mm-48 10mm-68 10mm-68 12mm-100
Package Size 7 7 7 10 10 12
Die Size 2.8 3.8 5.1 7.6 3.8 7.6
Board Thickness 1.6 1.6 0.8 0.8 0.8 0.8
Test Condition TC2 TC2 TC1 TC1 TC1 TC1
y = 341.16x-3.2274
R2
= 0.9886
0
2000
4000
6000
8000
10000
0.30 0.40 0.50 0.60 0.70 0.80
Die to Package Size ratio
FatigueLife(1stFailure)
Figure 10. Effect of Die to Package ratio on board level
reliability
Land Size: Since MLF is a leadless package, the reliability
of solder joints is also a function of package land size. This
effect is shown in Figure 11 by comparing 7mm-48 lead and
7mm-28 lead packages. Both packages used the same die
size (5.1 x 5.1 mm), however, have different lead pitches;
0.5mm for 48 lead package and 0.8mm for 28 lead package.
Because of higher pitch for 7mm-28 package, the land size
of this package is 0.28 x 0.6 mm compared to 0.23 x 0.4
mm for 48 lead package. The Weibull plot, shown in Figure
11, clearly shows that this increase in land size resulted in

6. 2X improvement in fatigue life. The larger land results in
wider and longer solder joints, and thus longer path for the
crack to go through before a complete separation is
achieved.
100.0 10000.01000.0
1.0
5.0
10.0
50.0
90.0
99.0
Cycles to Failure
Cumulative%Failed
Weibull
7mm-28
W2 RRX - SRM MED
F=30 / S=0
β1=8.60, η1=2124.93, ρ=0.98
7mm-48
W2 RRX - SRM MED
F=23 / S=7
β2=9.61, η2=1106.65, ρ=0.93
Figure 11. Land size effect on fatigue life. 7mm-28 lead
package has bigger lands compared to 7mm-48 lead
package.
Full Vs Half Etched Leadframe:As explained in an earlier
section (Figure 2), the package lands come in two options;
a) a full lead option, and b) a half etched option with lead
pull back. To investigate if this half etch lead pull back has
any deleterious consequence on board level reliability, test
are being conducted on 5mm-32 lead package with both
options. The packages on test have 2.54 x 2.54 mm dummy
die inside and are mounted using the same footprint on the
board. TC1 test condition is being used for this evaluation
with the board thickness of 1.6mm. As of this writing more
than 3000 cycles have been completed without any failure
for both of these options. This shows that lead pull back will
not cause reduction in board level reliability as the land
length is the same for both options. It should be noted that
the land length for these packages is 0.4mm nominal, which
is smallest that Amkor offers for these packages.
Effect of Board Thickness
Since the MLF package is targeted for multiple applications
that require quite different board thickness, understanding
the effect of board thickness on board level reliability was
also investigated. Tests were conducted on 10mm-68 lead as
well as 5mm-32 lead packages using 0.8 and 1.6mm thick
boards. The die sizes were 7.62 mm square and 2.54mm
square for 10mm and 5mm packages, respectively. The
effect of board thickness was evaluated using TC1 test
condition.
Figure 12 shows the effect of board thickness for 10mm-68
lead package. The data shows that mounting the package on
1.6mm thick board results in 33% reduction in board level
reliability. This is consistent with other packages as thicker
board provides stiffer assembly, resulting in lower life.
The tests on 5mm-32 lead packages are still on-going. At
the time of this writing, the packages mounted on 1.6mm
thick board started failing at around 6300 cycles, while the
packages on 0.8mm thick board have not failed yet at the
end of 8100 cycles. Based on this data, the life for thinner
board is at least 30% higher. Since no failures have occurred
on 0.8mm thick board, this life improvement is expected to
be in the same range as that for 68 lead package.
100.0 10000.01000.0
1.0
5.0
10.0
50.0
90.0
99.0
Cycles to Failure
Cumulative%Failed
Weibull
0.8mm
Thick
Board
W2 RRX - SRM MED
F=26 / S=4
β1=13.69, η1=1254.23, ρ=0.97
1.6mm
Thick
Board
W2 RRX - SRM MED
F=29 / S=1
β2=9.42, η2=854.83, ρ=0.94
100.0 10000.01000.0
1.0
5.0
10.0
50.0
90.0
99.0
Cycles to Failure
Cumulative%Failed
Weibull
0.8mm
Thick
Board
W2 RRX - SRM MED
F=26 / S=4
β1=13.69, η1=1254.23, ρ=0.97
1.6mm
Thick
Board
W2 RRX - SRM MED
F=29 / S=1
β2=9.42, η2=854.83, ρ=0.94
Figure 12. Weibull plot showing thicker board resulted in
lower reliability.
Effect of Exposed Pad Mounting
The MLF package has a big exposed pad on the bottom of
the package that is supposed to be soldered to the board for
enhanced board level reliability, and electrical/thermal
performance. However, because of routing considerations
and actual application requirements, the exposed pad may
not be soldered to the board. It should be realized that this
will impact the board level reliability, which can be
significant in some case.
100.0 10000.01000.0
1.0
5.0
10.0
50.0
90.0
99.0
Cycles to Failure
Cumulative%Failed
Weibull
Paddle
Not Soldered
W2 RRX - SRM MED
F=28 / S=2
β1=9.55, η1=1036.80, ρ=0.98
Paddle
Soldered
W2 RRX - SRM MED
F=28 / S=2
β2=10.84, η2=1289.56, ρ=0.88
100.0 10000.01000.0
1.0
5.0
10.0
50.0
90.0
99.0
Cycles to Failure
Cumulative%Failed
Weibull
Paddle
Not Soldered
W2 RRX - SRM MED
F=28 / S=2
β1=9.55, η1=1036.80, ρ=0.98
Paddle
Soldered
W2 RRX - SRM MED
F=28 / S=2
β2=10.84, η2=1289.56, ρ=0.88
Figure 13. Weibull plot showing the effect of not soldering
exposed pad to the board.

7. Figure 13 shows the comparison of board level reliability
for 10mm-68 lead packages mounted on the board with and
without exposed pad soldered to the board. The evaluation
was performed using TC1 test condition and 0.8mm thick
boards. The Weibull plot shows a 20% reduction in board
level reliability when exposed pad is not soldered to the
board.
Tests are also being conducted for exposed pad effect using
5mm-32 lead packages, TC1 condition, and 0.8mm thick
board. Although the tests are not completed yet, the current
data shows at least 60% improvement in life when the
exposed pad is soldered for this particular package.
Effect of Temperature Cycle Condition
It is well known that depending upon the accelerated test
condition used, the board level reliability of a package can
be significantly different. The same is true of MLF package,
as shown in the Table 3 below. The data shows that for a
5mm-32 lead package, the board level reliability can be
20% lower for TC2 condition compared to TC1 condition.
Similarly, since no failures have occurred so far when using
TC3 test condition, the reliability can be at least 75% higher
for this condition compared to TC1 condition. This is
because of faster ramp rates for TC2 and lower temperature
extremes for TC3, respectively. The data is consistent with
other packages, which show a similar trend.
Table 3. Effect of temperature cycle condition
Body Size 5 5 5
Lead Count 32 32 32
Pitch 0.5 0.5 0.5
Board Thickness (mm) 1.6 1.6 1.6
Test Type TC1 TC2 TC3
Cycles Completed 3785 7370 5813
# of Failures 2 17 0
# Parts on Test 30 30 30
1st Failure (cycles) 3352 2610 NA
Mean Life (cycles) NA 5960 NA
BOARD LEVEL RELIABILITY ENHANCEMENTS
The data presented above clearly shows that the MLF
package has superb board level reliability characteristics,
except for the case where die to package size ratio is greater
than 70%. Only for these extreme cases, the reliability can
be below 1000 cycles in TC1 condition, but still better than
500 cycles requirement for most handheld and consumer
electronic applications. However, some other applications,
such as automotive and network hardware, will require
enhancements in board level reliability for large die to
package ratio designs. There are two possible ways to
further improve the reliability: (a) increase the standoff
height, and (b) solder fillet formation. These options are
discussed below.
Bumped MLF
While increased standoff can be achieved by using thicker
stencil, there are limits to this option due to aperture area
and aspect ratio requirements for paste release. Also, since
multiple types of components are mounted on the same
board, using a thicker stencil for one or two components is
not desirable. To resolve this issue, Amkor has developed
Bumped MLF option. The Bump refers to thicker lead
frame plating on the underside of the package, as shown in
Figure 14. The resulting bump height can be as much as 4
mils (100 um), which in turn results in increased standoff
(joint thickness) by 4 mils. Although FEA simulations
showed that this can potentially increase the reliability by
2X, actual tests were conducted to further prove this
concept.
Plate-up Bump
on Lead
Plate-up Bump
on Die Paddle
Plate-up Bump
on Lead
Plate-up Bump
on Die Paddle
Figure 14. Plate-up Bumped MLF option.
Figure 15 shows the results of board level reliability test on
bumped Vs non-bumped standard package (7mm, 48 lead,
3.81mm die). The packages were mounted on 0.8mm thick
board using Sn4.0Ag0.5Cu paste and are being tested under
TC1 condition. Although not enough failures have been
observed so far, the data clearly shows 2X improvement in
board level reliability for bumped version.
1000.0 10000.0
1.0
5.0
10.0
50.0
90.0
99.0
Cycles to Failure
Cumulative%Failed
Weibull
Bumped
W2 RRX - SRM MED
F=5 / S=25
β1=10.08, η1=4447.98, ρ=0.97
Non Bumped
(Std)
W2 RRX - SRM MED
F=7 / S=23
β2=14.00, η2=2255.67, ρ=0.97
1000.0 10000.0
1.0
5.0
10.0
50.0
90.0
99.0
Cycles to Failure
Cumulative%Failed
Weibull
Bumped
W2 RRX - SRM MED
F=5 / S=25
β1=10.08, η1=4447.98, ρ=0.97
Non Bumped
(Std)
W2 RRX - SRM MED
F=7 / S=23
β2=14.00, η2=2255.67, ρ=0.97
Figure 15. Weibull plot showing the effect of bumping the
package lands.
The bumped package also has the advantage in rework over
the standard package. If the package is replaced with a new
one during board rework process, solder paste needs to be
printed either on the board site or to the underside of the
new package at the board assembly site. However, with an
already bumped package, this paste printing operation can
be avoided during rework at the board assembly site. Data
collected by customers have validated this aspect of bumped
package.

8. Standoff Height and Solder Fillet Formation
The MLF packages have either full or half the thickness of
lead exposed on the sides of the package. However, since
the plating operation is done prior to package singulation,
the exposed sides of the leads are not plated and have bare
copper surface. Since bare Cu oxidizes readily in an
uncontrolled environment, the package falls into the
category of “Bottom Only Termination” as per IPC/EIA
J-STD-001C. This joint industry standard does not require
fillet formation on the side of the package for the packages
in this category. Due to factors not controlled by Amkor, the
company does not guarantee the fillet formation on the side
of the package during board assembly.
In fact, the fillet formation is solely dependent on the
surface mount process. Some of the variables that control
this fillet formation are: solder paste used and its flux
activity level, PCB land size, printed solder volume, and the
package standoff height. The pad size calculated above
along with 1:1 aperture will provide sufficient solder for
fillet formation if the package standoff is not excessive.
Since there is only limited solder available, higher standoff -
controlled by paste coverage on the thermal pad – may not
leave enough solder for fillet formation. Conversely, if the
standoff is too low, large convex shape fillets may form.
This is shown in Figure 16.
Since center pad coverage and via type were shown to
have the greatest impact on standoff height the volume of
solder necessary to create optimum fillet varies. Package
standoff height and PCB pads size will establish the
required volume.
(a) (b)
(c) (d)
Figure 16. Solder fillet shape as a function of paste
coverage in the thermal pad, via type, standoff, and PCB
land size. (a) 37% paste coverage, Plugged via, 1.4 mils
standoff (b) 37% paste coverage, Encroached via, 0.6 mils
standoff (c) 50% paste coverage, Plugged via, 2.9 mils
standoff (d) 81% paste coverage, Encroached via, 2.1 mils
standoff
Finite element simulations and actual test data generated by
customer have shown that the fillets - if formed - can
improve the board level reliability by as much as 2X for a
package with large die to package size ratio. The fillet
extends the length of solder joint and provides a longer path
for the crack to go through the entire joint, thus improving
the reliability. However, since fillet formation and standoff
height are not independent of each other, the solder joint
reliability may not increase as much due to fillet formation
if the standoff height is too low (less than 2 mils). Also, the
improvement in life goes down as the package becomes
more compliant (lower die to package size ratio, longer
lands, smaller packages). It should be realized that the added
improvement in life is not needed for most applications.
CONCLUSIONS
The data presented in this paper shows that the attachment
reliability of MLF package is excellent and can be further
improved for extreme applications. This, however, requires
careful attention in board design as well as in assembly
process development. Proper footprint design and assembly
processes will yield reliability far exceeding the
requirements for most applications. Amkor has optimized
the package design and material selection for this package
with focus on both board level and package level reliability
and offers options (such as bumped MLF) to enhance the
reliability and re -workability of this package.
ACKNOWLEDGEMENTS
The authors would like to thank MLF engineering team
(Jing Alaban, JD Kwon, Bob Bancod, and Terry Davis) for
their continued support in board level reliability evaluations
and preparing samples for various studies reported here.
Acknowledgements are also due to YH Ka and YJ Kim for
carrying out most of the tests and failure analysis. Last, but
not least, thanks are also due to Cisco Systems, Solectron
Corporation, Xetel Corporation, and Delphi Automotive for
their collaboration in surface mount studies.
REFERENCES
1. IPC-SM-782, Surface Mount Design and Land
Pattern Standard.
2.