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An FPGA-Based Multi-core Processor Architecture for
Image Feature Extraction and Classification
Name: Vincent Yeong Chun Kiat
IC Number: 900528-14-5683,UPM matrix number: 156434,Email: vincentkarl90@gmail.com
2014 IEEE Malaysia Final Year Project Competition
Insert
your
picture
here
1
2
3
1
2
3
Display captured image
Correlation result from CPUs
Time taken to process
ABSTRACT
Resize to
256x128
pixels
Apply GLCM
and Correlation
Apply GLCM
and Correlation
Finalized
Correlation and
Classification
Capture
KEY[0] Read out
SDRAM
Timer
Output
CPU 1
( 128x128
pixels)
CPU timer
High Level View of System Architecture:
A. Comparison on Correlation between FPGA
and MATLAB on flooring types: Average correlation
FPGA 0.615813
MATLAB 0.751162
Difference 0.135349
 Percentage Difference(%)
= (0.135349
0.751162)×100%
= 18.0286%
B. Performance Evaluation:
FPGA
processors
Time Taken for
Execution (ms)
Single-core 8861.667
Multi-core 2591.633
RESULTS & DISCUSSION
 Rate(Execution)
= (8861.667 𝑚𝑠
2591.633 𝑚𝑠)
= 3.41934 Times Faster
 Execute different image processing algorithms on soft-core processor
FPGA-based multi-core processor is a better option: » fast operation and comparable results
» easily adaptable for other IP applications
CONCLUSION
0
0.2
0.4
0.6
0.8
1
1.2
1 4 7 10 13 16 19 22 25 28 31 34 37 40 43 46 49 52 55 58
Correlation
Number of Sample Points
Correlation on Wood
Matlab_correlation Real time Correlation
Image processing computationally intensive operation
 requires immense resources in CPU and memory throughput.
 high parallelism in image processing suitable FPGAs.
FPGA-based real time image processing using mixed HW/SW co-design on multi-core processor
platform is introduced:
• Exploit parallelism in image processing algorithms
• Utilize FPGA technology → use of multi-core processor to speed up operations
• Fast prototyping
Output:
CPU 2
( 128x128
pixels)
C. Flexible Adaptability
Functional Block
Diagram:
Concurrent design
METHODOLOGY

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IEEEFYP2014poster Track 5 Vincent Yeong Chun Kiat

  • 1. An FPGA-Based Multi-core Processor Architecture for Image Feature Extraction and Classification Name: Vincent Yeong Chun Kiat IC Number: 900528-14-5683,UPM matrix number: 156434,Email: vincentkarl90@gmail.com 2014 IEEE Malaysia Final Year Project Competition Insert your picture here 1 2 3 1 2 3 Display captured image Correlation result from CPUs Time taken to process ABSTRACT Resize to 256x128 pixels Apply GLCM and Correlation Apply GLCM and Correlation Finalized Correlation and Classification Capture KEY[0] Read out SDRAM Timer Output CPU 1 ( 128x128 pixels) CPU timer High Level View of System Architecture: A. Comparison on Correlation between FPGA and MATLAB on flooring types: Average correlation FPGA 0.615813 MATLAB 0.751162 Difference 0.135349  Percentage Difference(%) = (0.135349 0.751162)×100% = 18.0286% B. Performance Evaluation: FPGA processors Time Taken for Execution (ms) Single-core 8861.667 Multi-core 2591.633 RESULTS & DISCUSSION  Rate(Execution) = (8861.667 𝑚𝑠 2591.633 𝑚𝑠) = 3.41934 Times Faster  Execute different image processing algorithms on soft-core processor FPGA-based multi-core processor is a better option: » fast operation and comparable results » easily adaptable for other IP applications CONCLUSION 0 0.2 0.4 0.6 0.8 1 1.2 1 4 7 10 13 16 19 22 25 28 31 34 37 40 43 46 49 52 55 58 Correlation Number of Sample Points Correlation on Wood Matlab_correlation Real time Correlation Image processing computationally intensive operation  requires immense resources in CPU and memory throughput.  high parallelism in image processing suitable FPGAs. FPGA-based real time image processing using mixed HW/SW co-design on multi-core processor platform is introduced: • Exploit parallelism in image processing algorithms • Utilize FPGA technology → use of multi-core processor to speed up operations • Fast prototyping Output: CPU 2 ( 128x128 pixels) C. Flexible Adaptability Functional Block Diagram: Concurrent design METHODOLOGY