Vikas Singh is seeking a career in IC design or verification. He has a Bachelor's degree in Electrical and Electronics Engineering with 8.56 CGPA. He has internship experience in digital verification of SAR-ADC at Analog Devices and functional verification of LC3 microcontroller at Mentor Graphics. His skills include SystemVerilog, Verilog, VHDL, C/C++, QuestaSim, Cadence tools, and Linux. Some of his projects include verifying a SAR-ADC design and developing a layered testbench for LC3 microcontroller verification. He was selected for a competitive training program at Mentor Graphics and secured first place in an IEEE paper presentation.

1. VIKAS SINGH 1
VIKAS SINGH R
#18 Shakthi Gardern,
1st
main, 1st
cross, Ph.No: +91-7204263474
Kalyananagar, Bangalore-560072 vikassingh136@gmail.com
CAREER OBJECTIVE:
To pursue a challenging career in IC Design/Verification where I can apply my skills
towards creating the next generation ASICs, SOCs, PROCESSORs.
EDUCATIONAL SUMMARY:
DEGREE SCHOOL / COLLEGE
YEAR OF
PASSING
AGGREGATE
/CGPA
B.E
(ECE)
R.V.C.E, Bangalore
(affiliated to VTU)
(2016) 8.56
Diploma
(ECE)
S.J(GOVT.) POLYTECHNIC,
Dept. of Technical Education Board
2013 90.2%
S.S.L.C
ST. JOHN’S HIGH SCHOOL,
Karnataka State Board
2010 87.84%
INTERNSHIP/TRAINING:
 Analog Devices from Jan 2016 to June 2016
 Digital Verification analysis of a 16-bit SAR-ADC.
 Wrote Directed Test cases to verify the functionality of the SAR-ADC.
 Verified Clock Domain Crossing in the design using Spyglass tool.
 Working on Certitude tool to verify Verification Environment.
 Mentor Graphics from June 2015 to July 2015
 Attended training on “Verification of Electronic Design and Systems using
System Verilog”.
 Verified the functionality of LC3 Microcontroller design using Mentor
Questasim.
 Robogenesis from January 2013 to April 2013
 Worked on Atmega-8 microcontroller and completed a mini project based on
flex sensors.
SKILL SET:
 Hardware Description Languages : SystemVerilog, Verilog, VHDL
 Programming Languages : C, C++

2. VIKAS SINGH 2
 EDA Tools : QuestaSim, Cadence NCSim, Cadence Virtuoso, Xilinx ISE-suit
 Operating Systems : Linux and MS-Windows
 Software : Spyglass, Certitude, MATLAB, Keil, Winavr, Cisco Packet Tracer,
Eagle, MS office tools, Turbo-C
 Text Editors : Gvim, Gedit, Vi editor
PROJECT
1. DV Analysis of a complex mixed signal design using Spyglass, Certitude and
Directed testing (Ongoing project at Analog Devices)
 Verifying the functionality of a 16-bit SAR-ADC design using SystemVerilog.
 Verified Clock Domain Crossing in the design using Spyglass tool.
 Working on Certitude tool to verify Verification Environment.
2. Functional Verification of LC3 Microcontroller (at Mentor Graphics)
 Verified the functionality of the LC3 microcontroller using SystemVerilog.
 Developed a layered test bench comprising of the generator, driver, receiver,
checker and scoreboard for the 5 stages of the microcontroller using object
oriented concepts and constrained randomization.
 Used mailboxes for inter-process synchronization and assertions for functional
verification.
 Developed reference model for checking the functionality of the DUV.
 Enhanced test plan with additional test scenarios for increasing the functional
coverage to 100% and reported a total of 20 bugs for the entire design.
3. Sign Language to Speech Converter (for Texas Instruments competition)
 Devised and implemented Sensor Gloves that converts sign language into speech
for the mute people.
 The project was implemented using MSP430F5529 (TEXAS microcontroller),
flex sensors and APR9600.
4. Digital Fuel Level Indicator with GSM based Fuel Fraud Detection (at R.V.C.E)
 Deigned and programmed a fuel level indicator for automobiles that digitally
displays the level of the fuel present in the fuel tank to prevent the fraud at petrol
pumps.
 The project was implemented using a Fuel gauge, Atmega-8 microcontroller and a
GSM SIM-900.
ACHIEVEMENTS:
 Selected for highly competitive HEP training at Mentor Graphics in June 2015
(acceptance rate < 3%).

3. VIKAS SINGH 3
 Secured 1st
place in national level IEEE paper presentation at S.J.CE, Mysore in
January 2015.
 Project selected for semifinals in TEXAS Instruments Innovation Challenge India
Design Contest-2015.
 Secured 7th
rank in Electronics and an overall ranking of 41 in DCET, a competitive
exam for admission into engineering colleges conducted by the government of
Karnataka (2013).
 Conducted a Haptics Robotic workshop for the students of SSIT, Tumkur and RNSIT,
Bangalore.
 Conducted a Biped Robotic workshop for the students of PSG College of Technology,
Coimbatore.
STRENGTHS:
 A team player.
 Quick learner and adaptable to new working environments.
 Self-starter and like to take up challenges and additional responsibilities.