SPICE MODEL of uPC4093C in SPICE PARK. English Version is http://www.spicepark.net. Japanese Version is http://www.spicepark.com by Bee Technologies.

1. Device Modeling Report
COMPONENTS: OPERATIONAL AMPLIFIER
PART NUMBER: uPC4093C
MANUFACTURER: NEC ELECTRONICS
REMARK TYPE: (OPAMP)
Bee Technologies Inc.
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

2. Spice Model
U8
1 8
OFFSET NULL NC
2 7
II V+
3 6
IN OUT
4 5
V- OFFSET NULL
uPC4093
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

3. Output Voltage Swing (+Vpwr = +15)
Circuit Simulation Result
Evaluation circuit
U8
1 8
OFFSET NULL NC
2 7
II V+
3 6
IN OUT
4 5
V- OFFSET NULL R1
uPC4093 10k
V1
0V dc
V2 V3 0
15V dc 15V dc
0
Compare Measurement vs. Simulation
Measurement Simulation Error
+Vout 14 V 13.986 V 0.1 %
-Vout -13.3 V -13.287 V 1.3 %
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

4. Slew Rate
Circuit Simulation Result
Evaluation circuit
U8
1 8
OFFSET NULL NC
2 7
II V+
3 6
IN OUT
4 5
V- OFFSET NULL R1
uPC4093 10k
V 1 = -14
V 2 = 14 V1
TD = .5u
V2 V3 0
TR = 10n
TF = 10n
PW = 10u 15V dc 15V dc
PER = 20u
0
Compare Measurement vs. Simulation
Measurement Simulation Error
+SR +25 V/us +24.912 V/us 0.352 %
-SR -25 V/us -26.5 V/us 6 %
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

5. Input Bias Current
Circuit Simulation Result
Evaluation circuit
U8
1 8
OFFSET NULL NC
2 7
V non II V+
0V dc 3 6
IN OUT
V inv 0V dc 4 5
V- OFFSET NULL R1
uPC4093 10k
V2 V3 0
15V dc 15V dc
0
Compare Measurement vs. Simulation
Measurement Simulation Error
Ib 50 pA 50.198 nA 0.396 %
Ibos 25 pA 25.004 nA 0.016 %
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

6. Input Offset Voltage
Circuit Simulation Result
Evaluation circuit
PARAMETERS:
V off = 2.5m
U8
1 8
OFFSET NULL NC
2 7
II V+
3 6
IN OUT
V off 4 5 V
2.49556927m V- OFFSET NULL R1
uPC4093 10k
V2 V3 0
15V dc 15V dc
0
Compare Measurement vs. Simulation
Measurement Simulation Error
Vos 2.5 mV 2.49556927 mV 0.1772292 %
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

7. Open Loop Gain (DC) and Unity Gain Frequency
Circuit Simulation Result
Evaluation circuit
U8
1 8
OFFSET NULL NC
2 7
II V+
3 6
IN OUT
V off 4 5 V
2.49556927m V- OFFSET NULL R1
uPC4093 10k
V2 V3 0
V1
10uV ac
0V dc 15V dc 15V dc
0
Compare Measurement vs. Simulation
Measurement Simulation Error
Av-dc 200 V/mV 200.927 V/mV 0.4635 %
f-0db 6 MHz 6 MHz 0 %
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

8. Common - Mode Rejection Ratio – CMRR
Circuit Simulation Result
Evaluation circuit
U8
1 8
OFFSET NULL NC
2 7
II V+
3 6
IN OUT
V off 4 5 V
2.49556927m V- OFFSET NULL R1
uPC4093 10k
V2 V3 0
V4 V
V OFF = 0
V AMPL = 0.5 15V dc 15V dc
FREQ = 1
0
Common-model gain = 2.0019 V/V
CMRR = 200927 / 2.0019 = 100368.15, 20log10(100368.15) = 100.0319dB
Compare Measurement vs. Simulation
Measurement Simulation Error
CMRR 100 dB 100.0319 dB 0.0319 %
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004

9. Output Short Circuit Current
Circuit Simulation Result
Evaluation circuit
U8
1 8
OFFSET NULL NC
2 7
II V+
3 6
IN OUT
4 5
V- OFFSET NULL R1
uPC4093 1
V1
0V dc
V2 V3 0
15V dc 15V dc
0
Ios is calculated by maximum power dissipation : Ios = P / Vp-p = 350m/27.3
Ios = 12.82mA
Compare Measurement vs. Simulation
Measurement Simulation Error
Ios 12.82 mA 12.786 mA 0.2652 %
All Rights Reserved Copyright (c) Bee Technologies Inc. 2004